diff options
Diffstat (limited to 'include/asm-arm/system.h')
-rw-r--r-- | include/asm-arm/system.h | 62 |
1 files changed, 36 insertions, 26 deletions
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index aa223fc546af..f4386906b200 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h | |||
@@ -140,6 +140,40 @@ static inline int cpu_is_xsc3(void) | |||
140 | #define cpu_is_xscale() 1 | 140 | #define cpu_is_xscale() 1 |
141 | #endif | 141 | #endif |
142 | 142 | ||
143 | #define UDBG_UNDEFINED (1 << 0) | ||
144 | #define UDBG_SYSCALL (1 << 1) | ||
145 | #define UDBG_BADABORT (1 << 2) | ||
146 | #define UDBG_SEGV (1 << 3) | ||
147 | #define UDBG_BUS (1 << 4) | ||
148 | |||
149 | extern unsigned int user_debug; | ||
150 | |||
151 | #if __LINUX_ARM_ARCH__ >= 4 | ||
152 | #define vectors_high() (cr_alignment & CR_V) | ||
153 | #else | ||
154 | #define vectors_high() (0) | ||
155 | #endif | ||
156 | |||
157 | #if __LINUX_ARM_ARCH__ >= 6 | ||
158 | #define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ | ||
159 | : : "r" (0) : "memory") | ||
160 | #define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ | ||
161 | : : "r" (0) : "memory") | ||
162 | #define dmb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \ | ||
163 | : : "r" (0) : "memory") | ||
164 | #else | ||
165 | #define isb() __asm__ __volatile__ ("" : : : "memory") | ||
166 | #define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ | ||
167 | : : "r" (0) : "memory") | ||
168 | #define dmb() __asm__ __volatile__ ("" : : : "memory") | ||
169 | #endif | ||
170 | #define mb() dmb() | ||
171 | #define rmb() mb() | ||
172 | #define wmb() mb() | ||
173 | #define read_barrier_depends() do { } while(0) | ||
174 | #define set_mb(var, value) do { var = value; mb(); } while (0) | ||
175 | #define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t"); | ||
176 | |||
143 | extern unsigned long cr_no_alignment; /* defined in entry-armv.S */ | 177 | extern unsigned long cr_no_alignment; /* defined in entry-armv.S */ |
144 | extern unsigned long cr_alignment; /* defined in entry-armv.S */ | 178 | extern unsigned long cr_alignment; /* defined in entry-armv.S */ |
145 | 179 | ||
@@ -154,6 +188,7 @@ static inline void set_cr(unsigned int val) | |||
154 | { | 188 | { |
155 | asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR" | 189 | asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR" |
156 | : : "r" (val) : "cc"); | 190 | : : "r" (val) : "cc"); |
191 | isb(); | ||
157 | } | 192 | } |
158 | 193 | ||
159 | #ifndef CONFIG_SMP | 194 | #ifndef CONFIG_SMP |
@@ -176,34 +211,9 @@ static inline void set_copro_access(unsigned int val) | |||
176 | { | 211 | { |
177 | asm volatile("mcr p15, 0, %0, c1, c0, 2 @ set copro access" | 212 | asm volatile("mcr p15, 0, %0, c1, c0, 2 @ set copro access" |
178 | : : "r" (val) : "cc"); | 213 | : : "r" (val) : "cc"); |
214 | isb(); | ||
179 | } | 215 | } |
180 | 216 | ||
181 | #define UDBG_UNDEFINED (1 << 0) | ||
182 | #define UDBG_SYSCALL (1 << 1) | ||
183 | #define UDBG_BADABORT (1 << 2) | ||
184 | #define UDBG_SEGV (1 << 3) | ||
185 | #define UDBG_BUS (1 << 4) | ||
186 | |||
187 | extern unsigned int user_debug; | ||
188 | |||
189 | #if __LINUX_ARM_ARCH__ >= 4 | ||
190 | #define vectors_high() (cr_alignment & CR_V) | ||
191 | #else | ||
192 | #define vectors_high() (0) | ||
193 | #endif | ||
194 | |||
195 | #if __LINUX_ARM_ARCH__ >= 6 | ||
196 | #define mb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \ | ||
197 | : : "r" (0) : "memory") | ||
198 | #else | ||
199 | #define mb() __asm__ __volatile__ ("" : : : "memory") | ||
200 | #endif | ||
201 | #define rmb() mb() | ||
202 | #define wmb() mb() | ||
203 | #define read_barrier_depends() do { } while(0) | ||
204 | #define set_mb(var, value) do { var = value; mb(); } while (0) | ||
205 | #define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t"); | ||
206 | |||
207 | /* | 217 | /* |
208 | * switch_mm() may do a full cache flush over the context switch, | 218 | * switch_mm() may do a full cache flush over the context switch, |
209 | * so enable interrupts over the context switch to avoid high | 219 | * so enable interrupts over the context switch to avoid high |