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-rw-r--r--include/asm-arm/io.h31
1 files changed, 30 insertions, 1 deletions
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index 658ffa384fda..cfa71a0dffb6 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -82,7 +82,7 @@ extern void __readwrite_bug(const char *fn);
82 * only. Their primary purpose is to access PCI and ISA peripherals. 82 * only. Their primary purpose is to access PCI and ISA peripherals.
83 * 83 *
84 * Note that for a big endian machine, this implies that the following 84 * Note that for a big endian machine, this implies that the following
85 * big endian mode connectivity is in place, as described by numerious 85 * big endian mode connectivity is in place, as described by numerous
86 * ARM documents: 86 * ARM documents:
87 * 87 *
88 * PCI: D0-D7 D8-D15 D16-D23 D24-D31 88 * PCI: D0-D7 D8-D15 D16-D23 D24-D31
@@ -273,6 +273,35 @@ extern void __iounmap(void __iomem *addr);
273#endif 273#endif
274 274
275/* 275/*
276 * io{read,write}{8,16,32} macros
277 */
278#ifndef ioread8
279#define ioread8(p) ({ unsigned int __v = __raw_readb(p); __v; })
280#define ioread16(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(p)); __v; })
281#define ioread32(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(p)); __v; })
282
283#define iowrite8(v,p) __raw_writeb(v, p)
284#define iowrite16(v,p) __raw_writew(cpu_to_le16(v), p)
285#define iowrite32(v,p) __raw_writel(cpu_to_le32(v), p)
286
287#define ioread8_rep(p,d,c) __raw_readsb(p,d,c)
288#define ioread16_rep(p,d,c) __raw_readsw(p,d,c)
289#define ioread32_rep(p,d,c) __raw_readsl(p,d,c)
290
291#define iowrite8_rep(p,s,c) __raw_writesb(p,s,c)
292#define iowrite16_rep(p,s,c) __raw_writesw(p,s,c)
293#define iowrite32_rep(p,s,c) __raw_writesl(p,s,c)
294
295extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
296extern void ioport_unmap(void __iomem *addr);
297#endif
298
299struct pci_dev;
300
301extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen);
302extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
303
304/*
276 * can the hardware map this into one segment or not, given no other 305 * can the hardware map this into one segment or not, given no other
277 * constraints. 306 * constraints.
278 */ 307 */