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-rw-r--r--include/asm-arm/cacheflush.h40
1 files changed, 35 insertions, 5 deletions
diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h
index afad32c76e6c..d1294a46c70c 100644
--- a/include/asm-arm/cacheflush.h
+++ b/include/asm-arm/cacheflush.h
@@ -102,6 +102,14 @@
102//# endif 102//# endif
103#endif 103#endif
104 104
105#if defined(CONFIG_CPU_V7)
106//# ifdef _CACHE
107# define MULTI_CACHE 1
108//# else
109//# define _CACHE v7
110//# endif
111#endif
112
105#if !defined(_CACHE) && !defined(MULTI_CACHE) 113#if !defined(_CACHE) && !defined(MULTI_CACHE)
106#error Unknown cache maintainence model 114#error Unknown cache maintainence model
107#endif 115#endif
@@ -418,11 +426,19 @@ static inline void flush_anon_page(struct vm_area_struct *vma,
418 */ 426 */
419#define flush_icache_page(vma,page) do { } while (0) 427#define flush_icache_page(vma,page) do { } while (0)
420 428
421#define __cacheid_present(val) (val != read_cpuid(CPUID_ID)) 429#define __cacheid_present(val) (val != read_cpuid(CPUID_ID))
422#define __cacheid_vivt(val) ((val & (15 << 25)) != (14 << 25)) 430#define __cacheid_type_v7(val) ((val & (7 << 29)) == (4 << 29))
423#define __cacheid_vipt(val) ((val & (15 << 25)) == (14 << 25)) 431
424#define __cacheid_vipt_nonaliasing(val) ((val & (15 << 25 | 1 << 23)) == (14 << 25)) 432#define __cacheid_vivt_prev7(val) ((val & (15 << 25)) != (14 << 25))
425#define __cacheid_vipt_aliasing(val) ((val & (15 << 25 | 1 << 23)) == (14 << 25 | 1 << 23)) 433#define __cacheid_vipt_prev7(val) ((val & (15 << 25)) == (14 << 25))
434#define __cacheid_vipt_nonaliasing_prev7(val) ((val & (15 << 25 | 1 << 23)) == (14 << 25))
435#define __cacheid_vipt_aliasing_prev7(val) ((val & (15 << 25 | 1 << 23)) == (14 << 25 | 1 << 23))
436
437#define __cacheid_vivt(val) (__cacheid_type_v7(val) ? 0 : __cacheid_vivt_prev7(val))
438#define __cacheid_vipt(val) (__cacheid_type_v7(val) ? 1 : __cacheid_vipt_prev7(val))
439#define __cacheid_vipt_nonaliasing(val) (__cacheid_type_v7(val) ? 1 : __cacheid_vipt_nonaliasing_prev7(val))
440#define __cacheid_vipt_aliasing(val) (__cacheid_type_v7(val) ? 0 : __cacheid_vipt_aliasing_prev7(val))
441#define __cacheid_vivt_asid_tagged_instr(val) (__cacheid_type_v7(val) ? ((val & (3 << 14)) == (1 << 14)) : 0)
426 442
427#if defined(CONFIG_CPU_CACHE_VIVT) && !defined(CONFIG_CPU_CACHE_VIPT) 443#if defined(CONFIG_CPU_CACHE_VIVT) && !defined(CONFIG_CPU_CACHE_VIPT)
428 444
@@ -430,6 +446,7 @@ static inline void flush_anon_page(struct vm_area_struct *vma,
430#define cache_is_vipt() 0 446#define cache_is_vipt() 0
431#define cache_is_vipt_nonaliasing() 0 447#define cache_is_vipt_nonaliasing() 0
432#define cache_is_vipt_aliasing() 0 448#define cache_is_vipt_aliasing() 0
449#define icache_is_vivt_asid_tagged() 0
433 450
434#elif defined(CONFIG_CPU_CACHE_VIPT) 451#elif defined(CONFIG_CPU_CACHE_VIPT)
435 452
@@ -447,6 +464,12 @@ static inline void flush_anon_page(struct vm_area_struct *vma,
447 __cacheid_vipt_aliasing(__val); \ 464 __cacheid_vipt_aliasing(__val); \
448 }) 465 })
449 466
467#define icache_is_vivt_asid_tagged() \
468 ({ \
469 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
470 __cacheid_vivt_asid_tagged_instr(__val); \
471 })
472
450#else 473#else
451 474
452#define cache_is_vivt() \ 475#define cache_is_vivt() \
@@ -475,6 +498,13 @@ static inline void flush_anon_page(struct vm_area_struct *vma,
475 __cacheid_vipt_aliasing(__val); \ 498 __cacheid_vipt_aliasing(__val); \
476 }) 499 })
477 500
501#define icache_is_vivt_asid_tagged() \
502 ({ \
503 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
504 __cacheid_present(__val) && \
505 __cacheid_vivt_asid_tagged_instr(__val); \
506 })
507
478#endif 508#endif
479 509
480#endif 510#endif