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-rw-r--r--include/asm-arm/arch-sa1100/hardware.h18
1 files changed, 2 insertions, 16 deletions
diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h
index 10c62db34362..19c3b1e186bb 100644
--- a/include/asm-arm/arch-sa1100/hardware.h
+++ b/include/asm-arm/arch-sa1100/hardware.h
@@ -49,23 +49,9 @@
49 ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START ) 49 ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START )
50 50
51#ifndef __ASSEMBLY__ 51#ifndef __ASSEMBLY__
52#include <asm/types.h>
53 52
54#if 0 53# define __REG(x) (*((volatile unsigned long *)io_p2v(x)))
55# define __REG(x) (*((volatile u32 *)io_p2v(x))) 54# define __PREG(x) (io_v2p((unsigned long)&(x)))
56#else
57/*
58 * This __REG() version gives the same results as the one above, except
59 * that we are fooling gcc somehow so it generates far better and smaller
60 * assembly code for access to contigous registers. It's a shame that gcc
61 * doesn't guess this by itself.
62 */
63typedef struct { volatile u32 offset[4096]; } __regbase;
64# define __REGP(x) ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2]
65# define __REG(x) __REGP(io_p2v(x))
66#endif
67
68# define __PREG(x) (io_v2p((u32)&(x)))
69 55
70#else 56#else
71 57