diff options
Diffstat (limited to 'include/asm-arm/arch-s3c2410')
-rw-r--r-- | include/asm-arm/arch-s3c2410/entry-macro.S | 30 | ||||
-rw-r--r-- | include/asm-arm/arch-s3c2410/regs-irq.h | 6 |
2 files changed, 13 insertions, 23 deletions
diff --git a/include/asm-arm/arch-s3c2410/entry-macro.S b/include/asm-arm/arch-s3c2410/entry-macro.S index 894c35cf3b1e..e09a6b8ec153 100644 --- a/include/asm-arm/arch-s3c2410/entry-macro.S +++ b/include/asm-arm/arch-s3c2410/entry-macro.S | |||
@@ -18,8 +18,6 @@ | |||
18 | 18 | ||
19 | #define INTPND (0x10) | 19 | #define INTPND (0x10) |
20 | #define INTOFFSET (0x14) | 20 | #define INTOFFSET (0x14) |
21 | #define EXTINTPEND (0xa8) | ||
22 | #define EXTINTMASK (0xa4) | ||
23 | 21 | ||
24 | #include <asm/hardware.h> | 22 | #include <asm/hardware.h> |
25 | #include <asm/arch/irqs.h> | 23 | #include <asm/arch/irqs.h> |
@@ -28,37 +26,23 @@ | |||
28 | 26 | ||
29 | mov \base, #S3C24XX_VA_IRQ | 27 | mov \base, #S3C24XX_VA_IRQ |
30 | 28 | ||
31 | ldr \irqstat, [ \base, #INTPND] | ||
32 | bics \irqnr, \irqstat, #3<<4 @@ only an GPIO IRQ | ||
33 | beq 2000f | ||
34 | |||
35 | @@ try the interrupt offset register, since it is there | 29 | @@ try the interrupt offset register, since it is there |
36 | 30 | ||
31 | ldr \irqstat, [ \base, #INTPND ] | ||
32 | teq \irqstat, #0 | ||
33 | beq 1002f | ||
37 | ldr \irqnr, [ \base, #INTOFFSET ] | 34 | ldr \irqnr, [ \base, #INTOFFSET ] |
38 | mov \tmp, #1 | 35 | mov \tmp, #1 |
39 | tst \irqstat, \tmp, lsl \irqnr | 36 | tst \irqstat, \tmp, lsl \irqnr |
40 | addne \irqnr, \irqnr, #IRQ_EINT0 | ||
41 | bne 1001f | 37 | bne 1001f |
42 | 38 | ||
43 | @@ the number specified is not a valid irq, so try | 39 | @@ the number specified is not a valid irq, so try |
44 | @@ and work it out for ourselves | 40 | @@ and work it out for ourselves |
45 | 41 | ||
46 | mov \irqnr, #IRQ_EINT0 @@ start here | 42 | mov \irqnr, #0 @@ start here |
47 | b 3000f | ||
48 | |||
49 | 2000: | ||
50 | @@ load the GPIO interrupt register, and check it | ||
51 | |||
52 | add \tmp, \base, #S3C24XX_VA_GPIO - S3C24XX_VA_IRQ | ||
53 | ldr \irqstat, [ \tmp, # EXTINTPEND ] | ||
54 | ldr \irqnr, [ \tmp, # EXTINTMASK ] | ||
55 | bics \irqstat, \irqstat, \irqnr | ||
56 | beq 1001f | ||
57 | |||
58 | mov \irqnr, #(IRQ_EINT4 - 4) | ||
59 | 43 | ||
60 | @@ work out which irq (if any) we got | 44 | @@ work out which irq (if any) we got |
61 | 3000: | 45 | |
62 | movs \tmp, \irqstat, lsl#16 | 46 | movs \tmp, \irqstat, lsl#16 |
63 | addeq \irqnr, \irqnr, #16 | 47 | addeq \irqnr, \irqnr, #16 |
64 | moveq \irqstat, \irqstat, lsr#16 | 48 | moveq \irqstat, \irqstat, lsr#16 |
@@ -75,9 +59,9 @@ | |||
75 | addeq \irqnr, \irqnr, #1 | 59 | addeq \irqnr, \irqnr, #1 |
76 | 60 | ||
77 | @@ we have the value | 61 | @@ we have the value |
78 | movs \irqnr, \irqnr | ||
79 | |||
80 | 1001: | 62 | 1001: |
63 | adds \irqnr, \irqnr, #IRQ_EINT0 | ||
64 | 1002: | ||
81 | @@ exit here, Z flag unset if IRQ | 65 | @@ exit here, Z flag unset if IRQ |
82 | 66 | ||
83 | .endm | 67 | .endm |
diff --git a/include/asm-arm/arch-s3c2410/regs-irq.h b/include/asm-arm/arch-s3c2410/regs-irq.h index 24b7292df79e..572fca5d9acf 100644 --- a/include/asm-arm/arch-s3c2410/regs-irq.h +++ b/include/asm-arm/arch-s3c2410/regs-irq.h | |||
@@ -23,6 +23,7 @@ | |||
23 | 23 | ||
24 | #define S3C2410_IRQREG(x) ((x) + S3C24XX_VA_IRQ) | 24 | #define S3C2410_IRQREG(x) ((x) + S3C24XX_VA_IRQ) |
25 | #define S3C2410_EINTREG(x) ((x) + S3C24XX_VA_GPIO) | 25 | #define S3C2410_EINTREG(x) ((x) + S3C24XX_VA_GPIO) |
26 | #define S3C24XX_EINTREG(x) ((x) + S3C24XX_VA_GPIO2) | ||
26 | 27 | ||
27 | #define S3C2410_SRCPND S3C2410_IRQREG(0x000) | 28 | #define S3C2410_SRCPND S3C2410_IRQREG(0x000) |
28 | #define S3C2410_INTMOD S3C2410_IRQREG(0x004) | 29 | #define S3C2410_INTMOD S3C2410_IRQREG(0x004) |
@@ -40,5 +41,10 @@ | |||
40 | 41 | ||
41 | #define S3C2410_EINTMASK S3C2410_EINTREG(0x0A4) | 42 | #define S3C2410_EINTMASK S3C2410_EINTREG(0x0A4) |
42 | #define S3C2410_EINTPEND S3C2410_EINTREG(0X0A8) | 43 | #define S3C2410_EINTPEND S3C2410_EINTREG(0X0A8) |
44 | #define S3C2412_EINTMASK S3C2410_EINTREG(0x0B4) | ||
45 | #define S3C2412_EINTPEND S3C2410_EINTREG(0X0B8) | ||
46 | |||
47 | #define S3C24XX_EINTMASK S3C24XX_EINTREG(0x0A4) | ||
48 | #define S3C24XX_EINTPEND S3C24XX_EINTREG(0X0A8) | ||
43 | 49 | ||
44 | #endif /* ___ASM_ARCH_REGS_IRQ_H */ | 50 | #endif /* ___ASM_ARCH_REGS_IRQ_H */ |