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-rw-r--r--include/asm-arm/arch-s3c2410/regs-iis.h10
-rw-r--r--include/asm-arm/arch-s3c2410/regs-mem.h8
-rw-r--r--include/asm-arm/arch-s3c2410/regs-spi.h2
-rw-r--r--include/asm-arm/arch-s3c2410/uncompress.h6
-rw-r--r--include/asm-arm/arch-s3c2410/vmalloc.h12
5 files changed, 25 insertions, 13 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-iis.h b/include/asm-arm/arch-s3c2410/regs-iis.h
index 7ae8e1f45bc1..385b07d510da 100644
--- a/include/asm-arm/arch-s3c2410/regs-iis.h
+++ b/include/asm-arm/arch-s3c2410/regs-iis.h
@@ -14,6 +14,7 @@
14 * 26-06-2003 BJD Finished off definitions for register addresses 14 * 26-06-2003 BJD Finished off definitions for register addresses
15 * 12-03-2004 BJD Updated include protection 15 * 12-03-2004 BJD Updated include protection
16 * 07-03-2005 BJD Added FIFO size flags and S3C2440 MPLL 16 * 07-03-2005 BJD Added FIFO size flags and S3C2440 MPLL
17 * 05-04-2005 LCVR Added IISFCON definitions for the S3C2400
17 */ 18 */
18 19
19#ifndef __ASM_ARCH_REGS_IIS_H 20#ifndef __ASM_ARCH_REGS_IIS_H
@@ -68,5 +69,14 @@
68#define S3C2410_IISFCON_RXMASK (0x3f) 69#define S3C2410_IISFCON_RXMASK (0x3f)
69#define S3C2410_IISFCON_RXSHIFT (0) 70#define S3C2410_IISFCON_RXSHIFT (0)
70 71
72#define S3C2400_IISFCON_TXDMA (1<<11)
73#define S3C2400_IISFCON_RXDMA (1<<10)
74#define S3C2400_IISFCON_TXENABLE (1<<9)
75#define S3C2400_IISFCON_RXENABLE (1<<8)
76#define S3C2400_IISFCON_TXMASK (0x07 << 4)
77#define S3C2400_IISFCON_TXSHIFT (4)
78#define S3C2400_IISFCON_RXMASK (0x07)
79#define S3C2400_IISFCON_RXSHIFT (0)
80
71#define S3C2410_IISFIFO (0x10) 81#define S3C2410_IISFIFO (0x10)
72#endif /* __ASM_ARCH_REGS_IIS_H */ 82#endif /* __ASM_ARCH_REGS_IIS_H */
diff --git a/include/asm-arm/arch-s3c2410/regs-mem.h b/include/asm-arm/arch-s3c2410/regs-mem.h
index 1a1328ac0d79..a2d7d0cec042 100644
--- a/include/asm-arm/arch-s3c2410/regs-mem.h
+++ b/include/asm-arm/arch-s3c2410/regs-mem.h
@@ -12,6 +12,7 @@
12 * Changelog: 12 * Changelog:
13 * 29-Sep-2004 BJD Initial include for Linux 13 * 29-Sep-2004 BJD Initial include for Linux
14 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA 14 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
15 * 04-Apr-2005 LCVR Added S3C2400 DRAM/BANKSIZE_MASK definitions
15 * 16 *
16*/ 17*/
17 18
@@ -183,6 +184,12 @@
183#define S3C2410_REFRESH_TRP_3clk (1<<20) 184#define S3C2410_REFRESH_TRP_3clk (1<<20)
184#define S3C2410_REFRESH_TRP_4clk (2<<20) 185#define S3C2410_REFRESH_TRP_4clk (2<<20)
185 186
187#define S3C2400_REFRESH_DRAM_TRP_MASK (3<<20)
188#define S3C2400_REFRESH_DRAM_TRP_1_5clk (0<<20)
189#define S3C2400_REFRESH_DRAM_TRP_2_5clk (1<<20)
190#define S3C2400_REFRESH_DRAM_TRP_3_5clk (2<<20)
191#define S3C2400_REFRESH_DRAM_TRP_4_5clk (3<<20)
192
186#define S3C2410_REFRESH_TSRC_MASK (3<<18) 193#define S3C2410_REFRESH_TSRC_MASK (3<<18)
187#define S3C2410_REFRESH_TSRC_4clk (0<<18) 194#define S3C2410_REFRESH_TSRC_4clk (0<<18)
188#define S3C2410_REFRESH_TSRC_5clk (1<<18) 195#define S3C2410_REFRESH_TSRC_5clk (1<<18)
@@ -205,6 +212,7 @@
205#define S3C2410_BANKSIZE_4M (0x5 << 0) 212#define S3C2410_BANKSIZE_4M (0x5 << 0)
206#define S3C2410_BANKSIZE_2M (0x4 << 0) 213#define S3C2410_BANKSIZE_2M (0x4 << 0)
207#define S3C2410_BANKSIZE_MASK (0x7 << 0) 214#define S3C2410_BANKSIZE_MASK (0x7 << 0)
215#define S3C2400_BANKSIZE_MASK (0x4 << 0)
208#define S3C2410_BANKSIZE_SCLK_EN (1<<4) 216#define S3C2410_BANKSIZE_SCLK_EN (1<<4)
209#define S3C2410_BANKSIZE_SCKE_EN (1<<5) 217#define S3C2410_BANKSIZE_SCKE_EN (1<<5)
210#define S3C2410_BANKSIZE_BURST (1<<7) 218#define S3C2410_BANKSIZE_BURST (1<<7)
diff --git a/include/asm-arm/arch-s3c2410/regs-spi.h b/include/asm-arm/arch-s3c2410/regs-spi.h
index cb502a88158b..338217858c73 100644
--- a/include/asm-arm/arch-s3c2410/regs-spi.h
+++ b/include/asm-arm/arch-s3c2410/regs-spi.h
@@ -12,6 +12,7 @@
12 * 20-04-2004 KF Created file 12 * 20-04-2004 KF Created file
13 * 04-10-2004 BJD Removed VA address (no longer mapped) 13 * 04-10-2004 BJD Removed VA address (no longer mapped)
14 * tidied file for submission 14 * tidied file for submission
15 * 03-04-2005 LCVR Added S3C2400_SPPIN_nCS definition
15 */ 16 */
16 17
17#ifndef __ASM_ARCH_REGS_SPI_H 18#ifndef __ASM_ARCH_REGS_SPI_H
@@ -46,6 +47,7 @@
46 47
47#define S3C2410_SPPIN_ENMUL (1<<2) /* Multi Master Error detect */ 48#define S3C2410_SPPIN_ENMUL (1<<2) /* Multi Master Error detect */
48#define S3C2410_SPPIN_RESERVED (1<<1) 49#define S3C2410_SPPIN_RESERVED (1<<1)
50#define S3C2400_SPPIN_nCS (1<<1) /* SPI Card Select */
49#define S3C2410_SPPIN_KEEP (1<<0) /* Master Out keep */ 51#define S3C2410_SPPIN_KEEP (1<<0) /* Master Out keep */
50 52
51 53
diff --git a/include/asm-arm/arch-s3c2410/uncompress.h b/include/asm-arm/arch-s3c2410/uncompress.h
index ad4252e27799..d7a4a8354fa9 100644
--- a/include/asm-arm/arch-s3c2410/uncompress.h
+++ b/include/asm-arm/arch-s3c2410/uncompress.h
@@ -16,6 +16,7 @@
16 * 12-Oct-2004 BJD Take account of debug uart configuration 16 * 12-Oct-2004 BJD Take account of debug uart configuration
17 * 15-Nov-2004 BJD Fixed uart configuration 17 * 15-Nov-2004 BJD Fixed uart configuration
18 * 22-Feb-2005 BJD Added watchdog to uncompress 18 * 22-Feb-2005 BJD Added watchdog to uncompress
19 * 04-Apr-2005 LCVR Added support to S3C2400 (no cpuid at GSTATUS1)
19*/ 20*/
20 21
21#ifndef __ASM_ARCH_UNCOMPRESS_H 22#ifndef __ASM_ARCH_UNCOMPRESS_H
@@ -69,9 +70,12 @@ uart_rd(unsigned int reg)
69static void 70static void
70putc(char ch) 71putc(char ch)
71{ 72{
72 int cpuid = *((volatile unsigned int *)S3C2410_GSTATUS1); 73 int cpuid = S3C2410_GSTATUS1_2410;
73 74
75#ifndef CONFIG_CPU_S3C2400
76 cpuid = *((volatile unsigned int *)S3C2410_GSTATUS1);
74 cpuid &= S3C2410_GSTATUS1_IDMASK; 77 cpuid &= S3C2410_GSTATUS1_IDMASK;
78#endif
75 79
76 if (ch == '\n') 80 if (ch == '\n')
77 putc('\r'); /* expand newline to \r\n */ 81 putc('\r'); /* expand newline to \r\n */
diff --git a/include/asm-arm/arch-s3c2410/vmalloc.h b/include/asm-arm/arch-s3c2410/vmalloc.h
index 5fe72ad70904..33963cd5461b 100644
--- a/include/asm-arm/arch-s3c2410/vmalloc.h
+++ b/include/asm-arm/arch-s3c2410/vmalloc.h
@@ -19,18 +19,6 @@
19#ifndef __ASM_ARCH_VMALLOC_H 19#ifndef __ASM_ARCH_VMALLOC_H
20#define __ASM_ARCH_VMALLOC_H 20#define __ASM_ARCH_VMALLOC_H
21 21
22/*
23 * Just any arbitrary offset to the start of the vmalloc VM area: the
24 * current 8MB value just means that there will be a 8MB "hole" after the
25 * physical memory until the kernel virtual memory starts. That means that
26 * any out-of-bounds memory accesses will hopefully be caught.
27 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
28 * area for the same reason. ;)
29 */
30
31#define VMALLOC_OFFSET (8*1024*1024)
32#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
33#define VMALLOC_VMADDR(x) ((unsigned long)(x))
34#define VMALLOC_END (0xE0000000) 22#define VMALLOC_END (0xE0000000)
35 23
36#endif /* __ASM_ARCH_VMALLOC_H */ 24#endif /* __ASM_ARCH_VMALLOC_H */