2 files changed, 86 insertions, 0 deletions

diff --git a/include/asm-arm/arch-s3c2410/fb.h b/include/asm-arm/arch-s3c2410/fb.h
new file mode 100644
index 000000000000..ac57bc887d82
--- /dev/null
+++ b/include/asm-arm/arch-s3c2410/fb.h
@@ -0,0 +1,69 @@
+/* linux/include/asm/arch-s3c2410/fb.h
+ *
+ * Copyright (c) 2004 Arnaud Patard <arnaud.patard@rtp-net.org>
+ *
+ * Inspired by pxafb.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *
+ *  Changelog:
+ *      07-Sep-2004     RTP     Created file
+ *      03-Nov-2004     BJD     Updated and minor cleanups
+ *      03-Aug-2005     RTP     Renamed to fb.h
+*/
+
+#ifndef __ASM_ARM_FB_H
+#define __ASM_ARM_FB_H
+
+#include <asm/arch/regs-lcd.h>
+
+struct s3c2410fb_val {
+        unsigned int    defval;
+        unsigned int    min;
+        unsigned int    max;
+};
+
+struct s3c2410fb_hw {
+        unsigned long   lcdcon1;
+        unsigned long   lcdcon2;
+        unsigned long   lcdcon3;
+        unsigned long   lcdcon4;
+        unsigned long   lcdcon5;
+};
+
+struct s3c2410fb_mach_info {
+        unsigned char   fixed_syncs;    /* do not update sync/border */
+
+        /* Screen size */
+        int             width;
+        int             height;
+
+        /* Screen info */
+        struct s3c2410fb_val xres;
+        struct s3c2410fb_val yres;
+        struct s3c2410fb_val bpp;
+
+        /* lcd configuration registers */
+        struct s3c2410fb_hw  regs;
+
+        /* GPIOs */
+
+        unsigned long   gpcup;
+        unsigned long   gpcup_mask;
+        unsigned long   gpccon;
+        unsigned long   gpccon_mask;
+        unsigned long   gpdup;
+        unsigned long   gpdup_mask;
+        unsigned long   gpdcon;
+        unsigned long   gpdcon_mask;
+
+        /* lpc3600 control register */
+        unsigned long   lpcsel;
+};
+
+void __init set_s3c2410fb_info(struct s3c2410fb_mach_info *hard_s3c2410fb_info);
+
+#endif /* __ASM_ARM_FB_H */
diff --git a/include/asm-arm/arch-s3c2410/regs-lcd.h b/include/asm-arm/arch-s3c2410/regs-lcd.h
index 7f882ea92b2a..b6b1b4e8bbeb 100644
--- a/include/asm-arm/arch-s3c2410/regs-lcd.h
+++ b/include/asm-arm/arch-s3c2410/regs-lcd.h
@@ -51,21 +51,32 @@
 
 #define S3C2410_LCDCON1_ENVID      (1)
 
+#define S3C2410_LCDCON1_MODEMASK    0x1E
+
 #define S3C2410_LCDCON2_VBPD(x)     ((x) << 24)
 #define S3C2410_LCDCON2_LINEVAL(x)  ((x) << 14)
 #define S3C2410_LCDCON2_VFPD(x)     ((x) << 6)
 #define S3C2410_LCDCON2_VSPW(x)     ((x) << 0)
 
+#define S3C2410_LCDCON2_GET_VBPD(x) ( ((x) >> 24) & 0xFF)
+#define S3C2410_LCDCON2_GET_VFPD(x) ( ((x) >>  6) & 0xFF)
+#define S3C2410_LCDCON2_GET_VSPW(x) ( ((x) >>  0) & 0x3F)
+
 #define S3C2410_LCDCON3_HBPD(x)     ((x) << 19)
 #define S3C2410_LCDCON3_WDLY(x)     ((x) << 19)
 #define S3C2410_LCDCON3_HOZVAL(x)   ((x) << 8)
 #define S3C2410_LCDCON3_HFPD(x)     ((x) << 0)
 #define S3C2410_LCDCON3_LINEBLANK(x)((x) << 0)
 
+#define S3C2410_LCDCON3_GET_HBPD(x) ( ((x) >> 19) & 0x7F)
+#define S3C2410_LCDCON3_GET_HFPD(x) ( ((x) >>  0) & 0xFF)
+
 #define S3C2410_LCDCON4_MVAL(x)     ((x) << 8)
 #define S3C2410_LCDCON4_HSPW(x)     ((x) << 0)
 #define S3C2410_LCDCON4_WLH(x)      ((x) << 0)
 
+#define S3C2410_LCDCON4_GET_HSPW(x) ( ((x) >>  0) & 0xFF)
+
 #define S3C2410_LCDCON5_BPP24BL     (1<<12)
 #define S3C2410_LCDCON5_FRM565      (1<<11)
 #define S3C2410_LCDCON5_INVVCLK     (1<<10)
@@ -100,10 +111,16 @@
 #define S3C2410_DITHMODE   S3C2410_LCDREG(0x4C)
 #define S3C2410_TPAL       S3C2410_LCDREG(0x50)
 
+#define S3C2410_TPAL_EN         (1<<24)
+
 /* interrupt info */
 #define S3C2410_LCDINTPND  S3C2410_LCDREG(0x54)
 #define S3C2410_LCDSRCPND  S3C2410_LCDREG(0x58)
 #define S3C2410_LCDINTMSK  S3C2410_LCDREG(0x5C)
+#define S3C2410_LCDINT_FIWSEL   (1<<2)
+#define S3C2410_LCDINT_FRSYNC   (1<<1)
+#define S3C2410_LCDINT_FICNT    (1<<0)
+
 #define S3C2410_LPCSEL     S3C2410_LCDREG(0x60)
 
 #define S3C2410_TFTPAL(x)  S3C2410_LCDREG((0x400 + (x)*4))