diff options
Diffstat (limited to 'include/asm-arm/arch-s3c2410/uncompress.h')
-rw-r--r-- | include/asm-arm/arch-s3c2410/uncompress.h | 158 |
1 files changed, 158 insertions, 0 deletions
diff --git a/include/asm-arm/arch-s3c2410/uncompress.h b/include/asm-arm/arch-s3c2410/uncompress.h new file mode 100644 index 000000000000..ad4252e27799 --- /dev/null +++ b/include/asm-arm/arch-s3c2410/uncompress.h | |||
@@ -0,0 +1,158 @@ | |||
1 | /* linux/include/asm-arm/arch-s3c2410/uncompress.h | ||
2 | * | ||
3 | * (c) 2003 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S3C2410 - uncompress code | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | * Changelog: | ||
13 | * 22-May-2003 BJD Created | ||
14 | * 08-Sep-2003 BJD Moved to linux v2.6 | ||
15 | * 12-Mar-2004 BJD Updated header protection | ||
16 | * 12-Oct-2004 BJD Take account of debug uart configuration | ||
17 | * 15-Nov-2004 BJD Fixed uart configuration | ||
18 | * 22-Feb-2005 BJD Added watchdog to uncompress | ||
19 | */ | ||
20 | |||
21 | #ifndef __ASM_ARCH_UNCOMPRESS_H | ||
22 | #define __ASM_ARCH_UNCOMPRESS_H | ||
23 | |||
24 | #include <linux/config.h> | ||
25 | |||
26 | /* defines for UART registers */ | ||
27 | #include "asm/arch/regs-serial.h" | ||
28 | #include "asm/arch/regs-gpio.h" | ||
29 | #include "asm/arch/regs-watchdog.h" | ||
30 | |||
31 | #include <asm/arch/map.h> | ||
32 | |||
33 | /* working in physical space... */ | ||
34 | #undef S3C2410_GPIOREG | ||
35 | #undef S3C2410_WDOGREG | ||
36 | |||
37 | #define S3C2410_GPIOREG(x) ((S3C2410_PA_GPIO + (x))) | ||
38 | #define S3C2410_WDOGREG(x) ((S3C2410_PA_WATCHDOG + (x))) | ||
39 | |||
40 | /* how many bytes we allow into the FIFO at a time in FIFO mode */ | ||
41 | #define FIFO_MAX (14) | ||
42 | |||
43 | #define uart_base S3C2410_PA_UART + (0x4000*CONFIG_S3C2410_LOWLEVEL_UART_PORT) | ||
44 | |||
45 | static __inline__ void | ||
46 | uart_wr(unsigned int reg, unsigned int val) | ||
47 | { | ||
48 | volatile unsigned int *ptr; | ||
49 | |||
50 | ptr = (volatile unsigned int *)(reg + uart_base); | ||
51 | *ptr = val; | ||
52 | } | ||
53 | |||
54 | static __inline__ unsigned int | ||
55 | uart_rd(unsigned int reg) | ||
56 | { | ||
57 | volatile unsigned int *ptr; | ||
58 | |||
59 | ptr = (volatile unsigned int *)(reg + uart_base); | ||
60 | return *ptr; | ||
61 | } | ||
62 | |||
63 | |||
64 | /* we can deal with the case the UARTs are being run | ||
65 | * in FIFO mode, so that we don't hold up our execution | ||
66 | * waiting for tx to happen... | ||
67 | */ | ||
68 | |||
69 | static void | ||
70 | putc(char ch) | ||
71 | { | ||
72 | int cpuid = *((volatile unsigned int *)S3C2410_GSTATUS1); | ||
73 | |||
74 | cpuid &= S3C2410_GSTATUS1_IDMASK; | ||
75 | |||
76 | if (ch == '\n') | ||
77 | putc('\r'); /* expand newline to \r\n */ | ||
78 | |||
79 | if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) { | ||
80 | int level; | ||
81 | |||
82 | while (1) { | ||
83 | level = uart_rd(S3C2410_UFSTAT); | ||
84 | |||
85 | if (cpuid == S3C2410_GSTATUS1_2440) { | ||
86 | level &= S3C2440_UFSTAT_TXMASK; | ||
87 | level >>= S3C2440_UFSTAT_TXSHIFT; | ||
88 | } else { | ||
89 | level &= S3C2410_UFSTAT_TXMASK; | ||
90 | level >>= S3C2410_UFSTAT_TXSHIFT; | ||
91 | } | ||
92 | |||
93 | if (level < FIFO_MAX) | ||
94 | break; | ||
95 | } | ||
96 | |||
97 | } else { | ||
98 | /* not using fifos */ | ||
99 | |||
100 | while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE); | ||
101 | } | ||
102 | |||
103 | /* write byte to transmission register */ | ||
104 | uart_wr(S3C2410_UTXH, ch); | ||
105 | } | ||
106 | |||
107 | static void | ||
108 | putstr(const char *ptr) | ||
109 | { | ||
110 | for (; *ptr != '\0'; ptr++) { | ||
111 | putc(*ptr); | ||
112 | } | ||
113 | } | ||
114 | |||
115 | /* CONFIG_S3C2410_BOOT_WATCHDOG | ||
116 | * | ||
117 | * Simple boot-time watchdog setup, to reboot the system if there is | ||
118 | * any problem with the boot process | ||
119 | */ | ||
120 | |||
121 | #ifdef CONFIG_S3C2410_BOOT_WATCHDOG | ||
122 | |||
123 | #define WDOG_COUNT (0xff00) | ||
124 | |||
125 | #define __raw_writel(d,ad) do { *((volatile unsigned int *)(ad)) = (d); } while(0) | ||
126 | |||
127 | static inline void arch_decomp_wdog(void) | ||
128 | { | ||
129 | __raw_writel(WDOG_COUNT, S3C2410_WTCNT); | ||
130 | } | ||
131 | |||
132 | static void arch_decomp_wdog_start(void) | ||
133 | { | ||
134 | __raw_writel(WDOG_COUNT, S3C2410_WTDAT); | ||
135 | __raw_writel(WDOG_COUNT, S3C2410_WTCNT); | ||
136 | __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON); | ||
137 | } | ||
138 | |||
139 | #else | ||
140 | #define arch_decomp_wdog_start() | ||
141 | #define arch_decomp_wdog() | ||
142 | #endif | ||
143 | |||
144 | static void error(char *err); | ||
145 | |||
146 | static void | ||
147 | arch_decomp_setup(void) | ||
148 | { | ||
149 | /* we may need to setup the uart(s) here if we are not running | ||
150 | * on an BAST... the BAST will have left the uarts configured | ||
151 | * after calling linux. | ||
152 | */ | ||
153 | |||
154 | arch_decomp_wdog_start(); | ||
155 | } | ||
156 | |||
157 | |||
158 | #endif /* __ASM_ARCH_UNCOMPRESS_H */ | ||