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Diffstat (limited to 'include/asm-arm/arch-s3c2410/uncompress.h')
-rw-r--r--include/asm-arm/arch-s3c2410/uncompress.h15
1 files changed, 4 insertions, 11 deletions
diff --git a/include/asm-arm/arch-s3c2410/uncompress.h b/include/asm-arm/arch-s3c2410/uncompress.h
index 4367ec054b51..a6f6a0e44afa 100644
--- a/include/asm-arm/arch-s3c2410/uncompress.h
+++ b/include/asm-arm/arch-s3c2410/uncompress.h
@@ -67,8 +67,7 @@ uart_rd(unsigned int reg)
67 * waiting for tx to happen... 67 * waiting for tx to happen...
68*/ 68*/
69 69
70static void 70static void putc(int ch)
71putc(char ch)
72{ 71{
73 int cpuid = S3C2410_GSTATUS1_2410; 72 int cpuid = S3C2410_GSTATUS1_2410;
74 73
@@ -77,9 +76,6 @@ putc(char ch)
77 cpuid &= S3C2410_GSTATUS1_IDMASK; 76 cpuid &= S3C2410_GSTATUS1_IDMASK;
78#endif 77#endif
79 78
80 if (ch == '\n')
81 putc('\r'); /* expand newline to \r\n */
82
83 if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) { 79 if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
84 int level; 80 int level;
85 81
@@ -101,19 +97,16 @@ putc(char ch)
101 } else { 97 } else {
102 /* not using fifos */ 98 /* not using fifos */
103 99
104 while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE); 100 while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE)
101 barrier();
105 } 102 }
106 103
107 /* write byte to transmission register */ 104 /* write byte to transmission register */
108 uart_wr(S3C2410_UTXH, ch); 105 uart_wr(S3C2410_UTXH, ch);
109} 106}
110 107
111static void 108static inline void flush(void)
112putstr(const char *ptr)
113{ 109{
114 for (; *ptr != '\0'; ptr++) {
115 putc(*ptr);
116 }
117} 110}
118 111
119#define __raw_writel(d,ad) do { *((volatile unsigned int *)(ad)) = (d); } while(0) 112#define __raw_writel(d,ad) do { *((volatile unsigned int *)(ad)) = (d); } while(0)