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Diffstat (limited to 'include/asm-arm/arch-s3c2410/regs-watchdog.h')
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diff --git a/include/asm-arm/arch-s3c2410/regs-watchdog.h b/include/asm-arm/arch-s3c2410/regs-watchdog.h
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1/* linux/include/asm/arch-s3c2410/regs0watchdog.h
2 *
3 * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
4 * http://www.simtec.co.uk/products/SWLINUX/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * S3C2410 Watchdog timer control
11 *
12 * Changelog:
13 * 21-06-2003 BJD Created file
14 * 12-03-2004 BJD Updated include protection
15 * 10-03-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
16*/
17
18
19#ifndef __ASM_ARCH_REGS_WATCHDOG_H
20#define __ASM_ARCH_REGS_WATCHDOG_H "$Id: watchdog.h,v 1.2 2003/04/29 13:31:09 ben Exp $"
21
22#define S3C2410_WDOGREG(x) ((x) + S3C24XX_VA_WATCHDOG)
23
24#define S3C2410_WTCON S3C2410_WDOGREG(0x00)
25#define S3C2410_WTDAT S3C2410_WDOGREG(0x04)
26#define S3C2410_WTCNT S3C2410_WDOGREG(0x08)
27
28/* the watchdog can either generate a reset pulse, or an
29 * interrupt.
30 */
31
32#define S3C2410_WTCON_RSTEN (0x01)
33#define S3C2410_WTCON_INTEN (1<<2)
34#define S3C2410_WTCON_ENABLE (1<<5)
35
36#define S3C2410_WTCON_DIV16 (0<<3)
37#define S3C2410_WTCON_DIV32 (1<<3)
38#define S3C2410_WTCON_DIV64 (2<<3)
39#define S3C2410_WTCON_DIV128 (3<<3)
40
41#define S3C2410_WTCON_PRESCALE(x) ((x) << 8)
42#define S3C2410_WTCON_PRESCALE_MASK (0xff00)
43
44#endif /* __ASM_ARCH_REGS_WATCHDOG_H */
45
46