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Diffstat (limited to 'include/asm-arm/arch-s3c2410/regs-iis.h')
-rw-r--r--include/asm-arm/arch-s3c2410/regs-iis.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-iis.h b/include/asm-arm/arch-s3c2410/regs-iis.h
index 7ae8e1f45bc1..385b07d510da 100644
--- a/include/asm-arm/arch-s3c2410/regs-iis.h
+++ b/include/asm-arm/arch-s3c2410/regs-iis.h
@@ -14,6 +14,7 @@
14 * 26-06-2003 BJD Finished off definitions for register addresses 14 * 26-06-2003 BJD Finished off definitions for register addresses
15 * 12-03-2004 BJD Updated include protection 15 * 12-03-2004 BJD Updated include protection
16 * 07-03-2005 BJD Added FIFO size flags and S3C2440 MPLL 16 * 07-03-2005 BJD Added FIFO size flags and S3C2440 MPLL
17 * 05-04-2005 LCVR Added IISFCON definitions for the S3C2400
17 */ 18 */
18 19
19#ifndef __ASM_ARCH_REGS_IIS_H 20#ifndef __ASM_ARCH_REGS_IIS_H
@@ -68,5 +69,14 @@
68#define S3C2410_IISFCON_RXMASK (0x3f) 69#define S3C2410_IISFCON_RXMASK (0x3f)
69#define S3C2410_IISFCON_RXSHIFT (0) 70#define S3C2410_IISFCON_RXSHIFT (0)
70 71
72#define S3C2400_IISFCON_TXDMA (1<<11)
73#define S3C2400_IISFCON_RXDMA (1<<10)
74#define S3C2400_IISFCON_TXENABLE (1<<9)
75#define S3C2400_IISFCON_RXENABLE (1<<8)
76#define S3C2400_IISFCON_TXMASK (0x07 << 4)
77#define S3C2400_IISFCON_TXSHIFT (4)
78#define S3C2400_IISFCON_RXMASK (0x07)
79#define S3C2400_IISFCON_RXSHIFT (0)
80
71#define S3C2410_IISFIFO (0x10) 81#define S3C2410_IISFIFO (0x10)
72#endif /* __ASM_ARCH_REGS_IIS_H */ 82#endif /* __ASM_ARCH_REGS_IIS_H */