diff options
Diffstat (limited to 'include/asm-arm/arch-s3c2410/regs-clock.h')
-rw-r--r-- | include/asm-arm/arch-s3c2410/regs-clock.h | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-clock.h b/include/asm-arm/arch-s3c2410/regs-clock.h index 16f4c3cc1388..66794b13e185 100644 --- a/include/asm-arm/arch-s3c2410/regs-clock.h +++ b/include/asm-arm/arch-s3c2410/regs-clock.h | |||
@@ -18,7 +18,8 @@ | |||
18 | * 10-Feb-2005 Ben Dooks Fixed CAMDIVN address (Guillaume Gourat) | 18 | * 10-Feb-2005 Ben Dooks Fixed CAMDIVN address (Guillaume Gourat) |
19 | * 10-Mar-2005 Lucas Villa Real Changed S3C2410_VA to S3C24XX_VA | 19 | * 10-Mar-2005 Lucas Villa Real Changed S3C2410_VA to S3C24XX_VA |
20 | * 27-Aug-2005 Ben Dooks Add clock-slow info | 20 | * 27-Aug-2005 Ben Dooks Add clock-slow info |
21 | */ | 21 | * 20-Oct-2005 Ben Dooks Fixed overflow in PLL (Guillaume Gourat) |
22 | */ | ||
22 | 23 | ||
23 | #ifndef __ASM_ARM_REGS_CLOCK | 24 | #ifndef __ASM_ARM_REGS_CLOCK |
24 | #define __ASM_ARM_REGS_CLOCK "$Id: clock.h,v 1.4 2003/04/30 14:50:51 ben Exp $" | 25 | #define __ASM_ARM_REGS_CLOCK "$Id: clock.h,v 1.4 2003/04/30 14:50:51 ben Exp $" |
@@ -83,10 +84,13 @@ | |||
83 | 84 | ||
84 | #ifndef __ASSEMBLY__ | 85 | #ifndef __ASSEMBLY__ |
85 | 86 | ||
87 | #include <asm/div64.h> | ||
88 | |||
86 | static inline unsigned int | 89 | static inline unsigned int |
87 | s3c2410_get_pll(int pllval, int baseclk) | 90 | s3c2410_get_pll(unsigned int pllval, unsigned int baseclk) |
88 | { | 91 | { |
89 | int mdiv, pdiv, sdiv; | 92 | unsigned int mdiv, pdiv, sdiv; |
93 | uint64_t fvco; | ||
90 | 94 | ||
91 | mdiv = pllval >> S3C2410_PLLCON_MDIVSHIFT; | 95 | mdiv = pllval >> S3C2410_PLLCON_MDIVSHIFT; |
92 | pdiv = pllval >> S3C2410_PLLCON_PDIVSHIFT; | 96 | pdiv = pllval >> S3C2410_PLLCON_PDIVSHIFT; |
@@ -96,7 +100,10 @@ s3c2410_get_pll(int pllval, int baseclk) | |||
96 | pdiv &= S3C2410_PLLCON_PDIVMASK; | 100 | pdiv &= S3C2410_PLLCON_PDIVMASK; |
97 | sdiv &= S3C2410_PLLCON_SDIVMASK; | 101 | sdiv &= S3C2410_PLLCON_SDIVMASK; |
98 | 102 | ||
99 | return (baseclk * (mdiv + 8)) / ((pdiv + 2) << sdiv); | 103 | fvco = (uint64_t)baseclk * (mdiv + 8); |
104 | do_div(fvco, (pdiv + 2) << sdiv); | ||
105 | |||
106 | return (unsigned int)fvco; | ||
100 | } | 107 | } |
101 | 108 | ||
102 | #endif /* __ASSEMBLY__ */ | 109 | #endif /* __ASSEMBLY__ */ |