diff options
Diffstat (limited to 'include/asm-arm/arch-s3c2410/entry-macro.S')
-rw-r--r-- | include/asm-arm/arch-s3c2410/entry-macro.S | 78 |
1 files changed, 0 insertions, 78 deletions
diff --git a/include/asm-arm/arch-s3c2410/entry-macro.S b/include/asm-arm/arch-s3c2410/entry-macro.S deleted file mode 100644 index f70d051b267b..000000000000 --- a/include/asm-arm/arch-s3c2410/entry-macro.S +++ /dev/null | |||
@@ -1,78 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-arm/arch-s3c2410/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for S3C2410-based platforms | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | /* We have a problem that the INTOFFSET register does not always | ||
12 | * show one interrupt. Occasionally we get two interrupts through | ||
13 | * the prioritiser, and this causes the INTOFFSET register to show | ||
14 | * what looks like the logical-or of the two interrupt numbers. | ||
15 | * | ||
16 | * Thanks to Klaus, Shannon, et al for helping to debug this problem | ||
17 | */ | ||
18 | |||
19 | #define INTPND (0x10) | ||
20 | #define INTOFFSET (0x14) | ||
21 | |||
22 | #include <asm/arch/hardware.h> | ||
23 | #include <asm/irq.h> | ||
24 | |||
25 | .macro get_irqnr_preamble, base, tmp | ||
26 | .endm | ||
27 | |||
28 | .macro arch_ret_to_user, tmp1, tmp2 | ||
29 | .endm | ||
30 | |||
31 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
32 | |||
33 | mov \base, #S3C24XX_VA_IRQ | ||
34 | |||
35 | @@ try the interrupt offset register, since it is there | ||
36 | |||
37 | ldr \irqstat, [ \base, #INTPND ] | ||
38 | teq \irqstat, #0 | ||
39 | beq 1002f | ||
40 | ldr \irqnr, [ \base, #INTOFFSET ] | ||
41 | mov \tmp, #1 | ||
42 | tst \irqstat, \tmp, lsl \irqnr | ||
43 | bne 1001f | ||
44 | |||
45 | @@ the number specified is not a valid irq, so try | ||
46 | @@ and work it out for ourselves | ||
47 | |||
48 | mov \irqnr, #0 @@ start here | ||
49 | |||
50 | @@ work out which irq (if any) we got | ||
51 | |||
52 | movs \tmp, \irqstat, lsl#16 | ||
53 | addeq \irqnr, \irqnr, #16 | ||
54 | moveq \irqstat, \irqstat, lsr#16 | ||
55 | tst \irqstat, #0xff | ||
56 | addeq \irqnr, \irqnr, #8 | ||
57 | moveq \irqstat, \irqstat, lsr#8 | ||
58 | tst \irqstat, #0xf | ||
59 | addeq \irqnr, \irqnr, #4 | ||
60 | moveq \irqstat, \irqstat, lsr#4 | ||
61 | tst \irqstat, #0x3 | ||
62 | addeq \irqnr, \irqnr, #2 | ||
63 | moveq \irqstat, \irqstat, lsr#2 | ||
64 | tst \irqstat, #0x1 | ||
65 | addeq \irqnr, \irqnr, #1 | ||
66 | |||
67 | @@ we have the value | ||
68 | 1001: | ||
69 | adds \irqnr, \irqnr, #IRQ_EINT0 | ||
70 | 1002: | ||
71 | @@ exit here, Z flag unset if IRQ | ||
72 | |||
73 | .endm | ||
74 | |||
75 | /* currently don't need an disable_fiq macro */ | ||
76 | |||
77 | .macro disable_fiq | ||
78 | .endm | ||