1 files changed, 119 insertions, 0 deletions
diff --git a/include/asm-arm/arch-s3c2410/entry-macro.S b/include/asm-arm/arch-s3c2410/entry-macro.S
new file mode 100644
index 000000000000..b7d4d7f4422d
--- /dev/null
+++ b/include/asm-arm/arch-s3c2410/entry-macro.S
@@ -0,0 +1,119 @@
+/*
+ * include/asm-arm/arch-s3c2410/entry-macro.S
+ *
+ * Low-level IRQ helper macros for S3C2410-based platforms
+ *
+ * This file is licensed under  the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ * Modifications:
+ *     10-Mar-2005 LCVR  Changed S3C2410_VA to S3C24XX_VA
+ */
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+                mov     \tmp, #S3C24XX_VA_IRQ
+                ldr     \irqnr, [ \tmp, #0x14 ]         @ get irq no
+30000:
+                teq     \irqnr, #4
+                teqne   \irqnr, #5
+                beq     1002f                           @ external irq reg
+                @ debug check to see if interrupt reported is the same
+                @ as the offset....
+                teq     \irqnr, #0
+                beq     20002f
+                ldr     \irqstat, [ \tmp, #0x10 ]       @ INTPND
+                mov     \irqstat, \irqstat, lsr \irqnr
+                tst     \irqstat, #1
+                bne     20002f
+                /* debug/warning if we get an invalud response from the
+                 * INTOFFSET register */
+#if 1
+                stmfd   r13!, { r0 - r4 , r8-r12, r14 }
+                ldr     r1,     [ \tmp, #0x14 ]         @ INTOFFSET
+                ldr     r2,     [ \tmp, #0x10 ]         @ INTPND
+                ldr     r3,     [ \tmp, #0x00 ]         @ SRCPND
+                adr     r0, 20003f
+                bl      printk
+                b       20004f
+20003:
+                .ascii  "<7>irq: err - bad offset %d, intpnd=%08x, srcpnd=%08x\n"
+                .byte   0
+                .align  4
+20004:
+                mov     r1, #1
+                mov     \tmp, #S3C24XX_VA_IRQ
+                ldmfd   r13!, { r0 - r4 , r8-r12, r14 }
+#endif
+                @ try working out interrupt number for ourselves
+                mov     \irqnr, #0
+                ldr     \irqstat, [ \tmp, #0x10 ]       @ INTPND
+10021:
+                movs    \irqstat, \irqstat, lsr#1
+                bcs     30000b          @ try and re-start the proccess
+                add     \irqnr, \irqnr, #1
+                cmp     \irqnr, #32
+                ble     10021b
+                @ found no interrupt, set Z flag and leave
+                movs    \irqnr, #0
+                b       1001f
+20005:
+20002:          @ exit
+                @ we base the s3c2410x interrupts at 16 and above to allow
+                @ isa peripherals to have their standard interrupts, also
+                @ ensure that Z flag is un-set on exit
+                @ note, we cannot be sure if we get IRQ_EINT0 (0) that
+                @ there is simply no interrupt pending, so in all other
+                @ cases we jump to say we have found something, otherwise
+                @ we check to see if the interrupt really is assrted
+                adds    \irqnr, \irqnr, #IRQ_EINT0
+                teq     \irqnr, #IRQ_EINT0
+                bne     1001f                           @ exit
+                ldr     \irqstat, [ \tmp, #0x10 ]       @ INTPND
+                teq     \irqstat, #0
+                moveq   \irqnr, #0
+                b       1001f
+                @ we get here from no main or external interrupts pending
+1002:
+                add     \tmp, \tmp, #S3C24XX_VA_GPIO - S3C24XX_VA_IRQ
+                ldr     \irqstat, [ \tmp, # 0xa8 ]      @ EXTINTPEND
+                ldr     \irqnr, [ \tmp, # 0xa4 ]        @ EXTINTMASK
+                bic     \irqstat, \irqstat, \irqnr      @ clear masked irqs
+                mov     \irqnr, #IRQ_EINT4              @ start extint nos
+                mov     \irqstat, \irqstat, lsr#4       @ ignore bottom 4 bits
+10021:
+                movs    \irqstat, \irqstat, lsr#1
+                bcs     1004f
+                add     \irqnr, \irqnr, #1
+                cmp     \irqnr, #IRQ_EINT23
+                ble     10021b
+                @ found no interrupt, set Z flag and leave
+                movs    \irqnr, #0
+1004:           @ ensure Z flag clear in case our MOVS shifted out the last bit
+                teq     \irqnr, #0
+1001:
+                @ exit irq routine
+                .endm
+                /* currently don't need an disable_fiq macro */
+                .macro  disable_fiq
+                .endm

diff --git a/include/asm-arm/arch-s3c2410/entry-macro.S b/include/asm-arm/arch-s3c2410/entry-macro.S new file mode 100644 index 000000000000..b7d4d7f4422d --- /dev/null +++ b/include/asm-arm/arch-s3c2410/entry-macro.S
@@ -0,0 +1,119 @@
	1	/*
	2	* include/asm-arm/arch-s3c2410/entry-macro.S
	3	*
	4	* Low-level IRQ helper macros for S3C2410-based platforms
	5	*
	6	* This file is licensed under the terms of the GNU General Public
	7	* License version 2. This program is licensed "as is" without any
	8	* warranty of any kind, whether express or implied.
	9
	10	* Modifications:
	11	* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
	12	*/
	13
	14
	15	.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
	16
	17	mov \tmp, #S3C24XX_VA_IRQ
	18	ldr \irqnr, [ \tmp, #0x14 ] @ get irq no
	19	30000:
	20	teq \irqnr, #4
	21	teqne \irqnr, #5
	22	beq 1002f @ external irq reg
	23
	24	@ debug check to see if interrupt reported is the same
	25	@ as the offset....
	26
	27	teq \irqnr, #0
	28	beq 20002f
	29	ldr \irqstat, [ \tmp, #0x10 ] @ INTPND
	30	mov \irqstat, \irqstat, lsr \irqnr
	31	tst \irqstat, #1
	32	bne 20002f
	33
	34	/* debug/warning if we get an invalud response from the
	35	* INTOFFSET register */
	36	#if 1
	37	stmfd r13!, { r0 - r4 , r8-r12, r14 }
	38	ldr r1, [ \tmp, #0x14 ] @ INTOFFSET
	39	ldr r2, [ \tmp, #0x10 ] @ INTPND
	40	ldr r3, [ \tmp, #0x00 ] @ SRCPND
	41	adr r0, 20003f
	42	bl printk
	43	b 20004f
	44
	45	20003:
	46	.ascii "<7>irq: err - bad offset %d, intpnd=%08x, srcpnd=%08x\n"
	47	.byte 0
	48	.align 4
	49	20004:
	50	mov r1, #1
	51	mov \tmp, #S3C24XX_VA_IRQ
	52	ldmfd r13!, { r0 - r4 , r8-r12, r14 }
	53	#endif
	54
	55	@ try working out interrupt number for ourselves
	56	mov \irqnr, #0
	57	ldr \irqstat, [ \tmp, #0x10 ] @ INTPND
	58	10021:
	59	movs \irqstat, \irqstat, lsr#1
	60	bcs 30000b @ try and re-start the proccess
	61	add \irqnr, \irqnr, #1
	62	cmp \irqnr, #32
	63	ble 10021b
	64
	65	@ found no interrupt, set Z flag and leave
	66	movs \irqnr, #0
	67	b 1001f
	68
	69	20005:
	70	20002: @ exit
	71	@ we base the s3c2410x interrupts at 16 and above to allow
	72	@ isa peripherals to have their standard interrupts, also
	73	@ ensure that Z flag is un-set on exit
	74
	75	@ note, we cannot be sure if we get IRQ_EINT0 (0) that
	76	@ there is simply no interrupt pending, so in all other
	77	@ cases we jump to say we have found something, otherwise
	78	@ we check to see if the interrupt really is assrted
	79	adds \irqnr, \irqnr, #IRQ_EINT0
	80	teq \irqnr, #IRQ_EINT0
	81	bne 1001f @ exit
	82	ldr \irqstat, [ \tmp, #0x10 ] @ INTPND
	83	teq \irqstat, #0
	84	moveq \irqnr, #0
	85	b 1001f
	86
	87	@ we get here from no main or external interrupts pending
	88	1002:
	89	add \tmp, \tmp, #S3C24XX_VA_GPIO - S3C24XX_VA_IRQ
	90	ldr \irqstat, [ \tmp, # 0xa8 ] @ EXTINTPEND
	91	ldr \irqnr, [ \tmp, # 0xa4 ] @ EXTINTMASK
	92
	93	bic \irqstat, \irqstat, \irqnr @ clear masked irqs
	94
	95	mov \irqnr, #IRQ_EINT4 @ start extint nos
	96	mov \irqstat, \irqstat, lsr#4 @ ignore bottom 4 bits
	97	10021:
	98	movs \irqstat, \irqstat, lsr#1
	99	bcs 1004f
	100	add \irqnr, \irqnr, #1
	101	cmp \irqnr, #IRQ_EINT23
	102	ble 10021b
	103
	104	@ found no interrupt, set Z flag and leave
	105	movs \irqnr, #0
	106
	107	1004: @ ensure Z flag clear in case our MOVS shifted out the last bit
	108	teq \irqnr, #0
	109	1001:
	110	@ exit irq routine
	111	.endm
	112
	113
	114	/* currently don't need an disable_fiq macro */
	115
	116	.macro disable_fiq
	117	.endm
	118
	119