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-rw-r--r--include/asm-arm/arch-realview/platform.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/include/asm-arm/arch-realview/platform.h b/include/asm-arm/arch-realview/platform.h
index 18d7c18b738c..6e0eab95a3a2 100644
--- a/include/asm-arm/arch-realview/platform.h
+++ b/include/asm-arm/arch-realview/platform.h
@@ -207,11 +207,25 @@
207#define REALVIEW_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */ 207#define REALVIEW_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
208#define REALVIEW_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */ 208#define REALVIEW_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
209#else 209#else
210#ifdef CONFIG_REALVIEW_MPCORE_REVB
210#define REALVIEW_MPCORE_SCU_BASE 0x10100000 /* SCU registers */ 211#define REALVIEW_MPCORE_SCU_BASE 0x10100000 /* SCU registers */
211#define REALVIEW_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */ 212#define REALVIEW_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
212#define REALVIEW_TWD_BASE 0x10100700 213#define REALVIEW_TWD_BASE 0x10100700
213#define REALVIEW_TWD_SIZE 0x00000100 214#define REALVIEW_TWD_SIZE 0x00000100
214#define REALVIEW_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */ 215#define REALVIEW_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
216#define REALVIEW_MPCORE_L220_BASE 0x10102000 /* L220 registers */
217#define REALVIEW_MPCORE_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
218#else
219#define REALVIEW_MPCORE_SCU_BASE 0x1F000000 /* SCU registers */
220#define REALVIEW_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */
221#define REALVIEW_TWD_BASE 0x1F000700
222#define REALVIEW_TWD_SIZE 0x00000100
223#define REALVIEW_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */
224#define REALVIEW_MPCORE_L220_BASE 0x1F002000 /* L220 registers */
225#define REALVIEW_MPCORE_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
226#endif
227#define REALVIEW_GIC1_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
228#define REALVIEW_GIC1_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
215#endif 229#endif
216#define REALVIEW_SMC_BASE 0x10080000 /* SMC */ 230#define REALVIEW_SMC_BASE 0x10080000 /* SMC */
217 /* Reserved 0x10090000 - 0x100EFFFF */ 231 /* Reserved 0x10090000 - 0x100EFFFF */
@@ -306,7 +320,11 @@
306#define INT_USB 29 /* USB controller */ 320#define INT_USB 29 /* USB controller */
307#define INT_TSPENINT 30 /* Touchscreen pen */ 321#define INT_TSPENINT 30 /* Touchscreen pen */
308#define INT_TSKPADINT 31 /* Touchscreen keypad */ 322#define INT_TSKPADINT 31 /* Touchscreen keypad */
323
309#else 324#else
325
326#define MAX_GIC_NR 2
327
310#define INT_AACI 0 328#define INT_AACI 0
311#define INT_TIMERINT0_1 1 329#define INT_TIMERINT0_1 1
312#define INT_TIMERINT2_3 2 330#define INT_TIMERINT2_3 2