diff options
Diffstat (limited to 'include/asm-arm/arch-realview/irqs.h')
-rw-r--r-- | include/asm-arm/arch-realview/irqs.h | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/include/asm-arm/arch-realview/irqs.h b/include/asm-arm/arch-realview/irqs.h index c16223c9588d..5a5db56f86b8 100644 --- a/include/asm-arm/arch-realview/irqs.h +++ b/include/asm-arm/arch-realview/irqs.h | |||
@@ -65,6 +65,21 @@ | |||
65 | #define IRQ_AACI (IRQ_GIC_START + INT_AACI) | 65 | #define IRQ_AACI (IRQ_GIC_START + INT_AACI) |
66 | #define IRQ_ETH (IRQ_GIC_START + INT_ETH) | 66 | #define IRQ_ETH (IRQ_GIC_START + INT_ETH) |
67 | #define IRQ_USB (IRQ_GIC_START + INT_USB) | 67 | #define IRQ_USB (IRQ_GIC_START + INT_USB) |
68 | #define IRQ_PMU_CPU0 (IRQ_GIC_START + INT_PMU_CPU0) | ||
69 | #define IRQ_PMU_CPU1 (IRQ_GIC_START + INT_PMU_CPU1) | ||
70 | #define IRQ_PMU_CPU2 (IRQ_GIC_START + INT_PMU_CPU2) | ||
71 | #define IRQ_PMU_CPU3 (IRQ_GIC_START + INT_PMU_CPU3) | ||
72 | #define IRQ_PMU_SCU0 (IRQ_GIC_START + INT_PMU_SCU0) | ||
73 | #define IRQ_PMU_SCU1 (IRQ_GIC_START + INT_PMU_SCU1) | ||
74 | #define IRQ_PMU_SCU2 (IRQ_GIC_START + INT_PMU_SCU2) | ||
75 | #define IRQ_PMU_SCU3 (IRQ_GIC_START + INT_PMU_SCU3) | ||
76 | #define IRQ_PMU_SCU4 (IRQ_GIC_START + INT_PMU_SCU4) | ||
77 | #define IRQ_PMU_SCU5 (IRQ_GIC_START + INT_PMU_SCU5) | ||
78 | #define IRQ_PMU_SCU6 (IRQ_GIC_START + INT_PMU_SCU6) | ||
79 | #define IRQ_PMU_SCU7 (IRQ_GIC_START + INT_PMU_SCU7) | ||
80 | |||
81 | #define IRQ_EB_IRQ1 (IRQ_GIC_START + INT_EB_IRQ1) | ||
82 | #define IRQ_EB_IRQ2 (IRQ_GIC_START + INT_EB_IRQ2) | ||
68 | 83 | ||
69 | #define IRQMASK_WDOGINT INTMASK_WDOGINT | 84 | #define IRQMASK_WDOGINT INTMASK_WDOGINT |
70 | #define IRQMASK_SOFTINT INTMASK_SOFTINT | 85 | #define IRQMASK_SOFTINT INTMASK_SOFTINT |
@@ -103,4 +118,4 @@ | |||
103 | #define IRQMASK_ETH INTMASK_ETH | 118 | #define IRQMASK_ETH INTMASK_ETH |
104 | #define IRQMASK_USB INTMASK_USB | 119 | #define IRQMASK_USB INTMASK_USB |
105 | 120 | ||
106 | #define NR_IRQS (IRQ_GIC_START + 64) | 121 | #define NR_IRQS (IRQ_GIC_START + 96) |