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-rw-r--r--include/asm-arm/arch-realview/irqs.h105
1 files changed, 10 insertions, 95 deletions
diff --git a/include/asm-arm/arch-realview/irqs.h b/include/asm-arm/arch-realview/irqs.h
index 5a5db56f86b8..ad0c911002fc 100644
--- a/include/asm-arm/arch-realview/irqs.h
+++ b/include/asm-arm/arch-realview/irqs.h
@@ -19,103 +19,18 @@
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21 21
22#include <asm/arch/platform.h> 22#ifndef __ASM_ARCH_IRQS_H
23#define __ASM_ARCH_IRQS_H
23 24
24#define IRQ_LOCALTIMER 29 25#include <asm/arch/board-eb.h>
25#define IRQ_LOCALWDOG 30
26 26
27/* 27#define IRQ_LOCALTIMER 29
28 * IRQ interrupts definitions are the same the INT definitions 28#define IRQ_LOCALWDOG 30
29 * held within platform.h
30 */
31#define IRQ_GIC_START 32
32#define IRQ_WDOGINT (IRQ_GIC_START + INT_WDOGINT)
33#define IRQ_SOFTINT (IRQ_GIC_START + INT_SOFTINT)
34#define IRQ_COMMRx (IRQ_GIC_START + INT_COMMRx)
35#define IRQ_COMMTx (IRQ_GIC_START + INT_COMMTx)
36#define IRQ_TIMERINT0_1 (IRQ_GIC_START + INT_TIMERINT0_1)
37#define IRQ_TIMERINT2_3 (IRQ_GIC_START + INT_TIMERINT2_3)
38#define IRQ_GPIOINT0 (IRQ_GIC_START + INT_GPIOINT0)
39#define IRQ_GPIOINT1 (IRQ_GIC_START + INT_GPIOINT1)
40#define IRQ_GPIOINT2 (IRQ_GIC_START + INT_GPIOINT2)
41#define IRQ_GPIOINT3 (IRQ_GIC_START + INT_GPIOINT3)
42#define IRQ_RTCINT (IRQ_GIC_START + INT_RTCINT)
43#define IRQ_SSPINT (IRQ_GIC_START + INT_SSPINT)
44#define IRQ_UARTINT0 (IRQ_GIC_START + INT_UARTINT0)
45#define IRQ_UARTINT1 (IRQ_GIC_START + INT_UARTINT1)
46#define IRQ_UARTINT2 (IRQ_GIC_START + INT_UARTINT2)
47#define IRQ_UART3 (IRQ_GIC_START + INT_UARTINT3)
48#define IRQ_SCIINT (IRQ_GIC_START + INT_SCIINT)
49#define IRQ_CLCDINT (IRQ_GIC_START + INT_CLCDINT)
50#define IRQ_DMAINT (IRQ_GIC_START + INT_DMAINT)
51#define IRQ_PWRFAILINT (IRQ_GIC_START + INT_PWRFAILINT)
52#define IRQ_MBXINT (IRQ_GIC_START + INT_MBXINT)
53#define IRQ_GNDINT (IRQ_GIC_START + INT_GNDINT)
54#define IRQ_MMCI0B (IRQ_GIC_START + INT_MMCI0B)
55#define IRQ_MMCI1B (IRQ_GIC_START + INT_MMCI1B)
56#define IRQ_KMI0 (IRQ_GIC_START + INT_KMI0)
57#define IRQ_KMI1 (IRQ_GIC_START + INT_KMI1)
58#define IRQ_SCI3 (IRQ_GIC_START + INT_SCI3)
59#define IRQ_CLCD (IRQ_GIC_START + INT_CLCD)
60#define IRQ_TOUCH (IRQ_GIC_START + INT_TOUCH)
61#define IRQ_KEYPAD (IRQ_GIC_START + INT_KEYPAD)
62#define IRQ_DoC (IRQ_GIC_START + INT_DoC)
63#define IRQ_MMCI0A (IRQ_GIC_START + INT_MMCI0A)
64#define IRQ_MMCI1A (IRQ_GIC_START + INT_MMCI1A)
65#define IRQ_AACI (IRQ_GIC_START + INT_AACI)
66#define IRQ_ETH (IRQ_GIC_START + INT_ETH)
67#define IRQ_USB (IRQ_GIC_START + INT_USB)
68#define IRQ_PMU_CPU0 (IRQ_GIC_START + INT_PMU_CPU0)
69#define IRQ_PMU_CPU1 (IRQ_GIC_START + INT_PMU_CPU1)
70#define IRQ_PMU_CPU2 (IRQ_GIC_START + INT_PMU_CPU2)
71#define IRQ_PMU_CPU3 (IRQ_GIC_START + INT_PMU_CPU3)
72#define IRQ_PMU_SCU0 (IRQ_GIC_START + INT_PMU_SCU0)
73#define IRQ_PMU_SCU1 (IRQ_GIC_START + INT_PMU_SCU1)
74#define IRQ_PMU_SCU2 (IRQ_GIC_START + INT_PMU_SCU2)
75#define IRQ_PMU_SCU3 (IRQ_GIC_START + INT_PMU_SCU3)
76#define IRQ_PMU_SCU4 (IRQ_GIC_START + INT_PMU_SCU4)
77#define IRQ_PMU_SCU5 (IRQ_GIC_START + INT_PMU_SCU5)
78#define IRQ_PMU_SCU6 (IRQ_GIC_START + INT_PMU_SCU6)
79#define IRQ_PMU_SCU7 (IRQ_GIC_START + INT_PMU_SCU7)
80 29
81#define IRQ_EB_IRQ1 (IRQ_GIC_START + INT_EB_IRQ1) 30#define IRQ_GIC_START 32
82#define IRQ_EB_IRQ2 (IRQ_GIC_START + INT_EB_IRQ2)
83 31
84#define IRQMASK_WDOGINT INTMASK_WDOGINT 32#ifndef NR_IRQS
85#define IRQMASK_SOFTINT INTMASK_SOFTINT 33#error "NR_IRQS not defined by the board-specific files"
86#define IRQMASK_COMMRx INTMASK_COMMRx 34#endif
87#define IRQMASK_COMMTx INTMASK_COMMTx
88#define IRQMASK_TIMERINT0_1 INTMASK_TIMERINT0_1
89#define IRQMASK_TIMERINT2_3 INTMASK_TIMERINT2_3
90#define IRQMASK_GPIOINT0 INTMASK_GPIOINT0
91#define IRQMASK_GPIOINT1 INTMASK_GPIOINT1
92#define IRQMASK_GPIOINT2 INTMASK_GPIOINT2
93#define IRQMASK_GPIOINT3 INTMASK_GPIOINT3
94#define IRQMASK_RTCINT INTMASK_RTCINT
95#define IRQMASK_SSPINT INTMASK_SSPINT
96#define IRQMASK_UARTINT0 INTMASK_UARTINT0
97#define IRQMASK_UARTINT1 INTMASK_UARTINT1
98#define IRQMASK_UARTINT2 INTMASK_UARTINT2
99#define IRQMASK_SCIINT INTMASK_SCIINT
100#define IRQMASK_CLCDINT INTMASK_CLCDINT
101#define IRQMASK_DMAINT INTMASK_DMAINT
102#define IRQMASK_PWRFAILINT INTMASK_PWRFAILINT
103#define IRQMASK_MBXINT INTMASK_MBXINT
104#define IRQMASK_GNDINT INTMASK_GNDINT
105#define IRQMASK_MMCI0B INTMASK_MMCI0B
106#define IRQMASK_MMCI1B INTMASK_MMCI1B
107#define IRQMASK_KMI0 INTMASK_KMI0
108#define IRQMASK_KMI1 INTMASK_KMI1
109#define IRQMASK_SCI3 INTMASK_SCI3
110#define IRQMASK_UART3 INTMASK_UART3
111#define IRQMASK_CLCD INTMASK_CLCD
112#define IRQMASK_TOUCH INTMASK_TOUCH
113#define IRQMASK_KEYPAD INTMASK_KEYPAD
114#define IRQMASK_DoC INTMASK_DoC
115#define IRQMASK_MMCI0A INTMASK_MMCI0A
116#define IRQMASK_MMCI1A INTMASK_MMCI1A
117#define IRQMASK_AACI INTMASK_AACI
118#define IRQMASK_ETH INTMASK_ETH
119#define IRQMASK_USB INTMASK_USB
120 35
121#define NR_IRQS (IRQ_GIC_START + 96) 36#endif