aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-arm/arch-realview/board-eb.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/asm-arm/arch-realview/board-eb.h')
-rw-r--r--include/asm-arm/arch-realview/board-eb.h191
1 files changed, 0 insertions, 191 deletions
diff --git a/include/asm-arm/arch-realview/board-eb.h b/include/asm-arm/arch-realview/board-eb.h
deleted file mode 100644
index 206f7a752882..000000000000
--- a/include/asm-arm/arch-realview/board-eb.h
+++ /dev/null
@@ -1,191 +0,0 @@
1/*
2 * include/asm-arm/arch-realview/board-eb.h
3 *
4 * Copyright (C) 2007 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __ASM_ARCH_BOARD_EB_H
22#define __ASM_ARCH_BOARD_EB_H
23
24#include <asm/arch/platform.h>
25
26/*
27 * RealView EB + ARM11MPCore peripheral addresses
28 */
29#define REALVIEW_EB_UART0_BASE 0x10009000 /* UART 0 */
30#define REALVIEW_EB_UART1_BASE 0x1000A000 /* UART 1 */
31#define REALVIEW_EB_UART2_BASE 0x1000B000 /* UART 2 */
32#define REALVIEW_EB_UART3_BASE 0x1000C000 /* UART 3 */
33#define REALVIEW_EB_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
34#define REALVIEW_EB_WATCHDOG_BASE 0x10010000 /* watchdog interface */
35#define REALVIEW_EB_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
36#define REALVIEW_EB_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
37#define REALVIEW_EB_GPIO0_BASE 0x10013000 /* GPIO port 0 */
38#define REALVIEW_EB_RTC_BASE 0x10017000 /* Real Time Clock */
39#define REALVIEW_EB_CLCD_BASE 0x10020000 /* CLCD */
40#define REALVIEW_EB_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
41#define REALVIEW_EB_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
42#define REALVIEW_EB_SMC_BASE 0x10080000 /* Static memory controller */
43
44#define REALVIEW_EB_FLASH_BASE 0x40000000
45#define REALVIEW_EB_FLASH_SIZE SZ_64M
46#define REALVIEW_EB_ETH_BASE 0x4E000000 /* Ethernet */
47#define REALVIEW_EB_USB_BASE 0x4F000000 /* USB */
48
49#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
50#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */
51#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
52#define REALVIEW_EB11MP_TWD_BASE 0x10100700
53#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
54#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
55#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */
56#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
57#else
58#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */
59#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */
60#define REALVIEW_EB11MP_TWD_BASE 0x1F000700
61#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
62#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */
63#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */
64#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
65#endif
66
67#define IRQ_EB_GIC_START 32
68
69/*
70 * RealView EB interrupt sources
71 */
72#define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */
73#define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */
74#define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */
75#define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */
76#define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */
77#define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */
78#define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */
79#define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */
80#define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */
81 /* 9 reserved */
82#define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */
83#define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */
84#define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */
85#define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */
86#define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */
87#define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */
88#define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */
89#define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */
90#define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */
91#define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */
92#define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */
93#define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */
94#define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */
95#define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */
96#define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */
97#define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */
98#define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */
99#define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */
100#define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */
101#define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */
102#define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */
103#define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */
104
105/*
106 * RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile)
107 */
108#define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0)
109#define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1)
110#define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2)
111#define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3)
112#define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4)
113#define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5)
114#define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6)
115#define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7)
116#define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8)
117#define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9)
118#define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */
119#define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */
120#define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */
121#define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */
122#define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14)
123#define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15)
124
125#define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17)
126#define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18)
127#define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19)
128#define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20)
129#define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21)
130#define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22)
131#define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23)
132#define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24)
133#define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25)
134#define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26)
135#define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27)
136#define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28)
137
138#define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29)
139#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30)
140#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31)
141
142#define IRQ_EB11MP_UART2 -1
143#define IRQ_EB11MP_UART3 -1
144#define IRQ_EB11MP_CLCD -1
145#define IRQ_EB11MP_DMA -1
146#define IRQ_EB11MP_WDOG -1
147#define IRQ_EB11MP_GPIO0 -1
148#define IRQ_EB11MP_GPIO1 -1
149#define IRQ_EB11MP_GPIO2 -1
150#define IRQ_EB11MP_SCI -1
151#define IRQ_EB11MP_SSP -1
152
153#define NR_GIC_EB11MP 2
154
155/*
156 * Only define NR_IRQS if less than NR_IRQS_EB
157 */
158#define NR_IRQS_EB (IRQ_EB_GIC_START + 96)
159
160#if defined(CONFIG_MACH_REALVIEW_EB) \
161 && (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))
162#undef NR_IRQS
163#define NR_IRQS NR_IRQS_EB
164#endif
165
166#if defined(CONFIG_REALVIEW_EB_ARM11MP) \
167 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
168#undef MAX_GIC_NR
169#define MAX_GIC_NR NR_GIC_EB11MP
170#endif
171
172/*
173 * Core tile identification (REALVIEW_SYS_PROCID)
174 */
175#define REALVIEW_EB_PROC_MASK 0xFF000000
176#define REALVIEW_EB_PROC_ARM7TDMI 0x00000000
177#define REALVIEW_EB_PROC_ARM9 0x02000000
178#define REALVIEW_EB_PROC_ARM11 0x04000000
179#define REALVIEW_EB_PROC_ARM11MP 0x06000000
180
181#define check_eb_proc(proc_type) \
182 ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \
183 == proc_type)
184
185#ifdef CONFIG_REALVIEW_EB_ARM11MP
186#define core_tile_eb11mp() check_eb_proc(REALVIEW_EB_PROC_ARM11MP)
187#else
188#define core_tile_eb11mp() 0
189#endif
190
191#endif /* __ASM_ARCH_BOARD_EB_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-15 07:32:07 -0500