aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-arm/arch-pxa
diff options
context:
space:
mode:
Diffstat (limited to 'include/asm-arm/arch-pxa')
-rw-r--r--include/asm-arm/arch-pxa/camera.h48
-rw-r--r--include/asm-arm/arch-pxa/gumstix.h96
-rw-r--r--include/asm-arm/arch-pxa/irda.h2
-rw-r--r--include/asm-arm/arch-pxa/irqs.h3
-rw-r--r--include/asm-arm/arch-pxa/magician.h57
-rw-r--r--include/asm-arm/arch-pxa/mfp-pxa25x.h161
-rw-r--r--include/asm-arm/arch-pxa/mfp-pxa27x.h432
-rw-r--r--include/asm-arm/arch-pxa/mfp-pxa2xx.h132
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h330
-rw-r--r--include/asm-arm/arch-pxa/pxa27x_keypad.h2
-rw-r--r--include/asm-arm/arch-pxa/pxa2xx-gpio.h357
-rw-r--r--include/asm-arm/arch-pxa/pxa3xx-regs.h9
-rw-r--r--include/asm-arm/arch-pxa/tosa.h40
-rw-r--r--include/asm-arm/arch-pxa/zylonite.h2
14 files changed, 1318 insertions, 353 deletions
diff --git a/include/asm-arm/arch-pxa/camera.h b/include/asm-arm/arch-pxa/camera.h
new file mode 100644
index 000000000000..39516ced8b1f
--- /dev/null
+++ b/include/asm-arm/arch-pxa/camera.h
@@ -0,0 +1,48 @@
1/*
2 camera.h - PXA camera driver header file
3
4 Copyright (C) 2003, Intel Corporation
5 Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20*/
21
22#ifndef __ASM_ARCH_CAMERA_H_
23#define __ASM_ARCH_CAMERA_H_
24
25#define PXA_CAMERA_MASTER 1
26#define PXA_CAMERA_DATAWIDTH_4 2
27#define PXA_CAMERA_DATAWIDTH_5 4
28#define PXA_CAMERA_DATAWIDTH_8 8
29#define PXA_CAMERA_DATAWIDTH_9 0x10
30#define PXA_CAMERA_DATAWIDTH_10 0x20
31#define PXA_CAMERA_PCLK_EN 0x40
32#define PXA_CAMERA_MCLK_EN 0x80
33#define PXA_CAMERA_PCP 0x100
34#define PXA_CAMERA_HSP 0x200
35#define PXA_CAMERA_VSP 0x400
36
37struct pxacamera_platform_data {
38 int (*init)(struct device *);
39 int (*power)(struct device *, int);
40 int (*reset)(struct device *, int);
41
42 unsigned long flags;
43 unsigned long mclk_10khz;
44};
45
46extern void pxa_set_camera_info(struct pxacamera_platform_data *);
47
48#endif /* __ASM_ARCH_CAMERA_H_ */
diff --git a/include/asm-arm/arch-pxa/gumstix.h b/include/asm-arm/arch-pxa/gumstix.h
new file mode 100644
index 000000000000..6fa85c4f94f8
--- /dev/null
+++ b/include/asm-arm/arch-pxa/gumstix.h
@@ -0,0 +1,96 @@
1/*
2 * linux/include/asm-arm/arch-pxa/gumstix.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9
10/* BTRESET - Reset line to Bluetooth module, active low signal. */
11#define GPIO_GUMSTIX_BTRESET 7
12#define GPIO_GUMSTIX_BTRESET_MD (GPIO_GUMSTIX_BTRESET | GPIO_OUT)
13
14
15/*
16GPIOn - Input from MAX823 (or equiv), normalizing USB +5V into a clean
17interrupt signal for determining cable presence. On the original gumstix,
18this is GPIO81, and GPIO83 needs to be defined as well. On the gumstix F,
19this moves to GPIO17 and GPIO37. */
20
21/* GPIOx - Connects to USB D+ and used as a pull-up after GPIOn
22has detected a cable insertion; driven low otherwise. */
23
24#ifdef CONFIG_ARCH_GUMSTIX_ORIG
25
26#define GPIO_GUMSTIX_USB_GPIOn 81
27#define GPIO_GUMSTIX_USB_GPIOx 83
28
29#else
30
31#define GPIO_GUMSTIX_USB_GPIOn 35
32#define GPIO_GUMSTIX_USB_GPIOx 41
33
34#endif
35
36/* usb state change */
37#define GUMSTIX_USB_INTR_IRQ IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn)
38
39#define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN)
40#define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT)
41#define GPIO_GUMSTIX_USB_GPIOx_DIS_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_IN)
42
43/*
44 * SD/MMC definitions
45 */
46#define GUMSTIX_GPIO_nSD_WP 22 /* SD Write Protect */
47#define GUMSTIX_GPIO_nSD_DETECT 11 /* MMC/SD Card Detect */
48#define GUMSTIX_IRQ_GPIO_nSD_DETECT IRQ_GPIO(GUMSTIX_GPIO_nSD_DETECT)
49
50/*
51 * SMC Ethernet definitions
52 * ETH_RST provides a hardware reset line to the ethernet chip
53 * ETH is the IRQ line in from the ethernet chip to the PXA
54 */
55#define GPIO_GUMSTIX_ETH0_RST 80
56#define GPIO_GUMSTIX_ETH0_RST_MD (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
57#define GPIO_GUMSTIX_ETH1_RST 52
58#define GPIO_GUMSTIX_ETH1_RST_MD (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
59
60#define GPIO_GUMSTIX_ETH0 36
61#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN)
62#define GUMSTIX_ETH0_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH0)
63#define GPIO_GUMSTIX_ETH1 27
64#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN)
65#define GUMSTIX_ETH1_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH1)
66
67
68/* CF reset line */
69#define GPIO8_RESET 8
70
71/* CF slot 0 */
72#define GPIO4_nBVD1 4
73#define GPIO4_nSTSCHG GPIO4_nBVD1
74#define GPIO11_nCD 11
75#define GPIO26_PRDY_nBSY 26
76#define GUMSTIX_S0_nSTSCHG_IRQ IRQ_GPIO(GPIO4_nSTSCHG)
77#define GUMSTIX_S0_nCD_IRQ IRQ_GPIO(GPIO11_nCD)
78#define GUMSTIX_S0_PRDY_nBSY_IRQ IRQ_GPIO(GPIO26_PRDY_nBSY)
79
80/* CF slot 1 */
81#define GPIO18_nBVD1 18
82#define GPIO18_nSTSCHG GPIO18_nBVD1
83#define GPIO36_nCD 36
84#define GPIO27_PRDY_nBSY 27
85#define GUMSTIX_S1_nSTSCHG_IRQ IRQ_GPIO(GPIO18_nSTSCHG)
86#define GUMSTIX_S1_nCD_IRQ IRQ_GPIO(GPIO36_nCD)
87#define GUMSTIX_S1_PRDY_nBSY_IRQ IRQ_GPIO(GPIO27_PRDY_nBSY)
88
89/* CF GPIO line modes */
90#define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN)
91#define GPIO8_RESET_MD (GPIO8_RESET | GPIO_OUT)
92#define GPIO11_nCD_MD (GPIO11_nCD | GPIO_IN)
93#define GPIO18_nSTSCHG_MD (GPIO18_nSTSCHG | GPIO_IN)
94#define GPIO26_PRDY_nBSY_MD (GPIO26_PRDY_nBSY | GPIO_IN)
95#define GPIO27_PRDY_nBSY_MD (GPIO27_PRDY_nBSY | GPIO_IN)
96#define GPIO36_nCD_MD (GPIO36_nCD | GPIO_IN)
diff --git a/include/asm-arm/arch-pxa/irda.h b/include/asm-arm/arch-pxa/irda.h
index 748406f384c2..99f4f423a8e1 100644
--- a/include/asm-arm/arch-pxa/irda.h
+++ b/include/asm-arm/arch-pxa/irda.h
@@ -10,6 +10,8 @@
10struct pxaficp_platform_data { 10struct pxaficp_platform_data {
11 int transceiver_cap; 11 int transceiver_cap;
12 void (*transceiver_mode)(struct device *dev, int mode); 12 void (*transceiver_mode)(struct device *dev, int mode);
13 int (*startup)(struct device *dev);
14 void (*shutdown)(struct device *dev);
13}; 15};
14 16
15extern void pxa_set_ficp_info(struct pxaficp_platform_data *info); 17extern void pxa_set_ficp_info(struct pxaficp_platform_data *info);
diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h
index c562b972a4a6..50c77eacbd5e 100644
--- a/include/asm-arm/arch-pxa/irqs.h
+++ b/include/asm-arm/arch-pxa/irqs.h
@@ -181,7 +181,8 @@
181#elif defined(CONFIG_ARCH_LUBBOCK) || \ 181#elif defined(CONFIG_ARCH_LUBBOCK) || \
182 defined(CONFIG_MACH_LOGICPD_PXA270) || \ 182 defined(CONFIG_MACH_LOGICPD_PXA270) || \
183 defined(CONFIG_MACH_MAINSTONE) || \ 183 defined(CONFIG_MACH_MAINSTONE) || \
184 defined(CONFIG_MACH_PCM027) 184 defined(CONFIG_MACH_PCM027) || \
185 defined(CONFIG_MACH_MAGICIAN)
185#define NR_IRQS (IRQ_BOARD_END) 186#define NR_IRQS (IRQ_BOARD_END)
186#else 187#else
187#define NR_IRQS (IRQ_BOARD_START) 188#define NR_IRQS (IRQ_BOARD_START)
diff --git a/include/asm-arm/arch-pxa/magician.h b/include/asm-arm/arch-pxa/magician.h
index 337f51f06b3a..b34fd5683e2d 100644
--- a/include/asm-arm/arch-pxa/magician.h
+++ b/include/asm-arm/arch-pxa/magician.h
@@ -12,7 +12,8 @@
12#ifndef _MAGICIAN_H_ 12#ifndef _MAGICIAN_H_
13#define _MAGICIAN_H_ 13#define _MAGICIAN_H_
14 14
15#include <asm/arch/pxa-regs.h> 15#include <asm/arch/irqs.h>
16#include <asm/arch/pxa2xx-gpio.h>
16 17
17/* 18/*
18 * PXA GPIOs 19 * PXA GPIOs
@@ -34,6 +35,7 @@
34#define GPIO48_MAGICIAN_UNKNOWN 48 35#define GPIO48_MAGICIAN_UNKNOWN 48
35#define GPIO56_MAGICIAN_UNKNOWN 56 36#define GPIO56_MAGICIAN_UNKNOWN 56
36#define GPIO57_MAGICIAN_CAM_RESET 57 37#define GPIO57_MAGICIAN_CAM_RESET 57
38#define GPIO75_MAGICIAN_SAMSUNG_POWER 75
37#define GPIO83_MAGICIAN_nIR_EN 83 39#define GPIO83_MAGICIAN_nIR_EN 83
38#define GPIO86_MAGICIAN_GSM_RESET 86 40#define GPIO86_MAGICIAN_GSM_RESET 86
39#define GPIO87_MAGICIAN_GSM_SELECT 87 41#define GPIO87_MAGICIAN_GSM_SELECT 87
@@ -81,6 +83,7 @@
81#define GPIO48_MAGICIAN_UNKNOWN_MD (48 | GPIO_OUT) 83#define GPIO48_MAGICIAN_UNKNOWN_MD (48 | GPIO_OUT)
82#define GPIO56_MAGICIAN_UNKNOWN_MD (56 | GPIO_OUT) 84#define GPIO56_MAGICIAN_UNKNOWN_MD (56 | GPIO_OUT)
83#define GPIO57_MAGICIAN_CAM_RESET_MD (57 | GPIO_OUT) 85#define GPIO57_MAGICIAN_CAM_RESET_MD (57 | GPIO_OUT)
86#define GPIO75_MAGICIAN_SAMSUNG_POWER_MD (75 | GPIO_OUT)
84#define GPIO83_MAGICIAN_nIR_EN_MD (83 | GPIO_OUT) 87#define GPIO83_MAGICIAN_nIR_EN_MD (83 | GPIO_OUT)
85#define GPIO86_MAGICIAN_GSM_RESET_MD (86 | GPIO_OUT) 88#define GPIO86_MAGICIAN_GSM_RESET_MD (86 | GPIO_OUT)
86#define GPIO87_MAGICIAN_GSM_SELECT_MD (87 | GPIO_OUT) 89#define GPIO87_MAGICIAN_GSM_SELECT_MD (87 | GPIO_OUT)
@@ -108,4 +111,56 @@
108#define GPIO119_MAGICIAN_UNKNOWN_MD (119 | GPIO_OUT) 111#define GPIO119_MAGICIAN_UNKNOWN_MD (119 | GPIO_OUT)
109#define GPIO120_MAGICIAN_UNKNOWN_MD (120 | GPIO_OUT) 112#define GPIO120_MAGICIAN_UNKNOWN_MD (120 | GPIO_OUT)
110 113
114/*
115 * CPLD IRQs
116 */
117
118#define IRQ_MAGICIAN_SD (IRQ_BOARD_START + 0)
119#define IRQ_MAGICIAN_EP (IRQ_BOARD_START + 1)
120#define IRQ_MAGICIAN_BT (IRQ_BOARD_START + 2)
121#define IRQ_MAGICIAN_AC (IRQ_BOARD_START + 3)
122
123/*
124 * CPLD EGPIOs
125 */
126
127#define MAGICIAN_EGPIO_BASE 0x80 /* GPIO_BOARD_START */
128#define MAGICIAN_EGPIO(reg,bit) \
129 (MAGICIAN_EGPIO_BASE + 8*reg + bit)
130
131/* output */
132
133#define EGPIO_MAGICIAN_TOPPOLY_POWER MAGICIAN_EGPIO(0, 2)
134#define EGPIO_MAGICIAN_LED_POWER MAGICIAN_EGPIO(0, 5)
135#define EGPIO_MAGICIAN_GSM_RESET MAGICIAN_EGPIO(0, 6)
136#define EGPIO_MAGICIAN_LCD_POWER MAGICIAN_EGPIO(0, 7)
137#define EGPIO_MAGICIAN_SPK_POWER MAGICIAN_EGPIO(1, 0)
138#define EGPIO_MAGICIAN_EP_POWER MAGICIAN_EGPIO(1, 1)
139#define EGPIO_MAGICIAN_IN_SEL0 MAGICIAN_EGPIO(1, 2)
140#define EGPIO_MAGICIAN_IN_SEL1 MAGICIAN_EGPIO(1, 3)
141#define EGPIO_MAGICIAN_MIC_POWER MAGICIAN_EGPIO(1, 4)
142#define EGPIO_MAGICIAN_CODEC_RESET MAGICIAN_EGPIO(1, 5)
143#define EGPIO_MAGICIAN_CODEC_POWER MAGICIAN_EGPIO(1, 6)
144#define EGPIO_MAGICIAN_BL_POWER MAGICIAN_EGPIO(1, 7)
145#define EGPIO_MAGICIAN_SD_POWER MAGICIAN_EGPIO(2, 0)
146#define EGPIO_MAGICIAN_CARKIT_MIC MAGICIAN_EGPIO(2, 1)
147#define EGPIO_MAGICIAN_UNKNOWN_WAVEDEV_DLL MAGICIAN_EGPIO(2, 2)
148#define EGPIO_MAGICIAN_FLASH_VPP MAGICIAN_EGPIO(2, 3)
149#define EGPIO_MAGICIAN_BL_POWER2 MAGICIAN_EGPIO(2, 4)
150#define EGPIO_MAGICIAN_CHARGE_EN MAGICIAN_EGPIO(2, 5)
151#define EGPIO_MAGICIAN_GSM_POWER MAGICIAN_EGPIO(2, 7)
152
153/* input */
154
155#define EGPIO_MAGICIAN_CABLE_STATE_AC MAGICIAN_EGPIO(4, 0)
156#define EGPIO_MAGICIAN_CABLE_STATE_USB MAGICIAN_EGPIO(4, 1)
157
158#define EGPIO_MAGICIAN_BOARD_ID0 MAGICIAN_EGPIO(5, 0)
159#define EGPIO_MAGICIAN_BOARD_ID1 MAGICIAN_EGPIO(5, 1)
160#define EGPIO_MAGICIAN_BOARD_ID2 MAGICIAN_EGPIO(5, 2)
161#define EGPIO_MAGICIAN_LCD_SELECT MAGICIAN_EGPIO(5, 3)
162#define EGPIO_MAGICIAN_nSD_READONLY MAGICIAN_EGPIO(5, 4)
163
164#define EGPIO_MAGICIAN_EP_INSERT MAGICIAN_EGPIO(6, 1)
165
111#endif /* _MAGICIAN_H_ */ 166#endif /* _MAGICIAN_H_ */
diff --git a/include/asm-arm/arch-pxa/mfp-pxa25x.h b/include/asm-arm/arch-pxa/mfp-pxa25x.h
new file mode 100644
index 000000000000..0499323010ba
--- /dev/null
+++ b/include/asm-arm/arch-pxa/mfp-pxa25x.h
@@ -0,0 +1,161 @@
1#ifndef __ASM_ARCH_MFP_PXA25X_H
2#define __ASM_ARCH_MFP_PXA25X_H
3
4#include <asm/arch/mfp.h>
5#include <asm/arch/mfp-pxa2xx.h>
6
7/* GPIO */
8#define GPIO2_GPIO MFP_CFG_IN(GPIO2, AF0)
9#define GPIO3_GPIO MFP_CFG_IN(GPIO3, AF0)
10#define GPIO4_GPIO MFP_CFG_IN(GPIO4, AF0)
11#define GPIO5_GPIO MFP_CFG_IN(GPIO5, AF0)
12#define GPIO6_GPIO MFP_CFG_IN(GPIO6, AF0)
13#define GPIO7_GPIO MFP_CFG_IN(GPIO7, AF0)
14#define GPIO8_GPIO MFP_CFG_IN(GPIO8, AF0)
15
16#define GPIO1_RST MFP_CFG_IN(GPIO1, AF1)
17
18/* Crystal and Clock Signals */
19#define GPIO10_RTCCLK MFP_CFG_OUT(GPIO10, AF1, DRIVE_LOW)
20#define GPIO70_RTC_CLK MFP_CFG_OUT(GPIO70, AF1, DRIVE_LOW)
21#define GPIO7_48MHz MFP_CFG_OUT(GPIO7, AF1, DRIVE_LOW)
22#define GPIO11_3_6MHz MFP_CFG_OUT(GPIO11, AF1, DRIVE_LOW)
23#define GPIO71_3_6MHz MFP_CFG_OUT(GPIO71, AF1, DRIVE_LOW)
24#define GPIO12_32KHz MFP_CFG_OUT(GPIO12, AF1, DRIVE_LOW)
25#define GPIO72_32kHz MFP_CFG_OUT(GPIO72, AF1, DRIVE_LOW)
26
27/* SDRAM and Static Memory I/O Signals */
28#define GPIO15_nCS_1 MFP_CFG_OUT(GPIO15, AF2, DRIVE_HIGH)
29#define GPIO78_nCS_2 MFP_CFG_OUT(GPIO78, AF2, DRIVE_HIGH)
30#define GPIO79_nCS_3 MFP_CFG_OUT(GPIO79, AF2, DRIVE_HIGH)
31#define GPIO80_nCS_4 MFP_CFG_OUT(GPIO80, AF2, DRIVE_HIGH)
32#define GPIO33_nCS_5 MFP_CFG_OUT(GPIO33, AF2, DRIVE_HIGH)
33
34/* Miscellaneous I/O and DMA Signals */
35#define GPIO18_RDY MFP_CFG_IN(GPIO18, AF1)
36#define GPIO20_DREQ_0 MFP_CFG_IN(GPIO20, AF1)
37#define GPIO19_DREQ_1 MFP_CFG_IN(GPIO19, AF1)
38
39/* Alternate Bus Master Mode I/O Signals */
40#define GPIO13_MBGNT MFP_CFG_OUT(GPIO13, AF2, DRIVE_LOW)
41#define GPIO73_MBGNT MFP_CFG_OUT(GPIO73, AF1, DRIVE_LOW)
42#define GPIO14_MBREQ MFP_CFG_IN(GPIO14, AF1)
43#define GPIO66_MBREQ MFP_CFG_IN(GPIO66, AF1)
44
45/* PC CARD */
46#define GPIO52_nPCE_1 MFP_CFG_OUT(GPIO52, AF2, DRIVE_HIGH)
47#define GPIO53_nPCE_2 MFP_CFG_OUT(GPIO53, AF2, DRIVE_HIGH)
48#define GPIO55_nPREG MFP_CFG_OUT(GPIO55, AF2, DRIVE_HIGH)
49#define GPIO50_nPIOR MFP_CFG_OUT(GPIO50, AF2, DRIVE_HIGH)
50#define GPIO51_nPIOW MFP_CFG_OUT(GPIO51, AF2, DRIVE_HIGH)
51#define GPIO49_nPWE MFP_CFG_OUT(GPIO49, AF2, DRIVE_HIGH)
52#define GPIO48_nPOE MFP_CFG_OUT(GPIO48, AF2, DRIVE_HIGH)
53#define GPIO57_nIOIS16 MFP_CFG_IN(GPIO57, AF1)
54#define GPIO56_nPWAIT MFP_CFG_IN(GPIO56, AF1)
55#define GPIO54_nPSKTSEL MFP_CFG_OUT(GPIO54, AF2, DRIVE_HIGH)
56
57/* FFUART */
58#define GPIO34_FFUART_RXD MFP_CFG_IN(GPIO34, AF1)
59#define GPIO35_FFUART_CTS MFP_CFG_IN(GPIO35, AF1)
60#define GPIO36_FFUART_DCD MFP_CFG_IN(GPIO36, AF1)
61#define GPIO37_FFUART_DSR MFP_CFG_IN(GPIO37, AF1)
62#define GPIO38_FFUART_RI MFP_CFG_IN(GPIO38, AF1)
63#define GPIO39_FFUART_TXD MFP_CFG_OUT(GPIO39, AF2, DRIVE_HIGH)
64#define GPIO40_FFUART_DTR MFP_CFG_OUT(GPIO40, AF2, DRIVE_HIGH)
65#define GPIO41_FFUART_RTS MFP_CFG_OUT(GPIO41, AF2, DRIVE_HIGH)
66
67/* BTUART */
68#define GPIO42_BTUART_RXD MFP_CFG_IN(GPIO42, AF1)
69#define GPIO43_BTUART_TXD MFP_CFG_OUT(GPIO43, AF2, DRIVE_HIGH)
70#define GPIO44_BTUART_CTS MFP_CFG_IN(GPIO44, AF1)
71#define GPIO45_BTUART_RTS MFP_CFG_OUT(GPIO45, AF2, DRIVE_HIGH)
72
73/* STUART */
74#define GPIO46_STUART_RXD MFP_CFG_IN(GPIO46, AF2)
75#define GPIO47_STUART_TXD MFP_CFG_OUT(GPIO47, AF1, DRIVE_HIGH)
76
77/* HWUART */
78#define GPIO42_HWUART_RXD MFP_CFG_IN(GPIO42, AF3)
79#define GPIO43_HWUART_TXD MFP_CFG_OUT(GPIO43, AF3, DRIVE_HIGH)
80#define GPIO44_HWUART_CTS MFP_CFG_IN(GPIO44, AF3)
81#define GPIO45_HWUART_RTS MFP_CFG_OUT(GPIO45, AF3, DRIVE_HIGH)
82#define GPIO48_HWUART_TXD MFP_CFG_OUT(GPIO48, AF1, DRIVE_HIGH)
83#define GPIO49_HWUART_RXD MFP_CFG_IN(GPIO49, AF1)
84#define GPIO50_HWUART_CTS MFP_CFG_IN(GPIO50, AF1)
85#define GPIO51_HWUART_RTS MFP_CFG_OUT(GPIO51, AF1, DRIVE_HIGH)
86
87/* FICP */
88#define GPIO46_FICP_RXD MFP_CFG_IN(GPIO46, AF1)
89#define GPIO47_FICP_TXD MFP_CFG_OUT(GPIO47, AF2, DRIVE_HIGH)
90
91/* PWM 0/1 */
92#define GPIO16_PWM0_OUT MFP_CFG_OUT(GPIO16, AF2, DRIVE_LOW)
93#define GPIO17_PWM1_OUT MFP_CFG_OUT(GPIO17, AF2, DRIVE_LOW)
94
95/* AC97 */
96#define GPIO28_AC97_BITCLK MFP_CFG_IN(GPIO28, AF1)
97#define GPIO29_AC97_SDATA_IN_0 MFP_CFG_IN(GPIO29, AF1)
98#define GPIO30_AC97_SDATA_OUT MFP_CFG_OUT(GPIO30, AF2, DRIVE_LOW)
99#define GPIO31_AC97_SYNC MFP_CFG_OUT(GPIO31, AF2, DRIVE_LOW)
100#define GPIO32_AC97_SDATA_IN_1 MFP_CFG_IN(GPIO32, AF1)
101
102/* I2S */
103#define GPIO28_I2S_BITCLK_IN MFP_CFG_IN(GPIO28, AF2)
104#define GPIO28_I2S_BITCLK_OUT MFP_CFG_OUT(GPIO28, AF1, DRIVE_LOW)
105#define GPIO29_I2S_SDATA_IN MFP_CFG_IN(GPIO29, AF2)
106#define GPIO30_I2S_SDATA_OUT MFP_CFG_OUT(GPIO30, AF1, DRIVE_LOW)
107#define GPIO31_I2S_SYNC MFP_CFG_OUT(GPIO31, AF1, DRIVE_LOW)
108#define GPIO32_I2S_SYSCLK MFP_CFG_OUT(GPIO32, AF1, DRIVE_LOW)
109
110/* SSP 1 */
111#define GPIO23_SSP1_SCLK MFP_CFG_OUT(GPIO23, AF2, DRIVE_LOW)
112#define GPIO24_SSP1_SFRM MFP_CFG_OUT(GPIO24, AF2, DRIVE_LOW)
113#define GPIO25_SSP1_TXD MFP_CFG_OUT(GPIO25, AF2, DRIVE_LOW)
114#define GPIO26_SSP1_RXD MFP_CFG_IN(GPIO26, AF1)
115#define GPIO27_SSP1_EXTCLK MFP_CFG_IN(GPIO27, AF1)
116
117/* SSP 2 - NSSP */
118#define GPIO81_SSP2_CLK_OUT MFP_CFG_OUT(GPIO81, AF1, DRIVE_LOW)
119#define GPIO81_SSP2_CLK_IN MFP_CFG_IN(GPIO81, AF1)
120#define GPIO82_SSP2_FRM_OUT MFP_CFG_OUT(GPIO82, AF1, DRIVE_LOW)
121#define GPIO82_SSP2_FRM_IN MFP_CFG_IN(GPIO82, AF1)
122#define GPIO83_SSP2_TXD MFP_CFG_OUT(GPIO83, AF1, DRIVE_LOW)
123#define GPIO83_SSP2_RXD MFP_CFG_IN(GPIO83, AF2)
124#define GPIO84_SSP2_TXD MFP_CFG_OUT(GPIO84, AF1, DRIVE_LOW)
125#define GPIO84_SSP2_RXD MFP_CFG_IN(GPIO84, AF2)
126
127/* MMC */
128#define GPIO6_MMC_CLK MFP_CFG_OUT(GPIO6, AF1, DRIVE_LOW)
129#define GPIO8_MMC_CS0 MFP_CFG_OUT(GPIO8, AF1, DRIVE_LOW)
130#define GPIO9_MMC_CS1 MFP_CFG_OUT(GPIO9, AF1, DRIVE_LOW)
131#define GPIO34_MMC_CS0 MFP_CFG_OUT(GPIO34, AF2, DRIVE_LOW)
132#define GPIO39_MMC_CS1 MFP_CFG_OUT(GPIO39, AF1, DRIVE_LOW)
133#define GPIO53_MMC_CLK MFP_CFG_OUT(GPIO53, AF1, DRIVE_LOW)
134#define GPIO54_MMC_CLK MFP_CFG_OUT(GPIO54, AF1, DRIVE_LOW)
135#define GPIO69_MMC_CLK MFP_CFG_OUT(GPIO69, AF1, DRIVE_LOW)
136#define GPIO67_MMC_CS0 MFP_CFG_OUT(GPIO67, AF1, DRIVE_LOW)
137#define GPIO68_MMC_CS1 MFP_CFG_OUT(GPIO68, AF1, DRIVE_LOW)
138
139/* LCD */
140#define GPIO58_LCD_LDD_0 MFP_CFG_OUT(GPIO58, AF2, DRIVE_LOW)
141#define GPIO59_LCD_LDD_1 MFP_CFG_OUT(GPIO59, AF2, DRIVE_LOW)
142#define GPIO60_LCD_LDD_2 MFP_CFG_OUT(GPIO60, AF2, DRIVE_LOW)
143#define GPIO61_LCD_LDD_3 MFP_CFG_OUT(GPIO61, AF2, DRIVE_LOW)
144#define GPIO62_LCD_LDD_4 MFP_CFG_OUT(GPIO62, AF2, DRIVE_LOW)
145#define GPIO63_LCD_LDD_5 MFP_CFG_OUT(GPIO63, AF2, DRIVE_LOW)
146#define GPIO64_LCD_LDD_6 MFP_CFG_OUT(GPIO64, AF2, DRIVE_LOW)
147#define GPIO65_LCD_LDD_7 MFP_CFG_OUT(GPIO65, AF2, DRIVE_LOW)
148#define GPIO66_LCD_LDD_8 MFP_CFG_OUT(GPIO66, AF2, DRIVE_LOW)
149#define GPIO67_LCD_LDD_9 MFP_CFG_OUT(GPIO67, AF2, DRIVE_LOW)
150#define GPIO68_LCD_LDD_10 MFP_CFG_OUT(GPIO68, AF2, DRIVE_LOW)
151#define GPIO69_LCD_LDD_11 MFP_CFG_OUT(GPIO69, AF2, DRIVE_LOW)
152#define GPIO70_LCD_LDD_12 MFP_CFG_OUT(GPIO70, AF2, DRIVE_LOW)
153#define GPIO71_LCD_LDD_13 MFP_CFG_OUT(GPIO71, AF2, DRIVE_LOW)
154#define GPIO72_LCD_LDD_14 MFP_CFG_OUT(GPIO72, AF2, DRIVE_LOW)
155#define GPIO73_LCD_LDD_15 MFP_CFG_OUT(GPIO73, AF2, DRIVE_LOW)
156#define GPIO74_LCD_FCLK MFP_CFG_OUT(GPIO74, AF2, DRIVE_LOW)
157#define GPIO75_LCD_LCLK MFP_CFG_OUT(GPIO75, AF2, DRIVE_LOW)
158#define GPIO76_LCD_PCLK MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW)
159#define GPIO77_LCD_ACBIAS MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW)
160
161#endif /* __ASM_ARCH_MFP_PXA25X_H */
diff --git a/include/asm-arm/arch-pxa/mfp-pxa27x.h b/include/asm-arm/arch-pxa/mfp-pxa27x.h
new file mode 100644
index 000000000000..eb6eaa174f8d
--- /dev/null
+++ b/include/asm-arm/arch-pxa/mfp-pxa27x.h
@@ -0,0 +1,432 @@
1#ifndef __ASM_ARCH_MFP_PXA27X_H
2#define __ASM_ARCH_MFP_PXA27X_H
3
4/*
5 * NOTE: for those special-function bidirectional GPIOs, as described
6 * in the "PXA27x Developer's Manual" Section 24.4.2.1, only its input
7 * alternative is preserved, the direction is actually selected by the
8 * specific controller, and this should work in most cases.
9 */
10
11#include <asm/arch/mfp.h>
12#include <asm/arch/mfp-pxa2xx.h>
13
14/* GPIO */
15#define GPIO85_GPIO MFP_CFG_IN(GPIO85, AF0)
16#define GPIO86_GPIO MFP_CFG_IN(GPIO86, AF0)
17#define GPIO87_GPIO MFP_CFG_IN(GPIO87, AF0)
18#define GPIO88_GPIO MFP_CFG_IN(GPIO88, AF0)
19#define GPIO89_GPIO MFP_CFG_IN(GPIO89, AF0)
20#define GPIO90_GPIO MFP_CFG_IN(GPIO90, AF0)
21#define GPIO91_GPIO MFP_CFG_IN(GPIO91, AF0)
22#define GPIO92_GPIO MFP_CFG_IN(GPIO92, AF0)
23#define GPIO93_GPIO MFP_CFG_IN(GPIO93, AF0)
24#define GPIO94_GPIO MFP_CFG_IN(GPIO94, AF0)
25#define GPIO95_GPIO MFP_CFG_IN(GPIO95, AF0)
26#define GPIO96_GPIO MFP_CFG_IN(GPIO96, AF0)
27#define GPIO97_GPIO MFP_CFG_IN(GPIO97, AF0)
28#define GPIO98_GPIO MFP_CFG_IN(GPIO98, AF0)
29#define GPIO99_GPIO MFP_CFG_IN(GPIO99, AF0)
30#define GPIO100_GPIO MFP_CFG_IN(GPIO100, AF0)
31#define GPIO101_GPIO MFP_CFG_IN(GPIO101, AF0)
32#define GPIO102_GPIO MFP_CFG_IN(GPIO102, AF0)
33#define GPIO103_GPIO MFP_CFG_IN(GPIO103, AF0)
34#define GPIO104_GPIO MFP_CFG_IN(GPIO104, AF0)
35#define GPIO105_GPIO MFP_CFG_IN(GPIO105, AF0)
36#define GPIO106_GPIO MFP_CFG_IN(GPIO106, AF0)
37#define GPIO107_GPIO MFP_CFG_IN(GPIO107, AF0)
38#define GPIO108_GPIO MFP_CFG_IN(GPIO108, AF0)
39#define GPIO109_GPIO MFP_CFG_IN(GPIO109, AF0)
40#define GPIO110_GPIO MFP_CFG_IN(GPIO110, AF0)
41#define GPIO111_GPIO MFP_CFG_IN(GPIO111, AF0)
42#define GPIO112_GPIO MFP_CFG_IN(GPIO112, AF0)
43#define GPIO113_GPIO MFP_CFG_IN(GPIO113, AF0)
44#define GPIO114_GPIO MFP_CFG_IN(GPIO114, AF0)
45#define GPIO115_GPIO MFP_CFG_IN(GPIO115, AF0)
46#define GPIO116_GPIO MFP_CFG_IN(GPIO116, AF0)
47#define GPIO117_GPIO MFP_CFG_IN(GPIO117, AF0)
48#define GPIO118_GPIO MFP_CFG_IN(GPIO118, AF0)
49#define GPIO119_GPIO MFP_CFG_IN(GPIO119, AF0)
50#define GPIO120_GPIO MFP_CFG_IN(GPIO120, AF0)
51
52/* Crystal and Clock Signals */
53#define GPIO9_HZ_CLK MFP_CFG_OUT(GPIO9, AF1, DRIVE_LOW)
54#define GPIO10_HZ_CLK MFP_CFG_OUT(GPIO10, AF1, DRIVE_LOW)
55#define GPIO11_48_MHz MFP_CFG_OUT(GPIO11, AF3, DRIVE_LOW)
56#define GPIO12_48_MHz MFP_CFG_OUT(GPIO12, AF3, DRIVE_LOW)
57#define GPIO13_CLK_EXT MFP_CFG_IN(GPIO13, AF1)
58
59/* OS Timer Signals */
60#define GPIO11_EXT_SYNC_0 MFP_CFG_IN(GPIO11, AF1)
61#define GPIO12_EXT_SYNC_1 MFP_CFG_IN(GPIO12, AF1)
62#define GPIO9_CHOUT_0 MFP_CFG_OUT(GPIO9, AF3, DRIVE_LOW)
63#define GPIO10_CHOUT_1 MFP_CFG_OUT(GPIO10, AF3, DRIVE_LOW)
64#define GPIO11_CHOUT_0 MFP_CFG_OUT(GPIO11, AF1, DRIVE_LOW)
65#define GPIO12_CHOUT_1 MFP_CFG_OUT(GPIO12, AF1, DRIVE_LOW)
66
67/* SDRAM and Static Memory I/O Signals */
68#define GPIO20_nSDCS_2 MFP_CFG_OUT(GPIO20, AF1, DRIVE_HIGH)
69#define GPIO21_nSDCS_3 MFP_CFG_OUT(GPIO21, AF1, DRIVE_HIGH)
70#define GPIO15_nCS_1 MFP_CFG_OUT(GPIO15, AF2, DRIVE_HIGH)
71#define GPIO78_nCS_2 MFP_CFG_OUT(GPIO78, AF2, DRIVE_HIGH)
72#define GPIO79_nCS_3 MFP_CFG_OUT(GPIO79, AF2, DRIVE_HIGH)
73#define GPIO80_nCS_4 MFP_CFG_OUT(GPIO80, AF2, DRIVE_HIGH)
74#define GPIO33_nCS_5 MFP_CFG_OUT(GPIO33, AF2, DRIVE_HIGH)
75
76/* Miscellaneous I/O and DMA Signals */
77#define GPIO21_DVAL_0 MFP_CFG_OUT(GPIO21, AF2, DRIVE_HIGH)
78#define GPIO116_DVAL_0 MFP_CFG_OUT(GPIO116, AF1, DRIVE_HIGH)
79#define GPIO33_DVAL_1 MFP_CFG_OUT(GPIO33, AF1, DRIVE_HIGH)
80#define GPIO96_DVAL_1 MFP_CFG_OUT(GPIO96, AF2, DRIVE_HIGH)
81#define GPIO18_RDY MFP_CFG_IN(GPIO18, AF1)
82#define GPIO20_DREQ_0 MFP_CFG_IN(GPIO20, AF1)
83#define GPIO115_DREQ_0 MFP_CFG_IN(GPIO115, AF1)
84#define GPIO80_DREQ_1 MFP_CFG_IN(GPIO80, AF1)
85#define GPIO97_DREQ_1 MFP_CFG_IN(GPIO97, AF2)
86#define GPIO85_DREQ_2 MFP_CFG_IN(GPIO85, AF2)
87#define GPIO100_DREQ_2 MFP_CFG_IN(GPIO100, AF2)
88
89/* Alternate Bus Master Mode I/O Signals */
90#define GPIO20_MBREQ MFP_CFG_IN(GPIO20, AF2)
91#define GPIO80_MBREQ MFP_CFG_IN(GPIO80, AF2)
92#define GPIO96_MBREQ MFP_CFG_IN(GPIO96, AF2)
93#define GPIO115_MBREQ MFP_CFG_IN(GPIO115, AF3)
94#define GPIO21_MBGNT MFP_CFG_OUT(GPIO21, AF3, DRIVE_LOW)
95#define GPIO33_MBGNT MFP_CFG_OUT(GPIO33, AF3, DRIVE_LOW)
96#define GPIO97_MBGNT MFP_CFG_OUT(GPIO97, AF2, DRIVE_LOW)
97#define GPIO116_MBGNT MFP_CFG_OUT(GPIO116, AF3, DRIVE_LOW)
98
99/* PC CARD */
100#define GPIO15_nPCE_1 MFP_CFG_OUT(GPIO15, AF1, DRIVE_HIGH)
101#define GPIO85_nPCE_1 MFP_CFG_OUT(GPIO85, AF1, DRIVE_HIGH)
102#define GPIO86_nPCE_1 MFP_CFG_OUT(GPIO86, AF1, DRIVE_HIGH)
103#define GPIO102_nPCE_1 MFP_CFG_OUT(GPIO102, AF1, DRIVE_HIGH)
104#define GPIO54_nPCE_2 MFP_CFG_OUT(GPIO54, AF2, DRIVE_HIGH)
105#define GPIO78_nPCE_2 MFP_CFG_OUT(GPIO78, AF1, DRIVE_HIGH)
106#define GPIO87_nPCE_2 MFP_CFG_IN(GPIO87, AF1)
107#define GPIO55_nPREG MFP_CFG_OUT(GPIO55, AF2, DRIVE_HIGH)
108#define GPIO50_nPIOR MFP_CFG_OUT(GPIO50, AF2, DRIVE_HIGH)
109#define GPIO51_nPIOW MFP_CFG_OUT(GPIO51, AF2, DRIVE_HIGH)
110#define GPIO49_nPWE MFP_CFG_OUT(GPIO49, AF2, DRIVE_HIGH)
111#define GPIO48_nPOE MFP_CFG_OUT(GPIO48, AF2, DRIVE_HIGH)
112#define GPIO57_nIOIS16 MFP_CFG_IN(GPIO57, AF1)
113#define GPIO56_nPWAIT MFP_CFG_IN(GPIO56, AF1)
114#define GPIO79_PSKTSEL MFP_CFG_OUT(GPIO79, AF1, DRIVE_HIGH)
115
116/* I2C */
117#define GPIO117_I2C_SCL MFP_CFG_IN(GPIO117, AF1)
118#define GPIO118_I2C_SDA MFP_CFG_IN(GPIO118, AF1)
119
120/* FFUART */
121#define GPIO9_FFUART_CTS MFP_CFG_IN(GPIO9, AF3)
122#define GPIO26_FFUART_CTS MFP_CFG_IN(GPIO26, AF3)
123#define GPIO35_FFUART_CTS MFP_CFG_IN(GPIO35, AF1)
124#define GPIO100_FFUART_CTS MFP_CFG_IN(GPIO100, AF3)
125#define GPIO10_FFUART_DCD MFP_CFG_IN(GPIO10, AF1)
126#define GPIO36_FFUART_DCD MFP_CFG_IN(GPIO36, AF1)
127#define GPIO33_FFUART_DSR MFP_CFG_IN(GPIO33, AF2)
128#define GPIO37_FFUART_DSR MFP_CFG_IN(GPIO37, AF1)
129#define GPIO38_FFUART_RI MFP_CFG_IN(GPIO38, AF1)
130#define GPIO89_FFUART_RI MFP_CFG_IN(GPIO89, AF3)
131#define GPIO19_FFUART_RXD MFP_CFG_IN(GPIO19, AF3)
132#define GPIO33_FFUART_RXD MFP_CFG_IN(GPIO33, AF1)
133#define GPIO34_FFUART_RXD MFP_CFG_IN(GPIO34, AF1)
134#define GPIO41_FFUART_RXD MFP_CFG_IN(GPIO41, AF1)
135#define GPIO53_FFUART_RXD MFP_CFG_IN(GPIO53, AF1)
136#define GPIO85_FFUART_RXD MFP_CFG_IN(GPIO85, AF1)
137#define GPIO96_FFUART_RXD MFP_CFG_IN(GPIO96, AF3)
138#define GPIO102_FFUART_RXD MFP_CFG_IN(GPIO102, AF3)
139#define GPIO16_FFUART_TXD MFP_CFG_OUT(GPIO16, AF3, DRIVE_HIGH)
140#define GPIO37_FFUART_TXD MFP_CFG_OUT(GPIO37, AF3, DRIVE_HIGH)
141#define GPIO39_FFUART_TXD MFP_CFG_OUT(GPIO39, AF2, DRIVE_HIGH)
142#define GPIO83_FFUART_TXD MFP_CFG_OUT(GPIO83, AF2, DRIVE_HIGH)
143#define GPIO99_FFUART_TXD MFP_CFG_OUT(GPIO99, AF3, DRIVE_HIGH)
144#define GPIO27_FFUART_RTS MFP_CFG_OUT(GPIO27, AF3, DRIVE_HIGH)
145#define GPIO41_FFUART_RTS MFP_CFG_OUT(GPIO41, AF2, DRIVE_HIGH)
146#define GPIO83_FFUART_RTS MFP_CFG_OUT(GPIO83, AF3, DRIVE_HIGH)
147#define GPIO98_FFUART_RTS MFP_CFG_OUT(GPIO98, AF3, DRIVE_HIGH)
148#define GPIO40_FFUART_DTR MFP_CFG_OUT(GPIO40, AF2, DRIVE_HIGH)
149#define GPIO82_FFUART_DTR MFP_CFG_OUT(GPIO82, AF3, DRIVE_HIGH)
150
151/* BTUART */
152#define GPIO44_BTUART_CTS MFP_CFG_IN(GPIO44, AF1)
153#define GPIO42_BTUART_RXD MFP_CFG_IN(GPIO42, AF1)
154#define GPIO45_BTUART_RTS MFP_CFG_OUT(GPIO45, AF2, DRIVE_HIGH)
155#define GPIO43_BTUART_TXD MFP_CFG_OUT(GPIO43, AF2, DRIVE_HIGH)
156
157/* STUART */
158#define GPIO46_STUART_RXD MFP_CFG_IN(GPIO46, AF2)
159#define GPIO47_STUART_TXD MFP_CFG_OUT(GPIO47, AF1, DRIVE_HIGH)
160
161/* FICP */
162#define GPIO42_FICP_RXD MFP_CFG_IN(GPIO42, AF2)
163#define GPIO46_FICP_RXD MFP_CFG_IN(GPIO46, AF1)
164#define GPIO43_FICP_TXD MFP_CFG_OUT(GPIO43, AF1, DRIVE_HIGH)
165#define GPIO47_FICP_TXD MFP_CFG_OUT(GPIO47, AF2, DRIVE_HIGH)
166
167/* PWM 0/1/2/3 */
168#define GPIO11_PWM2_OUT MFP_CFG_OUT(GPIO11, AF2, DRIVE_LOW)
169#define GPIO12_PWM3_OUT MFP_CFG_OUT(GPIO12, AF2, DRIVE_LOW)
170#define GPIO16_PWM0_OUT MFP_CFG_OUT(GPIO16, AF2, DRIVE_LOW)
171#define GPIO17_PWM1_OUT MFP_CFG_OUT(GPIO17, AF2, DRIVE_LOW)
172#define GPIO38_PWM1_OUT MFP_CFG_OUT(GPIO38, AF3, DRIVE_LOW)
173#define GPIO46_PWM2_OUT MFP_CFG_OUT(GPIO46, AF2, DRIVE_LOW)
174#define GPIO47_PWM3_OUT MFP_CFG_OUT(GPIO47, AF3, DRIVE_LOW)
175#define GPIO79_PWM2_OUT MFP_CFG_OUT(GPIO79, AF3, DRIVE_LOW)
176#define GPIO80_PWM3_OUT MFP_CFG_OUT(GPIO80, AF3, DRIVE_LOW)
177#define GPIO115_PWM1_OUT MFP_CFG_OUT(GPIO115, AF3, DRIVE_LOW)
178
179/* AC97 */
180#define GPIO31_AC97_SYNC MFP_CFG_OUT(GPIO31, AF2, DRIVE_LOW)
181#define GPIO94_AC97_SYNC MFP_CFG_OUT(GPIO94, AF1, DRIVE_LOW)
182#define GPIO30_AC97_SDATA_OUT MFP_CFG_OUT(GPIO30, AF2, DRIVE_LOW)
183#define GPIO93_AC97_SDATA_OUT MFP_CFG_OUT(GPIO93, AF1, DRIVE_LOW)
184#define GPIO45_AC97_SYSCLK MFP_CFG_OUT(GPIO45, AF1, DRIVE_LOW)
185#define GPIO89_AC97_SYSCLK MFP_CFG_OUT(GPIO89, AF1, DRIVE_LOW)
186#define GPIO98_AC97_SYSCLK MFP_CFG_OUT(GPIO98, AF1, DRIVE_LOW)
187#define GPIO95_AC97_nRESET MFP_CFG_OUT(GPIO95, AF1, DRIVE_LOW)
188#define GPIO113_AC97_nRESET MFP_CFG_OUT(GPIO113, AF2, DRIVE_LOW)
189#define GPIO28_AC97_BITCLK MFP_CFG_IN(GPIO28, AF1)
190#define GPIO29_AC97_SDATA_IN_0 MFP_CFG_IN(GPIO29, AF1)
191#define GPIO116_AC97_SDATA_IN_0 MFP_CFG_IN(GPIO116, AF2)
192#define GPIO99_AC97_SDATA_IN_1 MFP_CFG_IN(GPIO99, AF2)
193
194/* I2S */
195#define GPIO28_I2S_BITCLK_IN MFP_CFG_IN(GPIO28, AF2)
196#define GPIO28_I2S_BITCLK_OUT MFP_CFG_OUT(GPIO28, AF1, DRIVE_LOW)
197#define GPIO29_I2S_SDATA_IN MFP_CFG_IN(GPIO29, AF2)
198#define GPIO30_I2S_SDATA_OUT MFP_CFG_OUT(GPIO30, AF1, DRIVE_LOW)
199#define GPIO31_I2S_SYNC MFP_CFG_OUT(GPIO31, AF1, DRIVE_LOW)
200#define GPIO113_I2S_SYSCLK MFP_CFG_OUT(GPIO113, AF1, DRIVE_LOW)
201
202/* SSP 1 */
203#define GPIO23_SSP1_SCLK MFP_CFG_OUT(GPIO23, AF2, DRIVE_LOW)
204#define GPIO29_SSP1_SCLK MFP_CFG_IN(GPIO29, AF3)
205#define GPIO27_SSP1_SYSCLK MFP_CFG_OUT(GPIO27, AF1, DRIVE_LOW)
206#define GPIO53_SSP1_SYSCLK MFP_CFG_OUT(GPIO53, AF3, DRIVE_LOW)
207#define GPIO24_SSP1_SFRM MFP_CFG_IN(GPIO24, AF2)
208#define GPIO28_SSP1_SFRM MFP_CFG_IN(GPIO28, AF3)
209#define GPIO25_SSP1_TXD MFP_CFG_OUT(GPIO25, AF2, DRIVE_LOW)
210#define GPIO57_SSP1_TXD MFP_CFG_OUT(GPIO57, AF3, DRIVE_LOW)
211#define GPIO26_SSP1_RXD MFP_CFG_IN(GPIO26, AF1)
212#define GPIO27_SSP1_SCLKEN MFP_CFG_IN(GPIO27, AF2)
213
214/* SSP 2 */
215#define GPIO19_SSP2_SCLK MFP_CFG_IN(GPIO19, AF1)
216#define GPIO22_SSP2_SCLK MFP_CFG_IN(GPIO22, AF3)
217#define GPIO29_SSP2_SCLK MFP_CFG_OUT(GPIO29, AF3, DRIVE_LOW)
218#define GPIO36_SSP2_SCLK MFP_CFG_IN(GPIO36, AF2)
219#define GPIO50_SSP2_SCLK MFP_CFG_IN(GPIO50, AF3)
220#define GPIO22_SSP2_SYSCLK MFP_CFG_OUT(GPIO22, AF2, DRIVE_LOW)
221#define GPIO14_SSP2_SFRM MFP_CFG_IN(GPIO14, AF2)
222#define GPIO37_SSP2_SFRM MFP_CFG_IN(GPIO37, AF2)
223#define GPIO87_SSP2_SFRM MFP_CFG_OUT(GPIO87, AF3, DRIVE_LOW)
224#define GPIO88_SSP2_SFRM MFP_CFG_IN(GPIO88, AF3)
225#define GPIO13_SSP2_TXD MFP_CFG_OUT(GPIO13, AF1, DRIVE_LOW)
226#define GPIO38_SSP2_TXD MFP_CFG_OUT(GPIO38, AF2, DRIVE_LOW)
227#define GPIO87_SSP2_TXD MFP_CFG_OUT(GPIO87, AF1, DRIVE_LOW)
228#define GPIO89_SSP2_TXD MFP_CFG_OUT(GPIO89, AF3, DRIVE_LOW)
229#define GPIO11_SSP2_RXD MFP_CFG_IN(GPIO11, AF2)
230#define GPIO29_SSP2_RXD MFP_CFG_OUT(GPIO29, AF1, DRIVE_LOW)
231#define GPIO40_SSP2_RXD MFP_CFG_IN(GPIO40, AF1)
232#define GPIO86_SSP2_RXD MFP_CFG_IN(GPIO86, AF1)
233#define GPIO88_SSP2_RXD MFP_CFG_IN(GPIO88, AF2)
234#define GPIO22_SSP2_EXTCLK MFP_CFG_IN(GPIO22, AF1)
235#define GPIO27_SSP2_EXTCLK MFP_CFG_IN(GPIO27, AF1)
236#define GPIO22_SSP2_SCLKEN MFP_CFG_IN(GPIO22, AF2)
237#define GPIO23_SSP2_SCLKEN MFP_CFG_IN(GPIO23, AF2)
238
239/* SSP 3 */
240#define GPIO34_SSP3_SCLK MFP_CFG_IN(GPIO34, AF3)
241#define GPIO40_SSP3_SCLK MFP_CFG_OUT(GPIO40, AF3, DRIVE_LOW)
242#define GPIO52_SSP3_SCLK MFP_CFG_IN(GPIO52, AF2)
243#define GPIO84_SSP3_SCLK MFP_CFG_IN(GPIO84, AF1)
244#define GPIO45_SSP3_SYSCLK MFP_CFG_OUT(GPIO45, AF3, DRIVE_LOW)
245#define GPIO35_SSP3_SFRM MFP_CFG_IN(GPIO35, AF3)
246#define GPIO39_SSP3_SFRM MFP_CFG_IN(GPIO39, AF3)
247#define GPIO83_SSP3_SFRM MFP_CFG_IN(GPIO83, AF1)
248#define GPIO35_SSP3_TXD MFP_CFG_OUT(GPIO35, AF3, DRIVE_LOW)
249#define GPIO38_SSP3_TXD MFP_CFG_OUT(GPIO38, AF1, DRIVE_LOW)
250#define GPIO81_SSP3_TXD MFP_CFG_OUT(GPIO81, AF1, DRIVE_LOW)
251#define GPIO41_SSP3_RXD MFP_CFG_IN(GPIO41, AF3)
252#define GPIO82_SSP3_RXD MFP_CFG_IN(GPIO82, AF1)
253#define GPIO89_SSP3_RXD MFP_CFG_IN(GPIO89, AF1)
254
255/* MMC */
256#define GPIO32_MMC_CLK MFP_CFG_OUT(GPIO32, AF2, DRIVE_LOW)
257#define GPIO92_MMC_DAT_0 MFP_CFG_IN(GPIO92, AF1)
258#define GPIO109_MMC_DAT_1 MFP_CFG_IN(GPIO109, AF1)
259#define GPIO110_MMC_DAT_2 MFP_CFG_IN(GPIO110, AF1)
260#define GPIO111_MMC_DAT_3 MFP_CFG_IN(GPIO111, AF1)
261#define GPIO112_MMC_CMD MFP_CFG_IN(GPIO112, AF1)
262
263/* LCD */
264#define GPIO58_LCD_LDD_0 MFP_CFG_OUT(GPIO58, AF2, DRIVE_LOW)
265#define GPIO59_LCD_LDD_1 MFP_CFG_OUT(GPIO59, AF2, DRIVE_LOW)
266#define GPIO60_LCD_LDD_2 MFP_CFG_OUT(GPIO60, AF2, DRIVE_LOW)
267#define GPIO61_LCD_LDD_3 MFP_CFG_OUT(GPIO61, AF2, DRIVE_LOW)
268#define GPIO62_LCD_LDD_4 MFP_CFG_OUT(GPIO62, AF2, DRIVE_LOW)
269#define GPIO63_LCD_LDD_5 MFP_CFG_OUT(GPIO63, AF2, DRIVE_LOW)
270#define GPIO64_LCD_LDD_6 MFP_CFG_OUT(GPIO64, AF2, DRIVE_LOW)
271#define GPIO65_LCD_LDD_7 MFP_CFG_OUT(GPIO65, AF2, DRIVE_LOW)
272#define GPIO66_LCD_LDD_8 MFP_CFG_OUT(GPIO66, AF2, DRIVE_LOW)
273#define GPIO67_LCD_LDD_9 MFP_CFG_OUT(GPIO67, AF2, DRIVE_LOW)
274#define GPIO68_LCD_LDD_10 MFP_CFG_OUT(GPIO68, AF2, DRIVE_LOW)
275#define GPIO69_LCD_LDD_11 MFP_CFG_OUT(GPIO69, AF2, DRIVE_LOW)
276#define GPIO70_LCD_LDD_12 MFP_CFG_OUT(GPIO70, AF2, DRIVE_LOW)
277#define GPIO71_LCD_LDD_13 MFP_CFG_OUT(GPIO71, AF2, DRIVE_LOW)
278#define GPIO72_LCD_LDD_14 MFP_CFG_OUT(GPIO72, AF2, DRIVE_LOW)
279#define GPIO73_LCD_LDD_15 MFP_CFG_OUT(GPIO73, AF2, DRIVE_LOW)
280#define GPIO86_LCD_LDD_16 MFP_CFG_OUT(GPIO86, AF2, DRIVE_LOW)
281#define GPIO87_LCD_LDD_17 MFP_CFG_OUT(GPIO87, AF2, DRIVE_LOW)
282#define GPIO74_LCD_FCLK MFP_CFG_OUT(GPIO74, AF2, DRIVE_LOW)
283#define GPIO75_LCD_LCLK MFP_CFG_OUT(GPIO75, AF2, DRIVE_LOW)
284#define GPIO76_LCD_PCLK MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW)
285#define GPIO77_LCD_BIAS MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW)
286#define GPIO14_LCD_VSYNC MFP_CFG_IN(GPIO14, AF1)
287#define GPIO19_LCD_CS MFP_CFG_OUT(GPIO19, AF2, DRIVE_LOW)
288
289/* Keypad */
290#define GPIO93_KP_DKIN_0 MFP_CFG_IN(GPIO93, AF1)
291#define GPIO94_KP_DKIN_1 MFP_CFG_IN(GPIO94, AF1)
292#define GPIO95_KP_DKIN_2 MFP_CFG_IN(GPIO95, AF1)
293#define GPIO96_KP_DKIN_3 MFP_CFG_IN(GPIO96, AF1)
294#define GPIO97_KP_DKIN_4 MFP_CFG_IN(GPIO97, AF1)
295#define GPIO98_KP_DKIN_5 MFP_CFG_IN(GPIO98, AF1)
296#define GPIO99_KP_DKIN_6 MFP_CFG_IN(GPIO99, AF1)
297#define GPIO13_KP_KDIN_7 MFP_CFG_IN(GPIO13, AF2)
298#define GPIO100_KP_MKIN_0 MFP_CFG_IN(GPIO100, AF1)
299#define GPIO101_KP_MKIN_1 MFP_CFG_IN(GPIO101, AF1)
300#define GPIO102_KP_MKIN_2 MFP_CFG_IN(GPIO102, AF1)
301#define GPIO34_KP_MKIN_3 MFP_CFG_IN(GPIO34, AF2)
302#define GPIO37_KP_MKIN_3 MFP_CFG_IN(GPIO37, AF3)
303#define GPIO97_KP_MKIN_3 MFP_CFG_IN(GPIO97, AF3)
304#define GPIO98_KP_MKIN_4 MFP_CFG_IN(GPIO98, AF3)
305#define GPIO38_KP_MKIN_4 MFP_CFG_IN(GPIO38, AF2)
306#define GPIO39_KP_MKIN_4 MFP_CFG_IN(GPIO39, AF1)
307#define GPIO16_KP_MKIN_5 MFP_CFG_IN(GPIO16, AF1)
308#define GPIO90_KP_MKIN_5 MFP_CFG_IN(GPIO90, AF1)
309#define GPIO99_KP_MKIN_5 MFP_CFG_IN(GPIO99, AF3)
310#define GPIO17_KP_MKIN_6 MFP_CFG_IN(GPIO17, AF1)
311#define GPIO91_KP_MKIN_6 MFP_CFG_IN(GPIO91, AF1)
312#define GPIO95_KP_MKIN_6 MFP_CFG_IN(GPIO95, AF3)
313#define GPIO13_KP_MKIN_7 MFP_CFG_IN(GPIO13, AF3)
314#define GPIO36_KP_MKIN_7 MFP_CFG_IN(GPIO36, AF3)
315#define GPIO103_KP_MKOUT_0 MFP_CFG_OUT(GPIO103, AF2, DRIVE_HIGH)
316#define GPIO104_KP_MKOUT_1 MFP_CFG_OUT(GPIO104, AF2, DRIVE_HIGH)
317#define GPIO105_KP_MKOUT_2 MFP_CFG_OUT(GPIO105, AF2, DRIVE_HIGH)
318#define GPIO106_KP_MKOUT_3 MFP_CFG_OUT(GPIO106, AF2, DRIVE_HIGH)
319#define GPIO107_KP_MKOUT_4 MFP_CFG_OUT(GPIO107, AF2, DRIVE_HIGH)
320#define GPIO108_KP_MKOUT_5 MFP_CFG_OUT(GPIO108, AF2, DRIVE_HIGH)
321#define GPIO35_KP_MKOUT_6 MFP_CFG_OUT(GPIO35, AF2, DRIVE_HIGH)
322#define GPIO22_KP_MKOUT_7 MFP_CFG_OUT(GPIO22, AF1, DRIVE_HIGH)
323#define GPIO40_KP_MKOUT_6 MFP_CFG_OUT(GPIO40, AF1, DRIVE_HIGH)
324#define GPIO41_KP_MKOUT_7 MFP_CFG_OUT(GPIO41, AF1, DRIVE_HIGH)
325#define GPIO96_KP_MKOUT_6 MFP_CFG_OUT(GPIO96, AF3, DRIVE_HIGH)
326
327/* USB P3 */
328#define GPIO10_USB_P3_5 MFP_CFG_IN(GPIO10, AF3)
329#define GPIO11_USB_P3_1 MFP_CFG_IN(GPIO11, AF3)
330#define GPIO30_USB_P3_2 MFP_CFG_OUT(GPIO30, AF3, DRIVE_LOW)
331#define GPIO31_USB_P3_6 MFP_CFG_OUT(GPIO31, AF3, DRIVE_LOW)
332#define GPIO56_USB_P3_4 MFP_CFG_OUT(GPIO56, AF1, DRIVE_LOW)
333#define GPIO86_USB_P3_5 MFP_CFG_IN(GPIO86, AF3)
334#define GPIO87_USB_P3_1 MFP_CFG_IN(GPIO87, AF3)
335#define GPIO90_USB_P3_5 MFP_CFG_IN(GPIO90, AF2)
336#define GPIO91_USB_P3_1 MFP_CFG_IN(GPIO91, AF2)
337#define GPIO113_USB_P3_3 MFP_CFG_IN(GPIO113, AF3)
338
339/* USB P2 */
340#define GPIO34_USB_P2_2 MFP_CFG_OUT(GPIO34, AF1, DRIVE_LOW)
341#define GPIO35_USB_P2_1 MFP_CFG_IN(GPIO35, AF2)
342#define GPIO36_USB_P2_4 MFP_CFG_OUT(GPIO36, AF1, DRIVE_LOW)
343#define GPIO37_USB_P2_8 MFP_CFG_OUT(GPIO37, AF1, DRIVE_LOW)
344#define GPIO38_USB_P2_3 MFP_CFG_IN(GPIO38, AF3)
345#define GPIO39_USB_P2_6 MFP_CFG_OUT(GPIO39, AF1, DRIVE_LOW)
346#define GPIO40_USB_P2_5 MFP_CFG_IN(GPIO40, AF3)
347#define GPIO41_USB_P2_7 MFP_CFG_IN(GPIO41, AF2)
348#define GPIO53_USB_P2_3 MFP_CFG_IN(GPIO53, AF2)
349
350/* USB Host Port 1/2 */
351#define GPIO88_USBH1_PWR MFP_CFG_IN(GPIO88, AF1)
352#define GPIO89_USBH1_PEN MFP_CFG_OUT(GPIO89, AF2, DRIVE_LOW)
353#define GPIO119_USBH2_PWR MFP_CFG_IN(GPIO119, AF1)
354#define GPIO120_USBH2_PEN MFP_CFG_OUT(GPIO120, AF2, DRIVE_LOW)
355
356/* QCI - default to Master Mode: CIF_FV/CIF_LV Direction In */
357#define GPIO115_CIF_DD_3 MFP_CFG_IN(GPIO115, AF2)
358#define GPIO116_CIF_DD_2 MFP_CFG_IN(GPIO116, AF1)
359#define GPIO12_CIF_DD_7 MFP_CFG_IN(GPIO12, AF2)
360#define GPIO17_CIF_DD_6 MFP_CFG_IN(GPIO17, AF2)
361#define GPIO23_CIF_MCLK MFP_CFG_OUT(GPIO23, AF1, DRIVE_LOW)
362#define GPIO24_CIF_FV MFP_CFG_IN(GPIO24, AF1)
363#define GPIO25_CIF_LV MFP_CFG_IN(GPIO25, AF1)
364#define GPIO26_CIF_PCLK MFP_CFG_IN(GPIO26, AF2)
365#define GPIO27_CIF_DD_0 MFP_CFG_IN(GPIO27, AF3)
366#define GPIO42_CIF_MCLK MFP_CFG_OUT(GPIO42, AF3, DRIVE_LOW)
367#define GPIO43_CIF_FV MFP_CFG_IN(GPIO43, AF3)
368#define GPIO44_CIF_LV MFP_CFG_IN(GPIO44, AF3)
369#define GPIO45_CIF_PCLK MFP_CFG_IN(GPIO45, AF3)
370#define GPIO47_CIF_DD_0 MFP_CFG_IN(GPIO47, AF1)
371#define GPIO48_CIF_DD_5 MFP_CFG_IN(GPIO48, AF1)
372#define GPIO50_CIF_DD_3 MFP_CFG_IN(GPIO50, AF1)
373#define GPIO51_CIF_DD_2 MFP_CFG_IN(GPIO51, AF1)
374#define GPIO52_CIF_DD_4 MFP_CFG_IN(GPIO52, AF1)
375#define GPIO53_CIF_MCLK MFP_CFG_OUT(GPIO53, AF2, DRIVE_LOW)
376#define GPIO54_CIF_PCLK MFP_CFG_IN(GPIO54, AF3)
377#define GPIO55_CIF_DD_1 MFP_CFG_IN(GPIO55, AF1)
378#define GPIO81_CIF_DD_0 MFP_CFG_IN(GPIO81, AF2)
379#define GPIO82_CIF_DD_5 MFP_CFG_IN(GPIO82, AF3)
380#define GPIO83_CIF_DD_4 MFP_CFG_IN(GPIO83, AF3)
381#define GPIO84_CIF_FV MFP_CFG_IN(GPIO84, AF3)
382#define GPIO85_CIF_LV MFP_CFG_IN(GPIO85, AF3)
383#define GPIO90_CIF_DD_4 MFP_CFG_IN(GPIO90, AF3)
384#define GPIO91_CIF_DD_5 MFP_CFG_IN(GPIO91, AF3)
385#define GPIO93_CIF_DD_6 MFP_CFG_IN(GPIO93, AF2)
386#define GPIO94_CIF_DD_5 MFP_CFG_IN(GPIO94, AF2)
387#define GPIO95_CIF_DD_4 MFP_CFG_IN(GPIO95, AF2)
388#define GPIO98_CIF_DD_0 MFP_CFG_IN(GPIO98, AF2)
389#define GPIO103_CIF_DD_3 MFP_CFG_IN(GPIO103, AF1)
390#define GPIO104_CIF_DD_2 MFP_CFG_IN(GPIO104, AF1)
391#define GPIO105_CIF_DD_1 MFP_CFG_IN(GPIO105, AF1)
392#define GPIO106_CIF_DD_9 MFP_CFG_IN(GPIO106, AF1)
393#define GPIO107_CIF_DD_8 MFP_CFG_IN(GPIO107, AF1)
394#define GPIO108_CIF_DD_7 MFP_CFG_IN(GPIO108, AF1)
395#define GPIO114_CIF_DD_1 MFP_CFG_IN(GPIO114, AF1)
396
397/* Universal Subscriber ID Interface */
398#define GPIO114_UVS0 MFP_CFG_OUT(GPIO114, AF2, DRIVE_LOW)
399#define GPIO115_nUVS1 MFP_CFG_OUT(GPIO115, AF2, DRIVE_LOW)
400#define GPIO116_nUVS2 MFP_CFG_OUT(GPIO116, AF2, DRIVE_LOW)
401#define GPIO14_UCLK MFP_CFG_OUT(GPIO14, AF3, DRIVE_LOW)
402#define GPIO91_UCLK MFP_CFG_OUT(GPIO91, AF2, DRIVE_LOW)
403#define GPIO19_nURST MFP_CFG_OUT(GPIO19, AF3, DRIVE_LOW)
404#define GPIO90_nURST MFP_CFG_OUT(GPIO90, AF2, DRIVE_LOW)
405#define GPIO116_UDET MFP_CFG_IN(GPIO116, AF3)
406#define GPIO114_UEN MFP_CFG_OUT(GPIO114, AF1, DRIVE_LOW)
407#define GPIO115_UEN MFP_CFG_OUT(GPIO115, AF1, DRIVE_LOW)
408
409/* Mobile Scalable Link (MSL) Interface */
410#define GPIO81_BB_OB_DAT_0 MFP_CFG_OUT(GPIO81, AF2, DRIVE_LOW)
411#define GPIO48_BB_OB_DAT_1 MFP_CFG_OUT(GPIO48, AF1, DRIVE_LOW)
412#define GPIO50_BB_OB_DAT_2 MFP_CFG_OUT(GPIO50, AF1, DRIVE_LOW)
413#define GPIO51_BB_OB_DAT_3 MFP_CFG_OUT(GPIO51, AF1, DRIVE_LOW)
414#define GPIO52_BB_OB_CLK MFP_CFG_OUT(GPIO52, AF1, DRIVE_LOW)
415#define GPIO53_BB_OB_STB MFP_CFG_OUT(GPIO53, AF1, DRIVE_LOW)
416#define GPIO54_BB_OB_WAIT MFP_CFG_IN(GPIO54, AF2)
417#define GPIO82_BB_IB_DAT_0 MFP_CFG_IN(GPIO82, AF2)
418#define GPIO55_BB_IB_DAT_1 MFP_CFG_IN(GPIO55, AF2)
419#define GPIO56_BB_IB_DAT_2 MFP_CFG_IN(GPIO56, AF2)
420#define GPIO57_BB_IB_DAT_3 MFP_CFG_IN(GPIO57, AF2)
421#define GPIO83_BB_IB_CLK MFP_CFG_IN(GPIO83, AF2)
422#define GPIO84_BB_IB_STB MFP_CFG_IN(GPIO84, AF2)
423#define GPIO85_BB_IB_WAIT MFP_CFG_OUT(GPIO85, AF2, DRIVE_LOW)
424
425/* Memory Stick Host Controller */
426#define GPIO92_MSBS MFP_CFG_OUT(GPIO92, AF2, DRIVE_LOW)
427#define GPIO109_MSSDIO MFP_CFG_IN(GPIO109, AF2)
428#define GPIO112_nMSINS MFP_CFG_IN(GPIO112, AF2)
429#define GPIO32_MSSCLK MFP_CFG_OUT(GPIO32, AF1, DRIVE_LOW)
430
431extern int keypad_set_wake(unsigned int on);
432#endif /* __ASM_ARCH_MFP_PXA27X_H */
diff --git a/include/asm-arm/arch-pxa/mfp-pxa2xx.h b/include/asm-arm/arch-pxa/mfp-pxa2xx.h
new file mode 100644
index 000000000000..db8d890d237c
--- /dev/null
+++ b/include/asm-arm/arch-pxa/mfp-pxa2xx.h
@@ -0,0 +1,132 @@
1#ifndef __ASM_ARCH_MFP_PXA2XX_H
2#define __ASM_ARCH_MFP_PXA2XX_H
3
4#include <asm/arch/mfp.h>
5
6/*
7 * the following MFP_xxx bit definitions in mfp.h are re-used for pxa2xx:
8 *
9 * MFP_PIN(x)
10 * MFP_AFx
11 * MFP_LPM_DRIVE_{LOW, HIGH}
12 * MFP_LPM_EDGE_x
13 *
14 * other MFP_x bit definitions will be ignored
15 *
16 * and adds the below two bits specifically for pxa2xx:
17 *
18 * bit 23 - Input/Output (PXA2xx specific)
19 * bit 24 - Wakeup Enable(PXA2xx specific)
20 */
21
22#define MFP_DIR_IN (0x0 << 23)
23#define MFP_DIR_OUT (0x1 << 23)
24#define MFP_DIR_MASK (0x1 << 23)
25#define MFP_DIR(x) (((x) >> 23) & 0x1)
26
27#define MFP_LPM_CAN_WAKEUP (0x1 << 24)
28#define WAKEUP_ON_EDGE_RISE (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_RISE)
29#define WAKEUP_ON_EDGE_FALL (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_FALL)
30#define WAKEUP_ON_EDGE_BOTH (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_BOTH)
31
32/* specifically for enabling wakeup on keypad GPIOs */
33#define WAKEUP_ON_LEVEL_HIGH (MFP_LPM_CAN_WAKEUP)
34
35#define MFP_CFG_IN(pin, af) \
36 ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK)) |\
37 (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DIR_IN))
38
39/* NOTE: pins configured as output _must_ provide a low power state,
40 * and this state should help to minimize the power dissipation.
41 */
42#define MFP_CFG_OUT(pin, af, state) \
43 ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK | MFP_LPM_STATE_MASK)) |\
44 (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DIR_OUT | MFP_LPM_##state))
45
46/* Common configurations for pxa25x and pxa27x
47 *
48 * Note: pins configured as GPIO are always initialized to input
49 * so not to cause any side effect
50 */
51#define GPIO0_GPIO MFP_CFG_IN(GPIO0, AF0)
52#define GPIO1_GPIO MFP_CFG_IN(GPIO1, AF0)
53#define GPIO9_GPIO MFP_CFG_IN(GPIO9, AF0)
54#define GPIO10_GPIO MFP_CFG_IN(GPIO10, AF0)
55#define GPIO11_GPIO MFP_CFG_IN(GPIO11, AF0)
56#define GPIO12_GPIO MFP_CFG_IN(GPIO12, AF0)
57#define GPIO13_GPIO MFP_CFG_IN(GPIO13, AF0)
58#define GPIO14_GPIO MFP_CFG_IN(GPIO14, AF0)
59#define GPIO15_GPIO MFP_CFG_IN(GPIO15, AF0)
60#define GPIO16_GPIO MFP_CFG_IN(GPIO16, AF0)
61#define GPIO17_GPIO MFP_CFG_IN(GPIO17, AF0)
62#define GPIO18_GPIO MFP_CFG_IN(GPIO18, AF0)
63#define GPIO19_GPIO MFP_CFG_IN(GPIO19, AF0)
64#define GPIO20_GPIO MFP_CFG_IN(GPIO20, AF0)
65#define GPIO21_GPIO MFP_CFG_IN(GPIO21, AF0)
66#define GPIO22_GPIO MFP_CFG_IN(GPIO22, AF0)
67#define GPIO23_GPIO MFP_CFG_IN(GPIO23, AF0)
68#define GPIO24_GPIO MFP_CFG_IN(GPIO24, AF0)
69#define GPIO25_GPIO MFP_CFG_IN(GPIO25, AF0)
70#define GPIO26_GPIO MFP_CFG_IN(GPIO26, AF0)
71#define GPIO27_GPIO MFP_CFG_IN(GPIO27, AF0)
72#define GPIO28_GPIO MFP_CFG_IN(GPIO28, AF0)
73#define GPIO29_GPIO MFP_CFG_IN(GPIO29, AF0)
74#define GPIO30_GPIO MFP_CFG_IN(GPIO30, AF0)
75#define GPIO31_GPIO MFP_CFG_IN(GPIO31, AF0)
76#define GPIO32_GPIO MFP_CFG_IN(GPIO32, AF0)
77#define GPIO33_GPIO MFP_CFG_IN(GPIO33, AF0)
78#define GPIO34_GPIO MFP_CFG_IN(GPIO34, AF0)
79#define GPIO35_GPIO MFP_CFG_IN(GPIO35, AF0)
80#define GPIO36_GPIO MFP_CFG_IN(GPIO36, AF0)
81#define GPIO37_GPIO MFP_CFG_IN(GPIO37, AF0)
82#define GPIO38_GPIO MFP_CFG_IN(GPIO38, AF0)
83#define GPIO39_GPIO MFP_CFG_IN(GPIO39, AF0)
84#define GPIO40_GPIO MFP_CFG_IN(GPIO40, AF0)
85#define GPIO41_GPIO MFP_CFG_IN(GPIO41, AF0)
86#define GPIO42_GPIO MFP_CFG_IN(GPIO42, AF0)
87#define GPIO43_GPIO MFP_CFG_IN(GPIO43, AF0)
88#define GPIO44_GPIO MFP_CFG_IN(GPIO44, AF0)
89#define GPIO45_GPIO MFP_CFG_IN(GPIO45, AF0)
90#define GPIO46_GPIO MFP_CFG_IN(GPIO46, AF0)
91#define GPIO47_GPIO MFP_CFG_IN(GPIO47, AF0)
92#define GPIO48_GPIO MFP_CFG_IN(GPIO48, AF0)
93#define GPIO49_GPIO MFP_CFG_IN(GPIO49, AF0)
94#define GPIO50_GPIO MFP_CFG_IN(GPIO50, AF0)
95#define GPIO51_GPIO MFP_CFG_IN(GPIO51, AF0)
96#define GPIO52_GPIO MFP_CFG_IN(GPIO52, AF0)
97#define GPIO53_GPIO MFP_CFG_IN(GPIO53, AF0)
98#define GPIO54_GPIO MFP_CFG_IN(GPIO54, AF0)
99#define GPIO55_GPIO MFP_CFG_IN(GPIO55, AF0)
100#define GPIO56_GPIO MFP_CFG_IN(GPIO56, AF0)
101#define GPIO57_GPIO MFP_CFG_IN(GPIO57, AF0)
102#define GPIO58_GPIO MFP_CFG_IN(GPIO58, AF0)
103#define GPIO59_GPIO MFP_CFG_IN(GPIO59, AF0)
104#define GPIO60_GPIO MFP_CFG_IN(GPIO60, AF0)
105#define GPIO61_GPIO MFP_CFG_IN(GPIO61, AF0)
106#define GPIO62_GPIO MFP_CFG_IN(GPIO62, AF0)
107#define GPIO63_GPIO MFP_CFG_IN(GPIO63, AF0)
108#define GPIO64_GPIO MFP_CFG_IN(GPIO64, AF0)
109#define GPIO65_GPIO MFP_CFG_IN(GPIO65, AF0)
110#define GPIO66_GPIO MFP_CFG_IN(GPIO66, AF0)
111#define GPIO67_GPIO MFP_CFG_IN(GPIO67, AF0)
112#define GPIO68_GPIO MFP_CFG_IN(GPIO68, AF0)
113#define GPIO69_GPIO MFP_CFG_IN(GPIO69, AF0)
114#define GPIO70_GPIO MFP_CFG_IN(GPIO70, AF0)
115#define GPIO71_GPIO MFP_CFG_IN(GPIO71, AF0)
116#define GPIO72_GPIO MFP_CFG_IN(GPIO72, AF0)
117#define GPIO73_GPIO MFP_CFG_IN(GPIO73, AF0)
118#define GPIO74_GPIO MFP_CFG_IN(GPIO74, AF0)
119#define GPIO75_GPIO MFP_CFG_IN(GPIO75, AF0)
120#define GPIO76_GPIO MFP_CFG_IN(GPIO76, AF0)
121#define GPIO77_GPIO MFP_CFG_IN(GPIO77, AF0)
122#define GPIO78_GPIO MFP_CFG_IN(GPIO78, AF0)
123#define GPIO79_GPIO MFP_CFG_IN(GPIO79, AF0)
124#define GPIO80_GPIO MFP_CFG_IN(GPIO80, AF0)
125#define GPIO81_GPIO MFP_CFG_IN(GPIO81, AF0)
126#define GPIO82_GPIO MFP_CFG_IN(GPIO82, AF0)
127#define GPIO83_GPIO MFP_CFG_IN(GPIO83, AF0)
128#define GPIO84_GPIO MFP_CFG_IN(GPIO84, AF0)
129
130extern void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num);
131extern int gpio_set_wake(unsigned int gpio, unsigned int on);
132#endif /* __ASM_ARCH_MFP_PXA2XX_H */
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 2357a73340d4..a322012f16ac 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1129,6 +1129,11 @@
1129#define ICPR __REG(0x40D00010) /* Interrupt Controller Pending Register */ 1129#define ICPR __REG(0x40D00010) /* Interrupt Controller Pending Register */
1130#define ICCR __REG(0x40D00014) /* Interrupt Controller Control Register */ 1130#define ICCR __REG(0x40D00014) /* Interrupt Controller Control Register */
1131 1131
1132#define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */
1133#define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */
1134#define ICLR2 __REG(0x40D000A4) /* Interrupt Controller Level Register 2 */
1135#define ICFP2 __REG(0x40D000A8) /* Interrupt Controller FIQ Pending Register 2 */
1136#define ICPR2 __REG(0x40D000AC) /* Interrupt Controller Pending Register 2 */
1132 1137
1133/* 1138/*
1134 * General Purpose I/O 1139 * General Purpose I/O
@@ -1200,12 +1205,6 @@
1200 1205
1201/* Interrupt Controller */ 1206/* Interrupt Controller */
1202 1207
1203#define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */
1204#define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */
1205#define ICLR2 __REG(0x40D000A4) /* Interrupt Controller Level Register 2 */
1206#define ICFP2 __REG(0x40D000A8) /* Interrupt Controller FIQ Pending Register 2 */
1207#define ICPR2 __REG(0x40D000AC) /* Interrupt Controller Pending Register 2 */
1208
1209#define _GPLR(x) __REG2(0x40E00000, ((x) & 0x60) >> 3) 1208#define _GPLR(x) __REG2(0x40E00000, ((x) & 0x60) >> 3)
1210#define _GPDR(x) __REG2(0x40E0000C, ((x) & 0x60) >> 3) 1209#define _GPDR(x) __REG2(0x40E0000C, ((x) & 0x60) >> 3)
1211#define _GPSR(x) __REG2(0x40E00018, ((x) & 0x60) >> 3) 1210#define _GPSR(x) __REG2(0x40E00018, ((x) & 0x60) >> 3)
@@ -1237,267 +1236,6 @@
1237 1236
1238#endif 1237#endif
1239 1238
1240
1241/* GPIO alternate function assignments */
1242
1243#define GPIO1_RST 1 /* reset */
1244#define GPIO6_MMCCLK 6 /* MMC Clock */
1245#define GPIO7_48MHz 7 /* 48 MHz clock output */
1246#define GPIO8_MMCCS0 8 /* MMC Chip Select 0 */
1247#define GPIO9_MMCCS1 9 /* MMC Chip Select 1 */
1248#define GPIO10_RTCCLK 10 /* real time clock (1 Hz) */
1249#define GPIO11_3_6MHz 11 /* 3.6 MHz oscillator out */
1250#define GPIO12_32KHz 12 /* 32 kHz out */
1251#define GPIO13_MBGNT 13 /* memory controller grant */
1252#define GPIO14_MBREQ 14 /* alternate bus master request */
1253#define GPIO15_nCS_1 15 /* chip select 1 */
1254#define GPIO16_PWM0 16 /* PWM0 output */
1255#define GPIO17_PWM1 17 /* PWM1 output */
1256#define GPIO18_RDY 18 /* Ext. Bus Ready */
1257#define GPIO19_DREQ1 19 /* External DMA Request */
1258#define GPIO20_DREQ0 20 /* External DMA Request */
1259#define GPIO23_SCLK 23 /* SSP clock */
1260#define GPIO24_SFRM 24 /* SSP Frame */
1261#define GPIO25_STXD 25 /* SSP transmit */
1262#define GPIO26_SRXD 26 /* SSP receive */
1263#define GPIO27_SEXTCLK 27 /* SSP ext_clk */
1264#define GPIO28_BITCLK 28 /* AC97/I2S bit_clk */
1265#define GPIO29_SDATA_IN 29 /* AC97 Sdata_in0 / I2S Sdata_in */
1266#define GPIO30_SDATA_OUT 30 /* AC97/I2S Sdata_out */
1267#define GPIO31_SYNC 31 /* AC97/I2S sync */
1268#define GPIO32_SDATA_IN1 32 /* AC97 Sdata_in1 */
1269#define GPIO32_SYSCLK 32 /* I2S System Clock */
1270#define GPIO32_MMCCLK 32 /* MMC Clock (PXA270) */
1271#define GPIO33_nCS_5 33 /* chip select 5 */
1272#define GPIO34_FFRXD 34 /* FFUART receive */
1273#define GPIO34_MMCCS0 34 /* MMC Chip Select 0 */
1274#define GPIO35_FFCTS 35 /* FFUART Clear to send */
1275#define GPIO36_FFDCD 36 /* FFUART Data carrier detect */
1276#define GPIO37_FFDSR 37 /* FFUART data set ready */
1277#define GPIO38_FFRI 38 /* FFUART Ring Indicator */
1278#define GPIO39_MMCCS1 39 /* MMC Chip Select 1 */
1279#define GPIO39_FFTXD 39 /* FFUART transmit data */
1280#define GPIO40_FFDTR 40 /* FFUART data terminal Ready */
1281#define GPIO41_FFRTS 41 /* FFUART request to send */
1282#define GPIO42_BTRXD 42 /* BTUART receive data */
1283#define GPIO42_HWRXD 42 /* HWUART receive data */
1284#define GPIO43_BTTXD 43 /* BTUART transmit data */
1285#define GPIO43_HWTXD 43 /* HWUART transmit data */
1286#define GPIO44_BTCTS 44 /* BTUART clear to send */
1287#define GPIO44_HWCTS 44 /* HWUART clear to send */
1288#define GPIO45_BTRTS 45 /* BTUART request to send */
1289#define GPIO45_HWRTS 45 /* HWUART request to send */
1290#define GPIO45_AC97_SYSCLK 45 /* AC97 System Clock */
1291#define GPIO46_ICPRXD 46 /* ICP receive data */
1292#define GPIO46_STRXD 46 /* STD_UART receive data */
1293#define GPIO47_ICPTXD 47 /* ICP transmit data */
1294#define GPIO47_STTXD 47 /* STD_UART transmit data */
1295#define GPIO48_nPOE 48 /* Output Enable for Card Space */
1296#define GPIO49_nPWE 49 /* Write Enable for Card Space */
1297#define GPIO50_nPIOR 50 /* I/O Read for Card Space */
1298#define GPIO51_nPIOW 51 /* I/O Write for Card Space */
1299#define GPIO52_nPCE_1 52 /* Card Enable for Card Space */
1300#define GPIO53_nPCE_2 53 /* Card Enable for Card Space */
1301#define GPIO53_MMCCLK 53 /* MMC Clock */
1302#define GPIO54_MMCCLK 54 /* MMC Clock */
1303#define GPIO54_pSKTSEL 54 /* Socket Select for Card Space */
1304#define GPIO54_nPCE_2 54 /* Card Enable for Card Space (PXA27x) */
1305#define GPIO55_nPREG 55 /* Card Address bit 26 */
1306#define GPIO56_nPWAIT 56 /* Wait signal for Card Space */
1307#define GPIO57_nIOIS16 57 /* Bus Width select for I/O Card Space */
1308#define GPIO58_LDD_0 58 /* LCD data pin 0 */
1309#define GPIO59_LDD_1 59 /* LCD data pin 1 */
1310#define GPIO60_LDD_2 60 /* LCD data pin 2 */
1311#define GPIO61_LDD_3 61 /* LCD data pin 3 */
1312#define GPIO62_LDD_4 62 /* LCD data pin 4 */
1313#define GPIO63_LDD_5 63 /* LCD data pin 5 */
1314#define GPIO64_LDD_6 64 /* LCD data pin 6 */
1315#define GPIO65_LDD_7 65 /* LCD data pin 7 */
1316#define GPIO66_LDD_8 66 /* LCD data pin 8 */
1317#define GPIO66_MBREQ 66 /* alternate bus master req */
1318#define GPIO67_LDD_9 67 /* LCD data pin 9 */
1319#define GPIO67_MMCCS0 67 /* MMC Chip Select 0 */
1320#define GPIO68_LDD_10 68 /* LCD data pin 10 */
1321#define GPIO68_MMCCS1 68 /* MMC Chip Select 1 */
1322#define GPIO69_LDD_11 69 /* LCD data pin 11 */
1323#define GPIO69_MMCCLK 69 /* MMC_CLK */
1324#define GPIO70_LDD_12 70 /* LCD data pin 12 */
1325#define GPIO70_RTCCLK 70 /* Real Time clock (1 Hz) */
1326#define GPIO71_LDD_13 71 /* LCD data pin 13 */
1327#define GPIO71_3_6MHz 71 /* 3.6 MHz Oscillator clock */
1328#define GPIO72_LDD_14 72 /* LCD data pin 14 */
1329#define GPIO72_32kHz 72 /* 32 kHz clock */
1330#define GPIO73_LDD_15 73 /* LCD data pin 15 */
1331#define GPIO73_MBGNT 73 /* Memory controller grant */
1332#define GPIO74_LCD_FCLK 74 /* LCD Frame clock */
1333#define GPIO75_LCD_LCLK 75 /* LCD line clock */
1334#define GPIO76_LCD_PCLK 76 /* LCD Pixel clock */
1335#define GPIO77_LCD_ACBIAS 77 /* LCD AC Bias */
1336#define GPIO78_nCS_2 78 /* chip select 2 */
1337#define GPIO79_nCS_3 79 /* chip select 3 */
1338#define GPIO80_nCS_4 80 /* chip select 4 */
1339#define GPIO81_NSCLK 81 /* NSSP clock */
1340#define GPIO82_NSFRM 82 /* NSSP Frame */
1341#define GPIO83_NSTXD 83 /* NSSP transmit */
1342#define GPIO84_NSRXD 84 /* NSSP receive */
1343#define GPIO85_nPCE_1 85 /* Card Enable for Card Space (PXA27x) */
1344#define GPIO92_MMCDAT0 92 /* MMC DAT0 (PXA27x) */
1345#define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */
1346#define GPIO109_MMCDAT1 109 /* MMC DAT1 (PXA27x) */
1347#define GPIO110_MMCDAT2 110 /* MMC DAT2 (PXA27x) */
1348#define GPIO110_MMCCS0 110 /* MMC Chip Select 0 (PXA27x) */
1349#define GPIO111_MMCDAT3 111 /* MMC DAT3 (PXA27x) */
1350#define GPIO111_MMCCS1 111 /* MMC Chip Select 1 (PXA27x) */
1351#define GPIO112_MMCCMD 112 /* MMC CMD (PXA27x) */
1352#define GPIO113_I2S_SYSCLK 113 /* I2S System Clock (PXA27x) */
1353#define GPIO113_AC97_RESET_N 113 /* AC97 NRESET on (PXA27x) */
1354
1355/* GPIO alternate function mode & direction */
1356
1357#define GPIO_IN 0x000
1358#define GPIO_OUT 0x080
1359#define GPIO_ALT_FN_1_IN 0x100
1360#define GPIO_ALT_FN_1_OUT 0x180
1361#define GPIO_ALT_FN_2_IN 0x200
1362#define GPIO_ALT_FN_2_OUT 0x280
1363#define GPIO_ALT_FN_3_IN 0x300
1364#define GPIO_ALT_FN_3_OUT 0x380
1365#define GPIO_MD_MASK_NR 0x07f
1366#define GPIO_MD_MASK_DIR 0x080
1367#define GPIO_MD_MASK_FN 0x300
1368#define GPIO_DFLT_LOW 0x400
1369#define GPIO_DFLT_HIGH 0x800
1370
1371#define GPIO1_RTS_MD ( 1 | GPIO_ALT_FN_1_IN)
1372#define GPIO6_MMCCLK_MD ( 6 | GPIO_ALT_FN_1_OUT)
1373#define GPIO7_48MHz_MD ( 7 | GPIO_ALT_FN_1_OUT)
1374#define GPIO8_MMCCS0_MD ( 8 | GPIO_ALT_FN_1_OUT)
1375#define GPIO9_MMCCS1_MD ( 9 | GPIO_ALT_FN_1_OUT)
1376#define GPIO10_RTCCLK_MD (10 | GPIO_ALT_FN_1_OUT)
1377#define GPIO11_3_6MHz_MD (11 | GPIO_ALT_FN_1_OUT)
1378#define GPIO12_32KHz_MD (12 | GPIO_ALT_FN_1_OUT)
1379#define GPIO13_MBGNT_MD (13 | GPIO_ALT_FN_2_OUT)
1380#define GPIO14_MBREQ_MD (14 | GPIO_ALT_FN_1_IN)
1381#define GPIO15_nCS_1_MD (15 | GPIO_ALT_FN_2_OUT)
1382#define GPIO16_PWM0_MD (16 | GPIO_ALT_FN_2_OUT)
1383#define GPIO17_PWM1_MD (17 | GPIO_ALT_FN_2_OUT)
1384#define GPIO18_RDY_MD (18 | GPIO_ALT_FN_1_IN)
1385#define GPIO19_DREQ1_MD (19 | GPIO_ALT_FN_1_IN)
1386#define GPIO20_DREQ0_MD (20 | GPIO_ALT_FN_1_IN)
1387#define GPIO23_SCLK_MD (23 | GPIO_ALT_FN_2_OUT)
1388#define GPIO24_SFRM_MD (24 | GPIO_ALT_FN_2_OUT)
1389#define GPIO25_STXD_MD (25 | GPIO_ALT_FN_2_OUT)
1390#define GPIO26_SRXD_MD (26 | GPIO_ALT_FN_1_IN)
1391#define GPIO27_SEXTCLK_MD (27 | GPIO_ALT_FN_1_IN)
1392#define GPIO28_BITCLK_AC97_MD (28 | GPIO_ALT_FN_1_IN)
1393#define GPIO28_BITCLK_IN_I2S_MD (28 | GPIO_ALT_FN_2_IN)
1394#define GPIO28_BITCLK_OUT_I2S_MD (28 | GPIO_ALT_FN_1_OUT)
1395#define GPIO29_SDATA_IN_AC97_MD (29 | GPIO_ALT_FN_1_IN)
1396#define GPIO29_SDATA_IN_I2S_MD (29 | GPIO_ALT_FN_2_IN)
1397#define GPIO30_SDATA_OUT_AC97_MD (30 | GPIO_ALT_FN_2_OUT)
1398#define GPIO30_SDATA_OUT_I2S_MD (30 | GPIO_ALT_FN_1_OUT)
1399#define GPIO31_SYNC_I2S_MD (31 | GPIO_ALT_FN_1_OUT)
1400#define GPIO31_SYNC_AC97_MD (31 | GPIO_ALT_FN_2_OUT)
1401#define GPIO32_SDATA_IN1_AC97_MD (32 | GPIO_ALT_FN_1_IN)
1402#define GPIO32_SYSCLK_I2S_MD (32 | GPIO_ALT_FN_1_OUT)
1403#define GPIO32_MMCCLK_MD ( 32 | GPIO_ALT_FN_2_OUT)
1404#define GPIO33_nCS_5_MD (33 | GPIO_ALT_FN_2_OUT)
1405#define GPIO34_FFRXD_MD (34 | GPIO_ALT_FN_1_IN)
1406#define GPIO34_MMCCS0_MD (34 | GPIO_ALT_FN_2_OUT)
1407#define GPIO35_FFCTS_MD (35 | GPIO_ALT_FN_1_IN)
1408#define GPIO36_FFDCD_MD (36 | GPIO_ALT_FN_1_IN)
1409#define GPIO37_FFDSR_MD (37 | GPIO_ALT_FN_1_IN)
1410#define GPIO38_FFRI_MD (38 | GPIO_ALT_FN_1_IN)
1411#define GPIO39_MMCCS1_MD (39 | GPIO_ALT_FN_1_OUT)
1412#define GPIO39_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT)
1413#define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT)
1414#define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT)
1415#define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN)
1416#define GPIO42_HWRXD_MD (42 | GPIO_ALT_FN_3_IN)
1417#define GPIO43_BTTXD_MD (43 | GPIO_ALT_FN_2_OUT)
1418#define GPIO43_HWTXD_MD (43 | GPIO_ALT_FN_3_OUT)
1419#define GPIO44_BTCTS_MD (44 | GPIO_ALT_FN_1_IN)
1420#define GPIO44_HWCTS_MD (44 | GPIO_ALT_FN_3_IN)
1421#define GPIO45_BTRTS_MD (45 | GPIO_ALT_FN_2_OUT)
1422#define GPIO45_HWRTS_MD (45 | GPIO_ALT_FN_3_OUT)
1423#define GPIO45_SYSCLK_AC97_MD (45 | GPIO_ALT_FN_1_OUT)
1424#define GPIO46_ICPRXD_MD (46 | GPIO_ALT_FN_1_IN)
1425#define GPIO46_STRXD_MD (46 | GPIO_ALT_FN_2_IN)
1426#define GPIO47_ICPTXD_MD (47 | GPIO_ALT_FN_2_OUT)
1427#define GPIO47_STTXD_MD (47 | GPIO_ALT_FN_1_OUT)
1428#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT)
1429#define GPIO48_HWTXD_MD (48 | GPIO_ALT_FN_1_OUT)
1430#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT)
1431#define GPIO49_HWRXD_MD (49 | GPIO_ALT_FN_1_IN)
1432#define GPIO49_nPWE_MD (49 | GPIO_ALT_FN_2_OUT)
1433#define GPIO50_nPIOR_MD (50 | GPIO_ALT_FN_2_OUT)
1434#define GPIO50_HWCTS_MD (50 | GPIO_ALT_FN_1_IN)
1435#define GPIO51_HWRTS_MD (51 | GPIO_ALT_FN_1_OUT)
1436#define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT)
1437#define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT)
1438#define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT)
1439#define GPIO53_MMCCLK_MD (53 | GPIO_ALT_FN_1_OUT)
1440#define GPIO54_MMCCLK_MD (54 | GPIO_ALT_FN_1_OUT)
1441#define GPIO54_nPCE_2_MD (54 | GPIO_ALT_FN_2_OUT)
1442#define GPIO54_pSKTSEL_MD (54 | GPIO_ALT_FN_2_OUT)
1443#define GPIO55_nPREG_MD (55 | GPIO_ALT_FN_2_OUT)
1444#define GPIO56_nPWAIT_MD (56 | GPIO_ALT_FN_1_IN)
1445#define GPIO57_nIOIS16_MD (57 | GPIO_ALT_FN_1_IN)
1446#define GPIO58_LDD_0_MD (58 | GPIO_ALT_FN_2_OUT)
1447#define GPIO59_LDD_1_MD (59 | GPIO_ALT_FN_2_OUT)
1448#define GPIO60_LDD_2_MD (60 | GPIO_ALT_FN_2_OUT)
1449#define GPIO61_LDD_3_MD (61 | GPIO_ALT_FN_2_OUT)
1450#define GPIO62_LDD_4_MD (62 | GPIO_ALT_FN_2_OUT)
1451#define GPIO63_LDD_5_MD (63 | GPIO_ALT_FN_2_OUT)
1452#define GPIO64_LDD_6_MD (64 | GPIO_ALT_FN_2_OUT)
1453#define GPIO65_LDD_7_MD (65 | GPIO_ALT_FN_2_OUT)
1454#define GPIO66_LDD_8_MD (66 | GPIO_ALT_FN_2_OUT)
1455#define GPIO66_MBREQ_MD (66 | GPIO_ALT_FN_1_IN)
1456#define GPIO67_LDD_9_MD (67 | GPIO_ALT_FN_2_OUT)
1457#define GPIO67_MMCCS0_MD (67 | GPIO_ALT_FN_1_OUT)
1458#define GPIO68_LDD_10_MD (68 | GPIO_ALT_FN_2_OUT)
1459#define GPIO68_MMCCS1_MD (68 | GPIO_ALT_FN_1_OUT)
1460#define GPIO69_LDD_11_MD (69 | GPIO_ALT_FN_2_OUT)
1461#define GPIO69_MMCCLK_MD (69 | GPIO_ALT_FN_1_OUT)
1462#define GPIO70_LDD_12_MD (70 | GPIO_ALT_FN_2_OUT)
1463#define GPIO70_RTCCLK_MD (70 | GPIO_ALT_FN_1_OUT)
1464#define GPIO71_LDD_13_MD (71 | GPIO_ALT_FN_2_OUT)
1465#define GPIO71_3_6MHz_MD (71 | GPIO_ALT_FN_1_OUT)
1466#define GPIO72_LDD_14_MD (72 | GPIO_ALT_FN_2_OUT)
1467#define GPIO72_32kHz_MD (72 | GPIO_ALT_FN_1_OUT)
1468#define GPIO73_LDD_15_MD (73 | GPIO_ALT_FN_2_OUT)
1469#define GPIO73_MBGNT_MD (73 | GPIO_ALT_FN_1_OUT)
1470#define GPIO74_LCD_FCLK_MD (74 | GPIO_ALT_FN_2_OUT)
1471#define GPIO75_LCD_LCLK_MD (75 | GPIO_ALT_FN_2_OUT)
1472#define GPIO76_LCD_PCLK_MD (76 | GPIO_ALT_FN_2_OUT)
1473#define GPIO77_LCD_ACBIAS_MD (77 | GPIO_ALT_FN_2_OUT)
1474#define GPIO78_nCS_2_MD (78 | GPIO_ALT_FN_2_OUT)
1475#define GPIO79_nCS_3_MD (79 | GPIO_ALT_FN_2_OUT)
1476#define GPIO79_pSKTSEL_MD (79 | GPIO_ALT_FN_1_OUT)
1477#define GPIO80_nCS_4_MD (80 | GPIO_ALT_FN_2_OUT)
1478#define GPIO81_NSSP_CLK_OUT (81 | GPIO_ALT_FN_1_OUT)
1479#define GPIO81_NSSP_CLK_IN (81 | GPIO_ALT_FN_1_IN)
1480#define GPIO82_NSSP_FRM_OUT (82 | GPIO_ALT_FN_1_OUT)
1481#define GPIO82_NSSP_FRM_IN (82 | GPIO_ALT_FN_1_IN)
1482#define GPIO83_NSSP_TX (83 | GPIO_ALT_FN_1_OUT)
1483#define GPIO83_NSSP_RX (83 | GPIO_ALT_FN_2_IN)
1484#define GPIO84_NSSP_TX (84 | GPIO_ALT_FN_1_OUT)
1485#define GPIO84_NSSP_RX (84 | GPIO_ALT_FN_2_IN)
1486#define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT)
1487#define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT)
1488#define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT)
1489#define GPIO104_pSKTSEL_MD (104 | GPIO_ALT_FN_1_OUT)
1490#define GPIO109_MMCDAT1_MD (109 | GPIO_ALT_FN_1_OUT)
1491#define GPIO110_MMCDAT2_MD (110 | GPIO_ALT_FN_1_OUT)
1492#define GPIO110_MMCCS0_MD (110 | GPIO_ALT_FN_1_OUT)
1493#define GPIO111_MMCDAT3_MD (111 | GPIO_ALT_FN_1_OUT)
1494#define GPIO110_MMCCS1_MD (111 | GPIO_ALT_FN_1_OUT)
1495#define GPIO112_MMCCMD_MD (112 | GPIO_ALT_FN_1_OUT)
1496#define GPIO113_I2S_SYSCLK_MD (113 | GPIO_ALT_FN_1_OUT)
1497#define GPIO113_AC97_RESET_N_MD (113 | GPIO_ALT_FN_2_OUT)
1498#define GPIO117_I2CSCL_MD (117 | GPIO_ALT_FN_1_IN)
1499#define GPIO118_I2CSDA_MD (118 | GPIO_ALT_FN_1_IN)
1500
1501/* 1239/*
1502 * Power Manager 1240 * Power Manager
1503 */ 1241 */
@@ -1866,62 +1604,6 @@
1866 1604
1867#ifdef CONFIG_PXA27x 1605#ifdef CONFIG_PXA27x
1868 1606
1869/*
1870 * Keypad
1871 */
1872#define KPC __REG(0x41500000) /* Keypad Interface Control register */
1873#define KPDK __REG(0x41500008) /* Keypad Interface Direct Key register */
1874#define KPREC __REG(0x41500010) /* Keypad Interface Rotary Encoder register */
1875#define KPMK __REG(0x41500018) /* Keypad Interface Matrix Key register */
1876#define KPAS __REG(0x41500020) /* Keypad Interface Automatic Scan register */
1877#define KPASMKP0 __REG(0x41500028) /* Keypad Interface Automatic Scan Multiple Key Presser register 0 */
1878#define KPASMKP1 __REG(0x41500030) /* Keypad Interface Automatic Scan Multiple Key Presser register 1 */
1879#define KPASMKP2 __REG(0x41500038) /* Keypad Interface Automatic Scan Multiple Key Presser register 2 */
1880#define KPASMKP3 __REG(0x41500040) /* Keypad Interface Automatic Scan Multiple Key Presser register 3 */
1881#define KPKDI __REG(0x41500048) /* Keypad Interface Key Debounce Interval register */
1882
1883#define KPC_AS (0x1 << 30) /* Automatic Scan bit */
1884#define KPC_ASACT (0x1 << 29) /* Automatic Scan on Activity */
1885#define KPC_MI (0x1 << 22) /* Matrix interrupt bit */
1886#define KPC_IMKP (0x1 << 21) /* Ignore Multiple Key Press */
1887#define KPC_MS7 (0x1 << 20) /* Matrix scan line 7 */
1888#define KPC_MS6 (0x1 << 19) /* Matrix scan line 6 */
1889#define KPC_MS5 (0x1 << 18) /* Matrix scan line 5 */
1890#define KPC_MS4 (0x1 << 17) /* Matrix scan line 4 */
1891#define KPC_MS3 (0x1 << 16) /* Matrix scan line 3 */
1892#define KPC_MS2 (0x1 << 15) /* Matrix scan line 2 */
1893#define KPC_MS1 (0x1 << 14) /* Matrix scan line 1 */
1894#define KPC_MS0 (0x1 << 13) /* Matrix scan line 0 */
1895#define KPC_MS_ALL (KPC_MS0 | KPC_MS1 | KPC_MS2 | KPC_MS3 | KPC_MS4 | KPC_MS5 | KPC_MS6 | KPC_MS7)
1896#define KPC_ME (0x1 << 12) /* Matrix Keypad Enable */
1897#define KPC_MIE (0x1 << 11) /* Matrix Interrupt Enable */
1898#define KPC_DK_DEB_SEL (0x1 << 9) /* Direct Keypad Debounce Select */
1899#define KPC_DI (0x1 << 5) /* Direct key interrupt bit */
1900#define KPC_RE_ZERO_DEB (0x1 << 4) /* Rotary Encoder Zero Debounce */
1901#define KPC_REE1 (0x1 << 3) /* Rotary Encoder1 Enable */
1902#define KPC_REE0 (0x1 << 2) /* Rotary Encoder0 Enable */
1903#define KPC_DE (0x1 << 1) /* Direct Keypad Enable */
1904#define KPC_DIE (0x1 << 0) /* Direct Keypad interrupt Enable */
1905
1906#define KPDK_DKP (0x1 << 31)
1907#define KPDK_DK7 (0x1 << 7)
1908#define KPDK_DK6 (0x1 << 6)
1909#define KPDK_DK5 (0x1 << 5)
1910#define KPDK_DK4 (0x1 << 4)
1911#define KPDK_DK3 (0x1 << 3)
1912#define KPDK_DK2 (0x1 << 2)
1913#define KPDK_DK1 (0x1 << 1)
1914#define KPDK_DK0 (0x1 << 0)
1915
1916#define KPREC_OF1 (0x1 << 31)
1917#define kPREC_UF1 (0x1 << 30)
1918#define KPREC_OF0 (0x1 << 15)
1919#define KPREC_UF0 (0x1 << 14)
1920
1921#define KPMK_MKP (0x1 << 31)
1922#define KPAS_SO (0x1 << 31)
1923#define KPASMKPx_SO (0x1 << 31)
1924
1925/* Camera Interface */ 1607/* Camera Interface */
1926#define CICR0 __REG(0x50000000) 1608#define CICR0 __REG(0x50000000)
1927#define CICR1 __REG(0x50000004) 1609#define CICR1 __REG(0x50000004)
@@ -1953,7 +1635,7 @@
1953#define CICR0_FOM (1 << 0) /* FIFO-overrun mask */ 1635#define CICR0_FOM (1 << 0) /* FIFO-overrun mask */
1954 1636
1955#define CICR1_TBIT (1 << 31) /* Transparency bit */ 1637#define CICR1_TBIT (1 << 31) /* Transparency bit */
1956#define CICR1_RGBT_CONV (0x3 << 30) /* RGBT conversion mask */ 1638#define CICR1_RGBT_CONV (0x3 << 29) /* RGBT conversion mask */
1957#define CICR1_PPL (0x7ff << 15) /* Pixels per line mask */ 1639#define CICR1_PPL (0x7ff << 15) /* Pixels per line mask */
1958#define CICR1_RGB_CONV (0x7 << 12) /* RGB conversion mask */ 1640#define CICR1_RGB_CONV (0x7 << 12) /* RGB conversion mask */
1959#define CICR1_RGB_F (1 << 11) /* RGB format */ 1641#define CICR1_RGB_F (1 << 11) /* RGB format */
diff --git a/include/asm-arm/arch-pxa/pxa27x_keypad.h b/include/asm-arm/arch-pxa/pxa27x_keypad.h
index 644f7609b523..d5a48a96dea7 100644
--- a/include/asm-arm/arch-pxa/pxa27x_keypad.h
+++ b/include/asm-arm/arch-pxa/pxa27x_keypad.h
@@ -53,4 +53,6 @@ struct pxa27x_keypad_platform_data {
53 53
54#define KEY(row, col, val) (((row) << 28) | ((col) << 24) | (val)) 54#define KEY(row, col, val) (((row) << 28) | ((col) << 24) | (val))
55 55
56extern void pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info);
57
56#endif /* __ASM_ARCH_PXA27x_KEYPAD_H */ 58#endif /* __ASM_ARCH_PXA27x_KEYPAD_H */
diff --git a/include/asm-arm/arch-pxa/pxa2xx-gpio.h b/include/asm-arm/arch-pxa/pxa2xx-gpio.h
new file mode 100644
index 000000000000..763313c5e6be
--- /dev/null
+++ b/include/asm-arm/arch-pxa/pxa2xx-gpio.h
@@ -0,0 +1,357 @@
1#ifndef __ASM_ARCH_PXA2XX_GPIO_H
2#define __ASM_ARCH_PXA2XX_GPIO_H
3
4/* GPIO alternate function assignments */
5
6#define GPIO1_RST 1 /* reset */
7#define GPIO6_MMCCLK 6 /* MMC Clock */
8#define GPIO7_48MHz 7 /* 48 MHz clock output */
9#define GPIO8_MMCCS0 8 /* MMC Chip Select 0 */
10#define GPIO9_MMCCS1 9 /* MMC Chip Select 1 */
11#define GPIO10_RTCCLK 10 /* real time clock (1 Hz) */
12#define GPIO11_3_6MHz 11 /* 3.6 MHz oscillator out */
13#define GPIO12_32KHz 12 /* 32 kHz out */
14#define GPIO12_CIF_DD_7 12 /* Camera data pin 7 */
15#define GPIO13_MBGNT 13 /* memory controller grant */
16#define GPIO14_MBREQ 14 /* alternate bus master request */
17#define GPIO15_nCS_1 15 /* chip select 1 */
18#define GPIO16_PWM0 16 /* PWM0 output */
19#define GPIO17_PWM1 17 /* PWM1 output */
20#define GPIO17_CIF_DD_6 17 /* Camera data pin 6 */
21#define GPIO18_RDY 18 /* Ext. Bus Ready */
22#define GPIO19_DREQ1 19 /* External DMA Request */
23#define GPIO20_DREQ0 20 /* External DMA Request */
24#define GPIO23_SCLK 23 /* SSP clock */
25#define GPIO23_CIF_MCLK 23 /* Camera Master Clock */
26#define GPIO24_SFRM 24 /* SSP Frame */
27#define GPIO24_CIF_FV 24 /* Camera frame start signal */
28#define GPIO25_STXD 25 /* SSP transmit */
29#define GPIO25_CIF_LV 25 /* Camera line start signal */
30#define GPIO26_SRXD 26 /* SSP receive */
31#define GPIO26_CIF_PCLK 26 /* Camera Pixel Clock */
32#define GPIO27_SEXTCLK 27 /* SSP ext_clk */
33#define GPIO27_CIF_DD_0 27 /* Camera data pin 0 */
34#define GPIO28_BITCLK 28 /* AC97/I2S bit_clk */
35#define GPIO29_SDATA_IN 29 /* AC97 Sdata_in0 / I2S Sdata_in */
36#define GPIO30_SDATA_OUT 30 /* AC97/I2S Sdata_out */
37#define GPIO31_SYNC 31 /* AC97/I2S sync */
38#define GPIO32_SDATA_IN1 32 /* AC97 Sdata_in1 */
39#define GPIO32_SYSCLK 32 /* I2S System Clock */
40#define GPIO32_MMCCLK 32 /* MMC Clock (PXA270) */
41#define GPIO33_nCS_5 33 /* chip select 5 */
42#define GPIO34_FFRXD 34 /* FFUART receive */
43#define GPIO34_MMCCS0 34 /* MMC Chip Select 0 */
44#define GPIO35_FFCTS 35 /* FFUART Clear to send */
45#define GPIO36_FFDCD 36 /* FFUART Data carrier detect */
46#define GPIO37_FFDSR 37 /* FFUART data set ready */
47#define GPIO38_FFRI 38 /* FFUART Ring Indicator */
48#define GPIO39_MMCCS1 39 /* MMC Chip Select 1 */
49#define GPIO39_FFTXD 39 /* FFUART transmit data */
50#define GPIO40_FFDTR 40 /* FFUART data terminal Ready */
51#define GPIO41_FFRTS 41 /* FFUART request to send */
52#define GPIO42_BTRXD 42 /* BTUART receive data */
53#define GPIO42_HWRXD 42 /* HWUART receive data */
54#define GPIO42_CIF_MCLK 42 /* Camera Master Clock */
55#define GPIO43_BTTXD 43 /* BTUART transmit data */
56#define GPIO43_HWTXD 43 /* HWUART transmit data */
57#define GPIO43_CIF_FV 43 /* Camera frame start signal */
58#define GPIO44_BTCTS 44 /* BTUART clear to send */
59#define GPIO44_HWCTS 44 /* HWUART clear to send */
60#define GPIO44_CIF_LV 44 /* Camera line start signal */
61#define GPIO45_BTRTS 45 /* BTUART request to send */
62#define GPIO45_HWRTS 45 /* HWUART request to send */
63#define GPIO45_AC97_SYSCLK 45 /* AC97 System Clock */
64#define GPIO45_CIF_PCLK 45 /* Camera Pixel Clock */
65#define GPIO46_ICPRXD 46 /* ICP receive data */
66#define GPIO46_STRXD 46 /* STD_UART receive data */
67#define GPIO47_ICPTXD 47 /* ICP transmit data */
68#define GPIO47_STTXD 47 /* STD_UART transmit data */
69#define GPIO47_CIF_DD_0 47 /* Camera data pin 0 */
70#define GPIO48_nPOE 48 /* Output Enable for Card Space */
71#define GPIO48_CIF_DD_5 48 /* Camera data pin 5 */
72#define GPIO49_nPWE 49 /* Write Enable for Card Space */
73#define GPIO50_nPIOR 50 /* I/O Read for Card Space */
74#define GPIO50_CIF_DD_3 50 /* Camera data pin 3 */
75#define GPIO51_nPIOW 51 /* I/O Write for Card Space */
76#define GPIO51_CIF_DD_2 51 /* Camera data pin 2 */
77#define GPIO52_nPCE_1 52 /* Card Enable for Card Space */
78#define GPIO52_CIF_DD_4 52 /* Camera data pin 4 */
79#define GPIO53_nPCE_2 53 /* Card Enable for Card Space */
80#define GPIO53_MMCCLK 53 /* MMC Clock */
81#define GPIO53_CIF_MCLK 53 /* Camera Master Clock */
82#define GPIO54_MMCCLK 54 /* MMC Clock */
83#define GPIO54_pSKTSEL 54 /* Socket Select for Card Space */
84#define GPIO54_nPCE_2 54 /* Card Enable for Card Space (PXA27x) */
85#define GPIO54_CIF_PCLK 54 /* Camera Pixel Clock */
86#define GPIO55_nPREG 55 /* Card Address bit 26 */
87#define GPIO55_CIF_DD_1 55 /* Camera data pin 1 */
88#define GPIO56_nPWAIT 56 /* Wait signal for Card Space */
89#define GPIO57_nIOIS16 57 /* Bus Width select for I/O Card Space */
90#define GPIO58_LDD_0 58 /* LCD data pin 0 */
91#define GPIO59_LDD_1 59 /* LCD data pin 1 */
92#define GPIO60_LDD_2 60 /* LCD data pin 2 */
93#define GPIO61_LDD_3 61 /* LCD data pin 3 */
94#define GPIO62_LDD_4 62 /* LCD data pin 4 */
95#define GPIO63_LDD_5 63 /* LCD data pin 5 */
96#define GPIO64_LDD_6 64 /* LCD data pin 6 */
97#define GPIO65_LDD_7 65 /* LCD data pin 7 */
98#define GPIO66_LDD_8 66 /* LCD data pin 8 */
99#define GPIO66_MBREQ 66 /* alternate bus master req */
100#define GPIO67_LDD_9 67 /* LCD data pin 9 */
101#define GPIO67_MMCCS0 67 /* MMC Chip Select 0 */
102#define GPIO68_LDD_10 68 /* LCD data pin 10 */
103#define GPIO68_MMCCS1 68 /* MMC Chip Select 1 */
104#define GPIO69_LDD_11 69 /* LCD data pin 11 */
105#define GPIO69_MMCCLK 69 /* MMC_CLK */
106#define GPIO70_LDD_12 70 /* LCD data pin 12 */
107#define GPIO70_RTCCLK 70 /* Real Time clock (1 Hz) */
108#define GPIO71_LDD_13 71 /* LCD data pin 13 */
109#define GPIO71_3_6MHz 71 /* 3.6 MHz Oscillator clock */
110#define GPIO72_LDD_14 72 /* LCD data pin 14 */
111#define GPIO72_32kHz 72 /* 32 kHz clock */
112#define GPIO73_LDD_15 73 /* LCD data pin 15 */
113#define GPIO73_MBGNT 73 /* Memory controller grant */
114#define GPIO74_LCD_FCLK 74 /* LCD Frame clock */
115#define GPIO75_LCD_LCLK 75 /* LCD line clock */
116#define GPIO76_LCD_PCLK 76 /* LCD Pixel clock */
117#define GPIO77_LCD_ACBIAS 77 /* LCD AC Bias */
118#define GPIO78_nCS_2 78 /* chip select 2 */
119#define GPIO79_nCS_3 79 /* chip select 3 */
120#define GPIO80_nCS_4 80 /* chip select 4 */
121#define GPIO81_NSCLK 81 /* NSSP clock */
122#define GPIO81_CIF_DD_0 81 /* Camera data pin 0 */
123#define GPIO82_NSFRM 82 /* NSSP Frame */
124#define GPIO82_CIF_DD_5 82 /* Camera data pin 5 */
125#define GPIO83_NSTXD 83 /* NSSP transmit */
126#define GPIO83_CIF_DD_4 83 /* Camera data pin 4 */
127#define GPIO84_NSRXD 84 /* NSSP receive */
128#define GPIO84_CIF_FV 84 /* Camera frame start signal */
129#define GPIO85_nPCE_1 85 /* Card Enable for Card Space (PXA27x) */
130#define GPIO85_CIF_LV 85 /* Camera line start signal */
131#define GPIO90_CIF_DD_4 90 /* Camera data pin 4 */
132#define GPIO91_CIF_DD_5 91 /* Camera data pin 5 */
133#define GPIO92_MMCDAT0 92 /* MMC DAT0 (PXA27x) */
134#define GPIO93_CIF_DD_6 93 /* Camera data pin 6 */
135#define GPIO94_CIF_DD_5 94 /* Camera data pin 5 */
136#define GPIO95_CIF_DD_4 95 /* Camera data pin 4 */
137#define GPIO98_CIF_DD_0 98 /* Camera data pin 0 */
138#define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */
139#define GPIO103_CIF_DD_3 103 /* Camera data pin 3 */
140#define GPIO104_CIF_DD_2 104 /* Camera data pin 2 */
141#define GPIO105_CIF_DD_1 105 /* Camera data pin 1 */
142#define GPIO106_CIF_DD_9 106 /* Camera data pin 9 */
143#define GPIO107_CIF_DD_8 107 /* Camera data pin 8 */
144#define GPIO108_CIF_DD_7 108 /* Camera data pin 7 */
145#define GPIO109_MMCDAT1 109 /* MMC DAT1 (PXA27x) */
146#define GPIO110_MMCDAT2 110 /* MMC DAT2 (PXA27x) */
147#define GPIO110_MMCCS0 110 /* MMC Chip Select 0 (PXA27x) */
148#define GPIO111_MMCDAT3 111 /* MMC DAT3 (PXA27x) */
149#define GPIO111_MMCCS1 111 /* MMC Chip Select 1 (PXA27x) */
150#define GPIO112_MMCCMD 112 /* MMC CMD (PXA27x) */
151#define GPIO113_I2S_SYSCLK 113 /* I2S System Clock (PXA27x) */
152#define GPIO113_AC97_RESET_N 113 /* AC97 NRESET on (PXA27x) */
153#define GPIO114_CIF_DD_1 114 /* Camera data pin 1 */
154#define GPIO115_CIF_DD_3 115 /* Camera data pin 3 */
155#define GPIO116_CIF_DD_2 116 /* Camera data pin 2 */
156
157/* GPIO alternate function mode & direction */
158
159#define GPIO_IN 0x000
160#define GPIO_OUT 0x080
161#define GPIO_ALT_FN_1_IN 0x100
162#define GPIO_ALT_FN_1_OUT 0x180
163#define GPIO_ALT_FN_2_IN 0x200
164#define GPIO_ALT_FN_2_OUT 0x280
165#define GPIO_ALT_FN_3_IN 0x300
166#define GPIO_ALT_FN_3_OUT 0x380
167#define GPIO_MD_MASK_NR 0x07f
168#define GPIO_MD_MASK_DIR 0x080
169#define GPIO_MD_MASK_FN 0x300
170#define GPIO_DFLT_LOW 0x400
171#define GPIO_DFLT_HIGH 0x800
172
173#define GPIO1_RTS_MD ( 1 | GPIO_ALT_FN_1_IN)
174#define GPIO6_MMCCLK_MD ( 6 | GPIO_ALT_FN_1_OUT)
175#define GPIO7_48MHz_MD ( 7 | GPIO_ALT_FN_1_OUT)
176#define GPIO8_MMCCS0_MD ( 8 | GPIO_ALT_FN_1_OUT)
177#define GPIO9_MMCCS1_MD ( 9 | GPIO_ALT_FN_1_OUT)
178#define GPIO10_RTCCLK_MD (10 | GPIO_ALT_FN_1_OUT)
179#define GPIO11_3_6MHz_MD (11 | GPIO_ALT_FN_1_OUT)
180#define GPIO12_32KHz_MD (12 | GPIO_ALT_FN_1_OUT)
181#define GPIO12_CIF_DD_7_MD (12 | GPIO_ALT_FN_2_IN)
182#define GPIO13_MBGNT_MD (13 | GPIO_ALT_FN_2_OUT)
183#define GPIO14_MBREQ_MD (14 | GPIO_ALT_FN_1_IN)
184#define GPIO15_nCS_1_MD (15 | GPIO_ALT_FN_2_OUT)
185#define GPIO16_PWM0_MD (16 | GPIO_ALT_FN_2_OUT)
186#define GPIO17_PWM1_MD (17 | GPIO_ALT_FN_2_OUT)
187#define GPIO17_CIF_DD_6_MD (17 | GPIO_ALT_FN_2_IN)
188#define GPIO18_RDY_MD (18 | GPIO_ALT_FN_1_IN)
189#define GPIO19_DREQ1_MD (19 | GPIO_ALT_FN_1_IN)
190#define GPIO20_DREQ0_MD (20 | GPIO_ALT_FN_1_IN)
191#define GPIO23_CIF_MCLK_MD (23 | GPIO_ALT_FN_1_OUT)
192#define GPIO23_SCLK_MD (23 | GPIO_ALT_FN_2_OUT)
193#define GPIO24_CIF_FV_MD (24 | GPIO_ALT_FN_1_OUT)
194#define GPIO24_SFRM_MD (24 | GPIO_ALT_FN_2_OUT)
195#define GPIO25_CIF_LV_MD (25 | GPIO_ALT_FN_1_OUT)
196#define GPIO25_STXD_MD (25 | GPIO_ALT_FN_2_OUT)
197#define GPIO26_SRXD_MD (26 | GPIO_ALT_FN_1_IN)
198#define GPIO26_CIF_PCLK_MD (26 | GPIO_ALT_FN_2_IN)
199#define GPIO27_SEXTCLK_MD (27 | GPIO_ALT_FN_1_IN)
200#define GPIO27_CIF_DD_0_MD (27 | GPIO_ALT_FN_3_IN)
201#define GPIO28_BITCLK_AC97_MD (28 | GPIO_ALT_FN_1_IN)
202#define GPIO28_BITCLK_IN_I2S_MD (28 | GPIO_ALT_FN_2_IN)
203#define GPIO28_BITCLK_OUT_I2S_MD (28 | GPIO_ALT_FN_1_OUT)
204#define GPIO29_SDATA_IN_AC97_MD (29 | GPIO_ALT_FN_1_IN)
205#define GPIO29_SDATA_IN_I2S_MD (29 | GPIO_ALT_FN_2_IN)
206#define GPIO30_SDATA_OUT_AC97_MD (30 | GPIO_ALT_FN_2_OUT)
207#define GPIO30_SDATA_OUT_I2S_MD (30 | GPIO_ALT_FN_1_OUT)
208#define GPIO31_SYNC_I2S_MD (31 | GPIO_ALT_FN_1_OUT)
209#define GPIO31_SYNC_AC97_MD (31 | GPIO_ALT_FN_2_OUT)
210#define GPIO32_SDATA_IN1_AC97_MD (32 | GPIO_ALT_FN_1_IN)
211#define GPIO32_SYSCLK_I2S_MD (32 | GPIO_ALT_FN_1_OUT)
212#define GPIO32_MMCCLK_MD (32 | GPIO_ALT_FN_2_OUT)
213#define GPIO33_nCS_5_MD (33 | GPIO_ALT_FN_2_OUT)
214#define GPIO34_FFRXD_MD (34 | GPIO_ALT_FN_1_IN)
215#define GPIO34_MMCCS0_MD (34 | GPIO_ALT_FN_2_OUT)
216#define GPIO35_FFCTS_MD (35 | GPIO_ALT_FN_1_IN)
217#define GPIO35_KP_MKOUT6_MD (35 | GPIO_ALT_FN_2_OUT)
218#define GPIO36_FFDCD_MD (36 | GPIO_ALT_FN_1_IN)
219#define GPIO37_FFDSR_MD (37 | GPIO_ALT_FN_1_IN)
220#define GPIO38_FFRI_MD (38 | GPIO_ALT_FN_1_IN)
221#define GPIO39_MMCCS1_MD (39 | GPIO_ALT_FN_1_OUT)
222#define GPIO39_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT)
223#define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT)
224#define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT)
225#define GPIO41_KP_MKOUT7_MD (41 | GPIO_ALT_FN_1_OUT)
226#define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN)
227#define GPIO42_HWRXD_MD (42 | GPIO_ALT_FN_3_IN)
228#define GPIO42_CIF_MCLK_MD (42 | GPIO_ALT_FN_3_OUT)
229#define GPIO43_BTTXD_MD (43 | GPIO_ALT_FN_2_OUT)
230#define GPIO43_HWTXD_MD (43 | GPIO_ALT_FN_3_OUT)
231#define GPIO43_CIF_FV_MD (43 | GPIO_ALT_FN_3_OUT)
232#define GPIO44_BTCTS_MD (44 | GPIO_ALT_FN_1_IN)
233#define GPIO44_HWCTS_MD (44 | GPIO_ALT_FN_3_IN)
234#define GPIO44_CIF_LV_MD (44 | GPIO_ALT_FN_3_OUT)
235#define GPIO45_CIF_PCLK_MD (45 | GPIO_ALT_FN_3_IN)
236#define GPIO45_BTRTS_MD (45 | GPIO_ALT_FN_2_OUT)
237#define GPIO45_HWRTS_MD (45 | GPIO_ALT_FN_3_OUT)
238#define GPIO45_SYSCLK_AC97_MD (45 | GPIO_ALT_FN_1_OUT)
239#define GPIO46_ICPRXD_MD (46 | GPIO_ALT_FN_1_IN)
240#define GPIO46_STRXD_MD (46 | GPIO_ALT_FN_2_IN)
241#define GPIO47_CIF_DD_0_MD (47 | GPIO_ALT_FN_1_IN)
242#define GPIO47_ICPTXD_MD (47 | GPIO_ALT_FN_2_OUT)
243#define GPIO47_STTXD_MD (47 | GPIO_ALT_FN_1_OUT)
244#define GPIO48_CIF_DD_5_MD (48 | GPIO_ALT_FN_1_IN)
245#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT)
246#define GPIO48_HWTXD_MD (48 | GPIO_ALT_FN_1_OUT)
247#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT)
248#define GPIO49_HWRXD_MD (49 | GPIO_ALT_FN_1_IN)
249#define GPIO49_nPWE_MD (49 | GPIO_ALT_FN_2_OUT)
250#define GPIO50_CIF_DD_3_MD (50 | GPIO_ALT_FN_1_IN)
251#define GPIO50_nPIOR_MD (50 | GPIO_ALT_FN_2_OUT)
252#define GPIO50_HWCTS_MD (50 | GPIO_ALT_FN_1_IN)
253#define GPIO50_CIF_DD_3_MD (50 | GPIO_ALT_FN_1_IN)
254#define GPIO51_CIF_DD_2_MD (51 | GPIO_ALT_FN_1_IN)
255#define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT)
256#define GPIO51_HWRTS_MD (51 | GPIO_ALT_FN_1_OUT)
257#define GPIO51_CIF_DD_2_MD (51 | GPIO_ALT_FN_1_IN)
258#define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT)
259#define GPIO52_CIF_DD_4_MD (52 | GPIO_ALT_FN_1_IN)
260#define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT)
261#define GPIO53_MMCCLK_MD (53 | GPIO_ALT_FN_1_OUT)
262#define GPIO53_CIF_MCLK_MD (53 | GPIO_ALT_FN_2_OUT)
263#define GPIO54_MMCCLK_MD (54 | GPIO_ALT_FN_1_OUT)
264#define GPIO54_nPCE_2_MD (54 | GPIO_ALT_FN_2_OUT)
265#define GPIO54_pSKTSEL_MD (54 | GPIO_ALT_FN_2_OUT)
266#define GPIO54_CIF_PCLK_MD (54 | GPIO_ALT_FN_3_IN)
267#define GPIO55_nPREG_MD (55 | GPIO_ALT_FN_2_OUT)
268#define GPIO55_CIF_DD_1_MD (55 | GPIO_ALT_FN_1_IN)
269#define GPIO56_nPWAIT_MD (56 | GPIO_ALT_FN_1_IN)
270#define GPIO57_nIOIS16_MD (57 | GPIO_ALT_FN_1_IN)
271#define GPIO58_LDD_0_MD (58 | GPIO_ALT_FN_2_OUT)
272#define GPIO59_LDD_1_MD (59 | GPIO_ALT_FN_2_OUT)
273#define GPIO60_LDD_2_MD (60 | GPIO_ALT_FN_2_OUT)
274#define GPIO61_LDD_3_MD (61 | GPIO_ALT_FN_2_OUT)
275#define GPIO62_LDD_4_MD (62 | GPIO_ALT_FN_2_OUT)
276#define GPIO63_LDD_5_MD (63 | GPIO_ALT_FN_2_OUT)
277#define GPIO64_LDD_6_MD (64 | GPIO_ALT_FN_2_OUT)
278#define GPIO65_LDD_7_MD (65 | GPIO_ALT_FN_2_OUT)
279#define GPIO66_LDD_8_MD (66 | GPIO_ALT_FN_2_OUT)
280#define GPIO66_MBREQ_MD (66 | GPIO_ALT_FN_1_IN)
281#define GPIO67_LDD_9_MD (67 | GPIO_ALT_FN_2_OUT)
282#define GPIO67_MMCCS0_MD (67 | GPIO_ALT_FN_1_OUT)
283#define GPIO68_LDD_10_MD (68 | GPIO_ALT_FN_2_OUT)
284#define GPIO68_MMCCS1_MD (68 | GPIO_ALT_FN_1_OUT)
285#define GPIO69_LDD_11_MD (69 | GPIO_ALT_FN_2_OUT)
286#define GPIO69_MMCCLK_MD (69 | GPIO_ALT_FN_1_OUT)
287#define GPIO70_LDD_12_MD (70 | GPIO_ALT_FN_2_OUT)
288#define GPIO70_RTCCLK_MD (70 | GPIO_ALT_FN_1_OUT)
289#define GPIO71_LDD_13_MD (71 | GPIO_ALT_FN_2_OUT)
290#define GPIO71_3_6MHz_MD (71 | GPIO_ALT_FN_1_OUT)
291#define GPIO72_LDD_14_MD (72 | GPIO_ALT_FN_2_OUT)
292#define GPIO72_32kHz_MD (72 | GPIO_ALT_FN_1_OUT)
293#define GPIO73_LDD_15_MD (73 | GPIO_ALT_FN_2_OUT)
294#define GPIO73_MBGNT_MD (73 | GPIO_ALT_FN_1_OUT)
295#define GPIO74_LCD_FCLK_MD (74 | GPIO_ALT_FN_2_OUT)
296#define GPIO75_LCD_LCLK_MD (75 | GPIO_ALT_FN_2_OUT)
297#define GPIO76_LCD_PCLK_MD (76 | GPIO_ALT_FN_2_OUT)
298#define GPIO77_LCD_ACBIAS_MD (77 | GPIO_ALT_FN_2_OUT)
299#define GPIO78_nCS_2_MD (78 | GPIO_ALT_FN_2_OUT)
300#define GPIO78_nPCE_2_MD (78 | GPIO_ALT_FN_1_OUT)
301#define GPIO79_nCS_3_MD (79 | GPIO_ALT_FN_2_OUT)
302#define GPIO79_pSKTSEL_MD (79 | GPIO_ALT_FN_1_OUT)
303#define GPIO80_nCS_4_MD (80 | GPIO_ALT_FN_2_OUT)
304#define GPIO81_NSSP_CLK_OUT (81 | GPIO_ALT_FN_1_OUT)
305#define GPIO81_NSSP_CLK_IN (81 | GPIO_ALT_FN_1_IN)
306#define GPIO81_CIF_DD_0_MD (81 | GPIO_ALT_FN_2_IN)
307#define GPIO82_NSSP_FRM_OUT (82 | GPIO_ALT_FN_1_OUT)
308#define GPIO82_NSSP_FRM_IN (82 | GPIO_ALT_FN_1_IN)
309#define GPIO82_CIF_DD_5_MD (82 | GPIO_ALT_FN_3_IN)
310#define GPIO83_NSSP_TX (83 | GPIO_ALT_FN_1_OUT)
311#define GPIO83_NSSP_RX (83 | GPIO_ALT_FN_2_IN)
312#define GPIO83_CIF_DD_4_MD (83 | GPIO_ALT_FN_3_IN)
313#define GPIO84_NSSP_TX (84 | GPIO_ALT_FN_1_OUT)
314#define GPIO84_NSSP_RX (84 | GPIO_ALT_FN_2_IN)
315#define GPIO84_CIF_FV_MD (84 | GPIO_ALT_FN_3_IN)
316#define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT)
317#define GPIO85_CIF_LV_MD (85 | GPIO_ALT_FN_3_IN)
318#define GPIO86_nPCE_1_MD (86 | GPIO_ALT_FN_1_OUT)
319#define GPIO90_CIF_DD_4_MD (90 | GPIO_ALT_FN_3_IN)
320#define GPIO91_CIF_DD_5_MD (91 | GPIO_ALT_FN_3_IN)
321#define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT)
322#define GPIO93_CIF_DD_6_MD (93 | GPIO_ALT_FN_2_IN)
323#define GPIO94_CIF_DD_5_MD (94 | GPIO_ALT_FN_2_IN)
324#define GPIO95_CIF_DD_4_MD (95 | GPIO_ALT_FN_2_IN)
325#define GPIO95_KP_MKIN6_MD (95 | GPIO_ALT_FN_3_IN)
326#define GPIO96_KP_DKIN3_MD (96 | GPIO_ALT_FN_1_IN)
327#define GPIO97_KP_MKIN3_MD (97 | GPIO_ALT_FN_3_IN)
328#define GPIO98_CIF_DD_0_MD (98 | GPIO_ALT_FN_2_IN)
329#define GPIO100_KP_MKIN0_MD (100 | GPIO_ALT_FN_1_IN)
330#define GPIO101_KP_MKIN1_MD (101 | GPIO_ALT_FN_1_IN)
331#define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT)
332#define GPIO102_KP_MKIN2_MD (102 | GPIO_ALT_FN_1_IN)
333#define GPIO103_CIF_DD_3_MD (103 | GPIO_ALT_FN_1_IN)
334#define GPIO103_KP_MKOUT0_MD (103 | GPIO_ALT_FN_2_OUT)
335#define GPIO104_CIF_DD_2_MD (104 | GPIO_ALT_FN_1_IN)
336#define GPIO104_pSKTSEL_MD (104 | GPIO_ALT_FN_1_OUT)
337#define GPIO104_KP_MKOUT1_MD (104 | GPIO_ALT_FN_2_OUT)
338#define GPIO105_CIF_DD_1_MD (105 | GPIO_ALT_FN_1_IN)
339#define GPIO105_KP_MKOUT2_MD (105 | GPIO_ALT_FN_2_OUT)
340#define GPIO106_CIF_DD_9_MD (106 | GPIO_ALT_FN_1_IN)
341#define GPIO106_KP_MKOUT3_MD (106 | GPIO_ALT_FN_2_OUT)
342#define GPIO107_CIF_DD_8_MD (107 | GPIO_ALT_FN_1_IN)
343#define GPIO107_KP_MKOUT4_MD (107 | GPIO_ALT_FN_2_OUT)
344#define GPIO108_CIF_DD_7_MD (108 | GPIO_ALT_FN_1_IN)
345#define GPIO108_KP_MKOUT5_MD (108 | GPIO_ALT_FN_2_OUT)
346#define GPIO109_MMCDAT1_MD (109 | GPIO_ALT_FN_1_OUT)
347#define GPIO110_MMCDAT2_MD (110 | GPIO_ALT_FN_1_OUT)
348#define GPIO110_MMCCS0_MD (110 | GPIO_ALT_FN_1_OUT)
349#define GPIO111_MMCDAT3_MD (111 | GPIO_ALT_FN_1_OUT)
350#define GPIO110_MMCCS1_MD (111 | GPIO_ALT_FN_1_OUT)
351#define GPIO112_MMCCMD_MD (112 | GPIO_ALT_FN_1_OUT)
352#define GPIO113_I2S_SYSCLK_MD (113 | GPIO_ALT_FN_1_OUT)
353#define GPIO113_AC97_RESET_N_MD (113 | GPIO_ALT_FN_2_OUT)
354#define GPIO117_I2CSCL_MD (117 | GPIO_ALT_FN_1_IN)
355#define GPIO118_I2CSDA_MD (118 | GPIO_ALT_FN_1_IN)
356
357#endif /* __ASM_ARCH_PXA2XX_GPIO_H */
diff --git a/include/asm-arm/arch-pxa/pxa3xx-regs.h b/include/asm-arm/arch-pxa/pxa3xx-regs.h
index 8e1b3ead827f..fe9364c83a28 100644
--- a/include/asm-arm/arch-pxa/pxa3xx-regs.h
+++ b/include/asm-arm/arch-pxa/pxa3xx-regs.h
@@ -12,6 +12,15 @@
12 12
13#ifndef __ASM_ARCH_PXA3XX_REGS_H 13#ifndef __ASM_ARCH_PXA3XX_REGS_H
14#define __ASM_ARCH_PXA3XX_REGS_H 14#define __ASM_ARCH_PXA3XX_REGS_H
15
16/*
17 * Oscillator Configuration Register (OSCC)
18 */
19#define OSCC __REG(0x41350000) /* Oscillator Configuration Register */
20
21#define OSCC_PEN (1 << 11) /* 13MHz POUT */
22
23
15/* 24/*
16 * Service Power Management Unit (MPMU) 25 * Service Power Management Unit (MPMU)
17 */ 26 */
diff --git a/include/asm-arm/arch-pxa/tosa.h b/include/asm-arm/arch-pxa/tosa.h
index c05e4faf85a6..c5b6fde6907c 100644
--- a/include/asm-arm/arch-pxa/tosa.h
+++ b/include/asm-arm/arch-pxa/tosa.h
@@ -23,11 +23,12 @@
23/* 23/*
24 * SCOOP2 internal GPIOs 24 * SCOOP2 internal GPIOs
25 */ 25 */
26#define TOSA_SCOOP_GPIO_BASE NR_BUILTIN_GPIO
26#define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11 27#define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11
27#define TOSA_SCOOP_TC6393_REST_IN SCOOP_GPCR_PA12 28#define TOSA_SCOOP_TC6393_REST_IN SCOOP_GPCR_PA12
28#define TOSA_SCOOP_IR_POWERDWN SCOOP_GPCR_PA13 29#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2)
29#define TOSA_SCOOP_SD_WP SCOOP_GPCR_PA14 30#define TOSA_GPIO_SD_WP (TOSA_SCOOP_GPIO_BASE + 3)
30#define TOSA_SCOOP_PWR_ON SCOOP_GPCR_PA15 31#define TOSA_GPIO_PWR_ON (TOSA_SCOOP_GPIO_BASE + 4)
31#define TOSA_SCOOP_AUD_PWR_ON SCOOP_GPCR_PA16 32#define TOSA_SCOOP_AUD_PWR_ON SCOOP_GPCR_PA16
32#define TOSA_SCOOP_BT_RESET SCOOP_GPCR_PA17 33#define TOSA_SCOOP_BT_RESET SCOOP_GPCR_PA17
33#define TOSA_SCOOP_BT_PWR_EN SCOOP_GPCR_PA18 34#define TOSA_SCOOP_BT_PWR_EN SCOOP_GPCR_PA18
@@ -35,7 +36,7 @@
35 36
36/* GPIO Direction 1 : output mode / 0:input mode */ 37/* GPIO Direction 1 : output mode / 0:input mode */
37#define TOSA_SCOOP_IO_DIR ( TOSA_SCOOP_PXA_VCORE1 | TOSA_SCOOP_TC6393_REST_IN | \ 38#define TOSA_SCOOP_IO_DIR ( TOSA_SCOOP_PXA_VCORE1 | TOSA_SCOOP_TC6393_REST_IN | \
38 TOSA_SCOOP_IR_POWERDWN | TOSA_SCOOP_PWR_ON | TOSA_SCOOP_AUD_PWR_ON |\ 39 TOSA_SCOOP_AUD_PWR_ON |\
39 TOSA_SCOOP_BT_RESET | TOSA_SCOOP_BT_PWR_EN ) 40 TOSA_SCOOP_BT_RESET | TOSA_SCOOP_BT_PWR_EN )
40/* GPIO out put level when init 1: Hi */ 41/* GPIO out put level when init 1: Hi */
41#define TOSA_SCOOP_IO_OUT ( TOSA_SCOOP_TC6393_REST_IN ) 42#define TOSA_SCOOP_IO_OUT ( TOSA_SCOOP_TC6393_REST_IN )
@@ -43,23 +44,21 @@
43/* 44/*
44 * SCOOP2 jacket GPIOs 45 * SCOOP2 jacket GPIOs
45 */ 46 */
46#define TOSA_SCOOP_JC_BT_LED SCOOP_GPCR_PA11 47#define TOSA_SCOOP_JC_GPIO_BASE (NR_BUILTIN_GPIO + 12)
47#define TOSA_SCOOP_JC_NOTE_LED SCOOP_GPCR_PA12 48#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0)
48#define TOSA_SCOOP_JC_CHRG_ERR_LED SCOOP_GPCR_PA13 49#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1)
49#define TOSA_SCOOP_JC_USB_PULLUP SCOOP_GPCR_PA14 50#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2)
51#define TOSA_GPIO_USB_PULLUP (TOSA_SCOOP_JC_GPIO_BASE + 3)
50#define TOSA_SCOOP_JC_TC6393_SUSPEND SCOOP_GPCR_PA15 52#define TOSA_SCOOP_JC_TC6393_SUSPEND SCOOP_GPCR_PA15
51#define TOSA_SCOOP_JC_TC3693_L3V_ON SCOOP_GPCR_PA16 53#define TOSA_SCOOP_JC_TC3693_L3V_ON SCOOP_GPCR_PA16
52#define TOSA_SCOOP_JC_WLAN_DETECT SCOOP_GPCR_PA17 54#define TOSA_SCOOP_JC_WLAN_DETECT SCOOP_GPCR_PA17
53#define TOSA_SCOOP_JC_WLAN_LED SCOOP_GPCR_PA18 55#define TOSA_GPIO_WLAN_LED (TOSA_SCOOP_JC_GPIO_BASE + 7)
54#define TOSA_SCOOP_JC_CARD_LIMIT_SEL SCOOP_GPCR_PA19 56#define TOSA_SCOOP_JC_CARD_LIMIT_SEL SCOOP_GPCR_PA19
55 57
56/* GPIO Direction 1 : output mode / 0:input mode */ 58/* GPIO Direction 1 : output mode / 0:input mode */
57#define TOSA_SCOOP_JC_IO_DIR ( TOSA_SCOOP_JC_BT_LED | TOSA_SCOOP_JC_NOTE_LED | \ 59#define TOSA_SCOOP_JC_IO_DIR ( \
58 TOSA_SCOOP_JC_CHRG_ERR_LED | TOSA_SCOOP_JC_USB_PULLUP | \
59 TOSA_SCOOP_JC_TC6393_SUSPEND | TOSA_SCOOP_JC_TC3693_L3V_ON | \ 60 TOSA_SCOOP_JC_TC6393_SUSPEND | TOSA_SCOOP_JC_TC3693_L3V_ON | \
60 TOSA_SCOOP_JC_WLAN_LED | TOSA_SCOOP_JC_CARD_LIMIT_SEL ) 61 TOSA_SCOOP_JC_CARD_LIMIT_SEL )
61/* GPIO out put level when init 1: Hi */
62#define TOSA_SCOOP_JC_IO_OUT ( 0 )
63 62
64/* 63/*
65 * Timing Generator 64 * Timing Generator
@@ -74,15 +73,6 @@
74#define TG_HPOSCTL 0x07 73#define TG_HPOSCTL 0x07
75 74
76/* 75/*
77 * LED
78 */
79#define TOSA_SCOOP_LED_BLUE TOSA_SCOOP_GPCR_PA11
80#define TOSA_SCOOP_LED_GREEN TOSA_SCOOP_GPCR_PA12
81#define TOSA_SCOOP_LED_ORANGE TOSA_SCOOP_GPCR_PA13
82#define TOSA_SCOOP_LED_WLAN TOSA_SCOOP_GPCR_PA18
83
84
85/*
86 * PXA GPIOs 76 * PXA GPIOs
87 */ 77 */
88#define TOSA_GPIO_POWERON (0) 78#define TOSA_GPIO_POWERON (0)
@@ -161,12 +151,8 @@
161 151
162#define TOSA_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(TOSA_GPIO_MAIN_BAT_LOW) 152#define TOSA_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(TOSA_GPIO_MAIN_BAT_LOW)
163 153
164extern struct platform_device tosascoop_jc_device;
165extern struct platform_device tosascoop_device;
166
167#define TOSA_KEY_SYNC KEY_102ND /* ??? */ 154#define TOSA_KEY_SYNC KEY_102ND /* ??? */
168 155
169
170#ifndef CONFIG_KEYBOARD_TOSA_USE_EXT_KEYCODES 156#ifndef CONFIG_KEYBOARD_TOSA_USE_EXT_KEYCODES
171#define TOSA_KEY_RECORD KEY_YEN 157#define TOSA_KEY_RECORD KEY_YEN
172#define TOSA_KEY_ADDRESSBOOK KEY_KATAKANA 158#define TOSA_KEY_ADDRESSBOOK KEY_KATAKANA
diff --git a/include/asm-arm/arch-pxa/zylonite.h b/include/asm-arm/arch-pxa/zylonite.h
index 5f717d64ea7d..4881b80f0f90 100644
--- a/include/asm-arm/arch-pxa/zylonite.h
+++ b/include/asm-arm/arch-pxa/zylonite.h
@@ -18,6 +18,8 @@ extern struct platform_mmc_slot zylonite_mmc_slot[];
18extern int gpio_backlight; 18extern int gpio_backlight;
19extern int gpio_eth_irq; 19extern int gpio_eth_irq;
20 20
21extern int wm9713_irq;
22
21extern int lcd_id; 23extern int lcd_id;
22extern int lcd_orientation; 24extern int lcd_orientation;
23 25
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-03 03:34:48 -0500