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-rw-r--r--include/asm-arm/arch-pxa/idp.h10
-rw-r--r--include/asm-arm/arch-pxa/pcm990_baseboard.h14
2 files changed, 12 insertions, 12 deletions
diff --git a/include/asm-arm/arch-pxa/idp.h b/include/asm-arm/arch-pxa/idp.h
index b6952534a4e1..21aa8ac35c1c 100644
--- a/include/asm-arm/arch-pxa/idp.h
+++ b/include/asm-arm/arch-pxa/idp.h
@@ -138,18 +138,18 @@
138#define TOUCH_PANEL_IRQ IRQ_GPIO(5) 138#define TOUCH_PANEL_IRQ IRQ_GPIO(5)
139#define IDE_IRQ IRQ_GPIO(21) 139#define IDE_IRQ IRQ_GPIO(21)
140 140
141#define TOUCH_PANEL_IRQ_EDGE IRQT_FALLING 141#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
142 142
143#define ETHERNET_IRQ IRQ_GPIO(4) 143#define ETHERNET_IRQ IRQ_GPIO(4)
144#define ETHERNET_IRQ_EDGE IRQT_RISING 144#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING
145 145
146#define IDE_IRQ_EDGE IRQT_RISING 146#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
147 147
148#define PCMCIA_S0_CD_VALID IRQ_GPIO(7) 148#define PCMCIA_S0_CD_VALID IRQ_GPIO(7)
149#define PCMCIA_S0_CD_VALID_EDGE IRQT_BOTHEDGE 149#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
150 150
151#define PCMCIA_S1_CD_VALID IRQ_GPIO(8) 151#define PCMCIA_S1_CD_VALID IRQ_GPIO(8)
152#define PCMCIA_S1_CD_VALID_EDGE IRQT_BOTHEDGE 152#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
153 153
154#define PCMCIA_S0_RDYINT IRQ_GPIO(19) 154#define PCMCIA_S0_RDYINT IRQ_GPIO(19)
155#define PCMCIA_S1_RDYINT IRQ_GPIO(22) 155#define PCMCIA_S1_RDYINT IRQ_GPIO(22)
diff --git a/include/asm-arm/arch-pxa/pcm990_baseboard.h b/include/asm-arm/arch-pxa/pcm990_baseboard.h
index b699d0d7bdb2..2e2013179063 100644
--- a/include/asm-arm/arch-pxa/pcm990_baseboard.h
+++ b/include/asm-arm/arch-pxa/pcm990_baseboard.h
@@ -29,14 +29,14 @@
29/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */ 29/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */
30#define PCM990_CTRL_INT_IRQ_GPIO 9 30#define PCM990_CTRL_INT_IRQ_GPIO 9
31#define PCM990_CTRL_INT_IRQ IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO) 31#define PCM990_CTRL_INT_IRQ IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO)
32#define PCM990_CTRL_INT_IRQ_EDGE IRQT_RISING 32#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING
33#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */ 33#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */
34#define PCM990_CTRL_BASE 0xea000000 34#define PCM990_CTRL_BASE 0xea000000
35#define PCM990_CTRL_SIZE (1*1024*1024) 35#define PCM990_CTRL_SIZE (1*1024*1024)
36 36
37#define PCM990_CTRL_PWR_IRQ_GPIO 14 37#define PCM990_CTRL_PWR_IRQ_GPIO 14
38#define PCM990_CTRL_PWR_IRQ IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO) 38#define PCM990_CTRL_PWR_IRQ IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO)
39#define PCM990_CTRL_PWR_IRQ_EDGE IRQT_RISING 39#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING
40 40
41/* visible CPLD (U7) registers */ 41/* visible CPLD (U7) registers */
42#define PCM990_CTRL_REG0 0x0000 /* RESET REGISTER */ 42#define PCM990_CTRL_REG0 0x0000 /* RESET REGISTER */
@@ -133,7 +133,7 @@
133 */ 133 */
134#define PCM990_IDE_IRQ_GPIO 13 134#define PCM990_IDE_IRQ_GPIO 13
135#define PCM990_IDE_IRQ IRQ_GPIO(PCM990_IDE_IRQ_GPIO) 135#define PCM990_IDE_IRQ IRQ_GPIO(PCM990_IDE_IRQ_GPIO)
136#define PCM990_IDE_IRQ_EDGE IRQT_RISING 136#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
137#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */ 137#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */
138#define PCM990_IDE_PLD_BASE 0xee000000 138#define PCM990_IDE_PLD_BASE 0xee000000
139#define PCM990_IDE_PLD_SIZE (1*1024*1024) 139#define PCM990_IDE_PLD_SIZE (1*1024*1024)
@@ -189,11 +189,11 @@
189 */ 189 */
190#define PCM990_CF_IRQ_GPIO 11 190#define PCM990_CF_IRQ_GPIO 11
191#define PCM990_CF_IRQ IRQ_GPIO(PCM990_CF_IRQ_GPIO) 191#define PCM990_CF_IRQ IRQ_GPIO(PCM990_CF_IRQ_GPIO)
192#define PCM990_CF_IRQ_EDGE IRQT_RISING 192#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING
193 193
194#define PCM990_CF_CD_GPIO 12 194#define PCM990_CF_CD_GPIO 12
195#define PCM990_CF_CD IRQ_GPIO(PCM990_CF_CD_GPIO) 195#define PCM990_CF_CD IRQ_GPIO(PCM990_CF_CD_GPIO)
196#define PCM990_CF_CD_EDGE IRQT_RISING 196#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING
197 197
198#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */ 198#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */
199#define PCM990_CF_PLD_BASE 0xef000000 199#define PCM990_CF_PLD_BASE 0xef000000
@@ -259,14 +259,14 @@
259 */ 259 */
260#define PCM990_AC97_IRQ_GPIO 10 260#define PCM990_AC97_IRQ_GPIO 10
261#define PCM990_AC97_IRQ IRQ_GPIO(PCM990_AC97_IRQ_GPIO) 261#define PCM990_AC97_IRQ IRQ_GPIO(PCM990_AC97_IRQ_GPIO)
262#define PCM990_AC97_IRQ_EDGE IRQT_RISING 262#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING
263 263
264/* 264/*
265 * MMC phyCORE 265 * MMC phyCORE
266 */ 266 */
267#define PCM990_MMC0_IRQ_GPIO 9 267#define PCM990_MMC0_IRQ_GPIO 9
268#define PCM990_MMC0_IRQ IRQ_GPIO(PCM990_MMC0_IRQ_GPIO) 268#define PCM990_MMC0_IRQ IRQ_GPIO(PCM990_MMC0_IRQ_GPIO)
269#define PCM990_MMC0_IRQ_EDGE IRQT_FALLING 269#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
270 270
271/* 271/*
272 * USB phyCore 272 * USB phyCore