diff options
Diffstat (limited to 'include/asm-arm/arch-pxa')
-rw-r--r-- | include/asm-arm/arch-pxa/irqs.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/pxa-regs.h | 9 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/udc.h | 17 |
3 files changed, 7 insertions, 21 deletions
diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h index f3bc70eee35b..67ed43674c63 100644 --- a/include/asm-arm/arch-pxa/irqs.h +++ b/include/asm-arm/arch-pxa/irqs.h | |||
@@ -73,7 +73,7 @@ | |||
73 | #define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i)) | 73 | #define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i)) |
74 | 74 | ||
75 | #if defined(CONFIG_PXA25x) | 75 | #if defined(CONFIG_PXA25x) |
76 | #define PXA_LAST_GPIO 80 | 76 | #define PXA_LAST_GPIO 84 |
77 | #elif defined(CONFIG_PXA27x) | 77 | #elif defined(CONFIG_PXA27x) |
78 | #define PXA_LAST_GPIO 127 | 78 | #define PXA_LAST_GPIO 127 |
79 | #endif | 79 | #endif |
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index f5cc65dd7d0d..cff752f35230 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h | |||
@@ -1681,6 +1681,7 @@ | |||
1681 | #define SSSR_TINT (1 << 19) /* Receiver Time-out Interrupt */ | 1681 | #define SSSR_TINT (1 << 19) /* Receiver Time-out Interrupt */ |
1682 | #define SSSR_PINT (1 << 18) /* Peripheral Trailing Byte Interrupt */ | 1682 | #define SSSR_PINT (1 << 18) /* Peripheral Trailing Byte Interrupt */ |
1683 | 1683 | ||
1684 | #define SSPSP_FSRT (1 << 25) /* Frame Sync Relative Timing */ | ||
1684 | #define SSPSP_DMYSTOP(x) (x << 23) /* Dummy Stop */ | 1685 | #define SSPSP_DMYSTOP(x) (x << 23) /* Dummy Stop */ |
1685 | #define SSPSP_SFRMWDTH(x) (x << 16) /* Serial Frame Width */ | 1686 | #define SSPSP_SFRMWDTH(x) (x << 16) /* Serial Frame Width */ |
1686 | #define SSPSP_SFRMDLY(x) (x << 9) /* Serial Frame Delay */ | 1687 | #define SSPSP_SFRMDLY(x) (x << 9) /* Serial Frame Delay */ |
@@ -2241,7 +2242,7 @@ | |||
2241 | 2242 | ||
2242 | #define CICR1_TBIT (1 << 31) /* Transparency bit */ | 2243 | #define CICR1_TBIT (1 << 31) /* Transparency bit */ |
2243 | #define CICR1_RGBT_CONV (0x3 << 30) /* RGBT conversion mask */ | 2244 | #define CICR1_RGBT_CONV (0x3 << 30) /* RGBT conversion mask */ |
2244 | #define CICR1_PPL (0x3f << 15) /* Pixels per line mask */ | 2245 | #define CICR1_PPL (0x7ff << 15) /* Pixels per line mask */ |
2245 | #define CICR1_RGB_CONV (0x7 << 12) /* RGB conversion mask */ | 2246 | #define CICR1_RGB_CONV (0x7 << 12) /* RGB conversion mask */ |
2246 | #define CICR1_RGB_F (1 << 11) /* RGB format */ | 2247 | #define CICR1_RGB_F (1 << 11) /* RGB format */ |
2247 | #define CICR1_YCBCR_F (1 << 10) /* YCbCr format */ | 2248 | #define CICR1_YCBCR_F (1 << 10) /* YCbCr format */ |
@@ -2267,7 +2268,7 @@ | |||
2267 | #define CICR3_VSW (0x3f << 10) /* Vertical sync pulse width mask */ | 2268 | #define CICR3_VSW (0x3f << 10) /* Vertical sync pulse width mask */ |
2268 | #define CICR3_BFPW (0x3f << 3) /* Beginning-of-frame pixel clock | 2269 | #define CICR3_BFPW (0x3f << 3) /* Beginning-of-frame pixel clock |
2269 | wait count mask */ | 2270 | wait count mask */ |
2270 | #define CICR3_LPF (0x3ff << 0) /* Lines per frame mask */ | 2271 | #define CICR3_LPF (0x7ff << 0) /* Lines per frame mask */ |
2271 | 2272 | ||
2272 | #define CICR4_MCLK_DLY (0x3 << 24) /* MCLK Data Capture Delay mask */ | 2273 | #define CICR4_MCLK_DLY (0x3 << 24) /* MCLK Data Capture Delay mask */ |
2273 | #define CICR4_PCLK_EN (1 << 23) /* Pixel clock enable */ | 2274 | #define CICR4_PCLK_EN (1 << 23) /* Pixel clock enable */ |
@@ -2288,8 +2289,8 @@ | |||
2288 | #define CISR_EOL (1 << 8) /* End of line */ | 2289 | #define CISR_EOL (1 << 8) /* End of line */ |
2289 | #define CISR_PAR_ERR (1 << 7) /* Parity error */ | 2290 | #define CISR_PAR_ERR (1 << 7) /* Parity error */ |
2290 | #define CISR_CQD (1 << 6) /* Camera interface quick disable */ | 2291 | #define CISR_CQD (1 << 6) /* Camera interface quick disable */ |
2291 | #define CISR_SOF (1 << 5) /* Start of frame */ | 2292 | #define CISR_CDD (1 << 5) /* Camera interface disable done */ |
2292 | #define CISR_CDD (1 << 4) /* Camera interface disable done */ | 2293 | #define CISR_SOF (1 << 4) /* Start of frame */ |
2293 | #define CISR_EOF (1 << 3) /* End of frame */ | 2294 | #define CISR_EOF (1 << 3) /* End of frame */ |
2294 | #define CISR_IFO_2 (1 << 2) /* FIFO overrun for Channel 2 */ | 2295 | #define CISR_IFO_2 (1 << 2) /* FIFO overrun for Channel 2 */ |
2295 | #define CISR_IFO_1 (1 << 1) /* FIFO overrun for Channel 1 */ | 2296 | #define CISR_IFO_1 (1 << 1) /* FIFO overrun for Channel 1 */ |
diff --git a/include/asm-arm/arch-pxa/udc.h b/include/asm-arm/arch-pxa/udc.h index 121cd241115d..646480d37256 100644 --- a/include/asm-arm/arch-pxa/udc.h +++ b/include/asm-arm/arch-pxa/udc.h | |||
@@ -4,23 +4,8 @@ | |||
4 | * This supports machine-specific differences in how the PXA2xx | 4 | * This supports machine-specific differences in how the PXA2xx |
5 | * USB Device Controller (UDC) is wired. | 5 | * USB Device Controller (UDC) is wired. |
6 | * | 6 | * |
7 | * It is set in linux/arch/arm/mach-pxa/<machine>.c and used in | ||
8 | * the probe routine of linux/drivers/usb/gadget/pxa2xx_udc.c | ||
9 | */ | 7 | */ |
10 | struct pxa2xx_udc_mach_info { | 8 | #include <asm/mach/udc_pxa2xx.h> |
11 | int (*udc_is_connected)(void); /* do we see host? */ | ||
12 | void (*udc_command)(int cmd); | ||
13 | #define PXA2XX_UDC_CMD_CONNECT 0 /* let host see us */ | ||
14 | #define PXA2XX_UDC_CMD_DISCONNECT 1 /* so host won't see us */ | ||
15 | |||
16 | /* Boards following the design guidelines in the developer's manual, | ||
17 | * with on-chip GPIOs not Lubbock's wierd hardware, can have a sane | ||
18 | * VBUS IRQ and omit the methods above. Store the GPIO number | ||
19 | * here; for GPIO 0, also mask in one of the pxa_gpio_mode() bits. | ||
20 | */ | ||
21 | u16 gpio_vbus; /* high == vbus present */ | ||
22 | u16 gpio_pullup; /* high == pullup activated */ | ||
23 | }; | ||
24 | 9 | ||
25 | extern void pxa_set_udc_info(struct pxa2xx_udc_mach_info *info); | 10 | extern void pxa_set_udc_info(struct pxa2xx_udc_mach_info *info); |
26 | 11 | ||