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diff --git a/include/asm-arm/arch-pxa/spitz.h b/include/asm-arm/arch-pxa/spitz.h
deleted file mode 100644
index bd14365f7ed5..000000000000
--- a/include/asm-arm/arch-pxa/spitz.h
+++ /dev/null
@@ -1,158 +0,0 @@
1/*
2 * Hardware specific definitions for SL-Cx000 series of PDAs
3 *
4 * Copyright (c) 2005 Alexander Wykes
5 * Copyright (c) 2005 Richard Purdie
6 *
7 * Based on Sharp's 2.4 kernel patches
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 */
14#ifndef __ASM_ARCH_SPITZ_H
15#define __ASM_ARCH_SPITZ_H 1
16#endif
17
18#include <linux/fb.h>
19
20/* Spitz/Akita GPIOs */
21
22#define SPITZ_GPIO_KEY_INT (0) /* Key Interrupt */
23#define SPITZ_GPIO_RESET (1)
24#define SPITZ_GPIO_nSD_DETECT (9)
25#define SPITZ_GPIO_TP_INT (11) /* Touch Panel interrupt */
26#define SPITZ_GPIO_AK_INT (13) /* Remote Control */
27#define SPITZ_GPIO_ADS7846_CS (14)
28#define SPITZ_GPIO_SYNC (16)
29#define SPITZ_GPIO_MAX1111_CS (20)
30#define SPITZ_GPIO_FATAL_BAT (21)
31#define SPITZ_GPIO_HSYNC (22)
32#define SPITZ_GPIO_nSD_CLK (32)
33#define SPITZ_GPIO_USB_DEVICE (35)
34#define SPITZ_GPIO_USB_HOST (37)
35#define SPITZ_GPIO_USB_CONNECT (41)
36#define SPITZ_GPIO_LCDCON_CS (53)
37#define SPITZ_GPIO_nPCE (54)
38#define SPITZ_GPIO_nSD_WP (81)
39#define SPITZ_GPIO_ON_RESET (89)
40#define SPITZ_GPIO_BAT_COVER (90)
41#define SPITZ_GPIO_CF_CD (94)
42#define SPITZ_GPIO_ON_KEY (95)
43#define SPITZ_GPIO_SWA (97)
44#define SPITZ_GPIO_SWB (96)
45#define SPITZ_GPIO_CHRG_FULL (101)
46#define SPITZ_GPIO_CO (101)
47#define SPITZ_GPIO_CF_IRQ (105)
48#define SPITZ_GPIO_AC_IN (115)
49#define SPITZ_GPIO_HP_IN (116)
50
51/* Spitz Only GPIOs */
52
53#define SPITZ_GPIO_CF2_IRQ (106) /* CF slot1 Ready */
54#define SPITZ_GPIO_CF2_CD (93)
55
56
57/* Spitz/Akita Keyboard Definitions */
58
59#define SPITZ_KEY_STROBE_NUM (11)
60#define SPITZ_KEY_SENSE_NUM (7)
61#define SPITZ_GPIO_G0_STROBE_BIT 0x0f800000
62#define SPITZ_GPIO_G1_STROBE_BIT 0x00100000
63#define SPITZ_GPIO_G2_STROBE_BIT 0x01000000
64#define SPITZ_GPIO_G3_STROBE_BIT 0x00041880
65#define SPITZ_GPIO_G0_SENSE_BIT 0x00021000
66#define SPITZ_GPIO_G1_SENSE_BIT 0x000000d4
67#define SPITZ_GPIO_G2_SENSE_BIT 0x08000000
68#define SPITZ_GPIO_G3_SENSE_BIT 0x00000000
69
70#define SPITZ_GPIO_KEY_STROBE0 88
71#define SPITZ_GPIO_KEY_STROBE1 23
72#define SPITZ_GPIO_KEY_STROBE2 24
73#define SPITZ_GPIO_KEY_STROBE3 25
74#define SPITZ_GPIO_KEY_STROBE4 26
75#define SPITZ_GPIO_KEY_STROBE5 27
76#define SPITZ_GPIO_KEY_STROBE6 52
77#define SPITZ_GPIO_KEY_STROBE7 103
78#define SPITZ_GPIO_KEY_STROBE8 107
79#define SPITZ_GPIO_KEY_STROBE9 108
80#define SPITZ_GPIO_KEY_STROBE10 114
81
82#define SPITZ_GPIO_KEY_SENSE0 12
83#define SPITZ_GPIO_KEY_SENSE1 17
84#define SPITZ_GPIO_KEY_SENSE2 91
85#define SPITZ_GPIO_KEY_SENSE3 34
86#define SPITZ_GPIO_KEY_SENSE4 36
87#define SPITZ_GPIO_KEY_SENSE5 38
88#define SPITZ_GPIO_KEY_SENSE6 39
89
90
91/* Spitz Scoop Device (No. 1) GPIOs */
92/* Suspend States in comments */
93#define SPITZ_SCP_LED_GREEN SCOOP_GPCR_PA11 /* Keep */
94#define SPITZ_SCP_JK_B SCOOP_GPCR_PA12 /* Keep */
95#define SPITZ_SCP_CHRG_ON SCOOP_GPCR_PA13 /* Keep */
96#define SPITZ_SCP_MUTE_L SCOOP_GPCR_PA14 /* Low */
97#define SPITZ_SCP_MUTE_R SCOOP_GPCR_PA15 /* Low */
98#define SPITZ_SCP_CF_POWER SCOOP_GPCR_PA16 /* Keep */
99#define SPITZ_SCP_LED_ORANGE SCOOP_GPCR_PA17 /* Keep */
100#define SPITZ_SCP_JK_A SCOOP_GPCR_PA18 /* Low */
101#define SPITZ_SCP_ADC_TEMP_ON SCOOP_GPCR_PA19 /* Low */
102
103#define SPITZ_SCP_IO_DIR (SPITZ_SCP_LED_GREEN | SPITZ_SCP_JK_B | SPITZ_SCP_CHRG_ON | \
104 SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_LED_ORANGE | \
105 SPITZ_SCP_CF_POWER | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
106#define SPITZ_SCP_IO_OUT (SPITZ_SCP_CHRG_ON | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R)
107#define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
108#define SPITZ_SCP_SUS_SET 0
109
110/* Spitz Scoop Device (No. 2) GPIOs */
111/* Suspend States in comments */
112#define SPITZ_SCP2_IR_ON SCOOP_GPCR_PA11 /* High */
113#define SPITZ_SCP2_AKIN_PULLUP SCOOP_GPCR_PA12 /* Keep */
114#define SPITZ_SCP2_RESERVED_1 SCOOP_GPCR_PA13 /* High */
115#define SPITZ_SCP2_RESERVED_2 SCOOP_GPCR_PA14 /* Low */
116#define SPITZ_SCP2_RESERVED_3 SCOOP_GPCR_PA15 /* Low */
117#define SPITZ_SCP2_RESERVED_4 SCOOP_GPCR_PA16 /* Low */
118#define SPITZ_SCP2_BACKLIGHT_CONT SCOOP_GPCR_PA17 /* Low */
119#define SPITZ_SCP2_BACKLIGHT_ON SCOOP_GPCR_PA18 /* Low */
120#define SPITZ_SCP2_MIC_BIAS SCOOP_GPCR_PA19 /* Low */
121
122#define SPITZ_SCP2_IO_DIR (SPITZ_SCP2_IR_ON | SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1 | \
123 SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \
124 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
125
126#define SPITZ_SCP2_IO_OUT (SPITZ_SCP2_IR_ON | SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1)
127#define SPITZ_SCP2_SUS_CLR (SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \
128 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
129#define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1)
130
131
132/* Spitz IRQ Definitions */
133
134#define SPITZ_IRQ_GPIO_KEY_INT IRQ_GPIO(SPITZ_GPIO_KEY_INT)
135#define SPITZ_IRQ_GPIO_AC_IN IRQ_GPIO(SPITZ_GPIO_AC_IN)
136#define SPITZ_IRQ_GPIO_AK_INT IRQ_GPIO(SPITZ_GPIO_AK_INT)
137#define SPITZ_IRQ_GPIO_HP_IN IRQ_GPIO(SPITZ_GPIO_HP_IN)
138#define SPITZ_IRQ_GPIO_TP_INT IRQ_GPIO(SPITZ_GPIO_TP_INT)
139#define SPITZ_IRQ_GPIO_SYNC IRQ_GPIO(SPITZ_GPIO_SYNC)
140#define SPITZ_IRQ_GPIO_ON_KEY IRQ_GPIO(SPITZ_GPIO_ON_KEY)
141#define SPITZ_IRQ_GPIO_SWA IRQ_GPIO(SPITZ_GPIO_SWA)
142#define SPITZ_IRQ_GPIO_SWB IRQ_GPIO(SPITZ_GPIO_SWB)
143#define SPITZ_IRQ_GPIO_BAT_COVER IRQ_GPIO(SPITZ_GPIO_BAT_COVER)
144#define SPITZ_IRQ_GPIO_FATAL_BAT IRQ_GPIO(SPITZ_GPIO_FATAL_BAT)
145#define SPITZ_IRQ_GPIO_CO IRQ_GPIO(SPITZ_GPIO_CO)
146#define SPITZ_IRQ_GPIO_CF_IRQ IRQ_GPIO(SPITZ_GPIO_CF_IRQ)
147#define SPITZ_IRQ_GPIO_CF_CD IRQ_GPIO(SPITZ_GPIO_CF_CD)
148#define SPITZ_IRQ_GPIO_CF2_IRQ IRQ_GPIO(SPITZ_GPIO_CF2_IRQ)
149#define SPITZ_IRQ_GPIO_nSD_INT IRQ_GPIO(SPITZ_GPIO_nSD_INT)
150#define SPITZ_IRQ_GPIO_nSD_DETECT IRQ_GPIO(SPITZ_GPIO_nSD_DETECT)
151
152/*
153 * Shared data structures
154 */
155extern struct platform_device spitzscoop_device;
156extern struct platform_device spitzscoop2_device;
157extern struct platform_device spitzssp_device;
158extern struct sharpsl_charger_machinfo spitz_pm_machinfo;