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Diffstat (limited to 'include/asm-arm/arch-pxa/pxafb.h')
-rw-r--r--include/asm-arm/arch-pxa/pxafb.h26
1 files changed, 23 insertions, 3 deletions
diff --git a/include/asm-arm/arch-pxa/pxafb.h b/include/asm-arm/arch-pxa/pxafb.h
index 41a6c2297f9f..bbd22396841a 100644
--- a/include/asm-arm/arch-pxa/pxafb.h
+++ b/include/asm-arm/arch-pxa/pxafb.h
@@ -48,6 +48,7 @@
48#define LCD_COLOR_DSTN_16BPP ((16 << 4) | LCD_TYPE_COLOR_DSTN) 48#define LCD_COLOR_DSTN_16BPP ((16 << 4) | LCD_TYPE_COLOR_DSTN)
49#define LCD_COLOR_TFT_16BPP ((16 << 4) | LCD_TYPE_COLOR_TFT) 49#define LCD_COLOR_TFT_16BPP ((16 << 4) | LCD_TYPE_COLOR_TFT)
50#define LCD_COLOR_TFT_18BPP ((18 << 4) | LCD_TYPE_COLOR_TFT) 50#define LCD_COLOR_TFT_18BPP ((18 << 4) | LCD_TYPE_COLOR_TFT)
51#define LCD_SMART_PANEL_8BPP ((8 << 4) | LCD_TYPE_SMART_PANEL)
51#define LCD_SMART_PANEL_16BPP ((16 << 4) | LCD_TYPE_SMART_PANEL) 52#define LCD_SMART_PANEL_16BPP ((16 << 4) | LCD_TYPE_SMART_PANEL)
52#define LCD_SMART_PANEL_18BPP ((18 << 4) | LCD_TYPE_SMART_PANEL) 53#define LCD_SMART_PANEL_18BPP ((18 << 4) | LCD_TYPE_SMART_PANEL)
53 54
@@ -69,6 +70,10 @@ struct pxafb_mode_info {
69 u_short yres; 70 u_short yres;
70 71
71 u_char bpp; 72 u_char bpp;
73 u_int cmap_greyscale:1,
74 unused:31;
75
76 /* Parallel Mode Timing */
72 u_char hsync_len; 77 u_char hsync_len;
73 u_char left_margin; 78 u_char left_margin;
74 u_char right_margin; 79 u_char right_margin;
@@ -78,8 +83,20 @@ struct pxafb_mode_info {
78 u_char lower_margin; 83 u_char lower_margin;
79 u_char sync; 84 u_char sync;
80 85
81 u_int cmap_greyscale:1, 86 /* Smart Panel Mode Timing - see PXA27x DM 7.4.15.0.3 for details
82 unused:31; 87 * Note:
88 * 1. all parameters in nanosecond (ns)
89 * 2. a0cs{rd,wr}_set_hld are controlled by the same register bits
90 * in pxa27x and pxa3xx, initialize them to the same value or
91 * the larger one will be used
92 * 3. same to {rd,wr}_pulse_width
93 */
94 unsigned a0csrd_set_hld; /* A0 and CS Setup/Hold Time before/after L_FCLK_RD */
95 unsigned a0cswr_set_hld; /* A0 and CS Setup/Hold Time before/after L_PCLK_WR */
96 unsigned wr_pulse_width; /* L_PCLK_WR pulse width */
97 unsigned rd_pulse_width; /* L_FCLK_RD pulse width */
98 unsigned cmd_inh_time; /* Command Inhibit time between two writes */
99 unsigned op_hold_time; /* Output Hold time from L_FCLK_RD negation */
83}; 100};
84 101
85struct pxafb_mach_info { 102struct pxafb_mach_info {
@@ -123,8 +140,11 @@ struct pxafb_mach_info {
123 u_int lccr4; 140 u_int lccr4;
124 void (*pxafb_backlight_power)(int); 141 void (*pxafb_backlight_power)(int);
125 void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *); 142 void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *);
126 143 void (*smart_update)(struct fb_info *);
127}; 144};
128void set_pxa_fb_info(struct pxafb_mach_info *hard_pxa_fb_info); 145void set_pxa_fb_info(struct pxafb_mach_info *hard_pxa_fb_info);
129void set_pxa_fb_parent(struct device *parent_dev); 146void set_pxa_fb_parent(struct device *parent_dev);
130unsigned long pxafb_get_hsync_time(struct device *dev); 147unsigned long pxafb_get_hsync_time(struct device *dev);
148
149extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int);
150extern int pxafb_smart_flush(struct fb_info *info);