1 files changed, 11 insertions, 0 deletions

diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 67f53e07db86..bb68b598c436 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1823,6 +1823,7 @@
 #define LCCR1           __REG(0x44000004)  /* LCD Controller Control Register 1 */
 #define LCCR2           __REG(0x44000008)  /* LCD Controller Control Register 2 */
 #define LCCR3           __REG(0x4400000C)  /* LCD Controller Control Register 3 */
+#define LCCR4           __REG(0x44000010)  /* LCD Controller Control Register 3 */
 #define DFBR0           __REG(0x44000020)  /* DMA Channel 0 Frame Branch Register */
 #define DFBR1           __REG(0x44000024)  /* DMA Channel 1 Frame Branch Register */
 #define LCSR            __REG(0x44000038)  /* LCD Controller Status Register */
@@ -1836,6 +1837,16 @@
 #define LCCR3_8BPP (3 << 24)
 #define LCCR3_16BPP (4 << 24)
 
+#define LCCR3_PDFOR_0 (0 << 30)
+#define LCCR3_PDFOR_1 (1 << 30)
+#define LCCR3_PDFOR_2 (2 << 30)
+#define LCCR3_PDFOR_3 (3 << 30)
+
+#define LCCR4_PAL_FOR_0 (0 << 15)
+#define LCCR4_PAL_FOR_1 (1 << 15)
+#define LCCR4_PAL_FOR_2 (2 << 15)
+#define LCCR4_PAL_FOR_MASK (3 << 15)
+
 #define FDADR0          __REG(0x44000200)  /* DMA Channel 0 Frame Descriptor Address Register */
 #define FSADR0          __REG(0x44000204)  /* DMA Channel 0 Frame Source Address Register */
 #define FIDR0           __REG(0x44000208)  /* DMA Channel 0 Frame ID Register */