1 files changed, 0 insertions, 106 deletions
diff --git a/include/asm-arm/arch-omap/tc.h b/include/asm-arm/arch-omap/tc.h
deleted file mode 100644
index 65a9c82d3bf7..000000000000
--- a/include/asm-arm/arch-omap/tc.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/*
- * linux/include/asm-arm/arch-omap/tc.h
- *
- * OMAP Traffic Controller
- *
- * Copyright (C) 2004 Nokia Corporation
- * Author: Imre Deak <imre.deak@nokia.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
- */
-#ifndef __ASM_ARCH_TC_H
-#define __ASM_ARCH_TC_H
-#define TCMIF_BASE              0xfffecc00
-#define OMAP_TC_OCPT1_PRIOR     (TCMIF_BASE + 0x00)
-#define OMAP_TC_EMIFS_PRIOR     (TCMIF_BASE + 0x04)
-#define OMAP_TC_EMIFF_PRIOR     (TCMIF_BASE + 0x08)
-#define EMIFS_CONFIG            (TCMIF_BASE + 0x0c)
-#define EMIFS_CS0_CONFIG        (TCMIF_BASE + 0x10)
-#define EMIFS_CS1_CONFIG        (TCMIF_BASE + 0x14)
-#define EMIFS_CS2_CONFIG        (TCMIF_BASE + 0x18)
-#define EMIFS_CS3_CONFIG        (TCMIF_BASE + 0x1c)
-#define EMIFF_SDRAM_CONFIG      (TCMIF_BASE + 0x20)
-#define EMIFF_MRS               (TCMIF_BASE + 0x24)
-#define TC_TIMEOUT1             (TCMIF_BASE + 0x28)
-#define TC_TIMEOUT2             (TCMIF_BASE + 0x2c)
-#define TC_TIMEOUT3             (TCMIF_BASE + 0x30)
-#define TC_ENDIANISM            (TCMIF_BASE + 0x34)
-#define EMIFF_SDRAM_CONFIG_2    (TCMIF_BASE + 0x3c)
-#define EMIF_CFG_DYNAMIC_WS     (TCMIF_BASE + 0x40)
-#define EMIFS_ACS0              (TCMIF_BASE + 0x50)
-#define EMIFS_ACS1              (TCMIF_BASE + 0x54)
-#define EMIFS_ACS2              (TCMIF_BASE + 0x58)
-#define EMIFS_ACS3              (TCMIF_BASE + 0x5c)
-#define OMAP_TC_OCPT2_PRIOR     (TCMIF_BASE + 0xd0)
-/* external EMIFS chipselect regions */
-#define OMAP_CS0_PHYS           0x00000000
-#define OMAP_CS0_SIZE           SZ_64M
-#define OMAP_CS1_PHYS           0x04000000
-#define OMAP_CS1_SIZE           SZ_64M
-#define OMAP_CS1A_PHYS          OMAP_CS1_PHYS
-#define OMAP_CS1A_SIZE          SZ_32M
-#define OMAP_CS1B_PHYS          (OMAP_CS1A_PHYS + OMAP_CS1A_SIZE)
-#define OMAP_CS1B_SIZE          SZ_32M
-#define OMAP_CS2_PHYS           0x08000000
-#define OMAP_CS2_SIZE           SZ_64M
-#define OMAP_CS2A_PHYS          OMAP_CS2_PHYS
-#define OMAP_CS2A_SIZE          SZ_32M
-#define OMAP_CS2B_PHYS          (OMAP_CS2A_PHYS + OMAP_CS2A_SIZE)
-#define OMAP_CS2B_SIZE          SZ_32M
-#define OMAP_CS3_PHYS           0x0c000000
-#define OMAP_CS3_SIZE           SZ_64M
-#ifndef __ASSEMBLER__
-/* EMIF Slow Interface Configuration Register */
-#define OMAP_EMIFS_CONFIG_FR            (1 << 4)
-#define OMAP_EMIFS_CONFIG_PDE           (1 << 3)
-#define OMAP_EMIFS_CONFIG_PWD_EN        (1 << 2)
-#define OMAP_EMIFS_CONFIG_BM            (1 << 1)
-#define OMAP_EMIFS_CONFIG_WP            (1 << 0)
-#define EMIFS_CCS(n)            (EMIFS_CS0_CONFIG + (4 * (n)))
-#define EMIFS_ACS(n)            (EMIFS_ACS0 + (4 * (n)))
-/* Almost all documentation for chip and board memory maps assumes
- * BM is clear.  Most devel boards have a switch to control booting
- * from NOR flash (using external chipselect 3) rather than mask ROM,
- * which uses BM to interchange the physical CS0 and CS3 addresses.
- */
-static inline u32 omap_cs0_phys(void)
-{
-        return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
-                        ?  OMAP_CS3_PHYS : 0;
-}
-static inline u32 omap_cs3_phys(void)
-{
-        return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
-                        ? 0 : OMAP_CS3_PHYS;
-}
-#endif  /* __ASSEMBLER__ */
-#endif  /* __ASM_ARCH_TC_H */

diff --git a/include/asm-arm/arch-omap/tc.h b/include/asm-arm/arch-omap/tc.h deleted file mode 100644 index 65a9c82d3bf7..000000000000 --- a/include/asm-arm/arch-omap/tc.h +++ /dev/null
@@ -1,106 +0,0 @@
1	/*
2	* linux/include/asm-arm/arch-omap/tc.h
3	*
4	* OMAP Traffic Controller
5	*
6	* Copyright (C) 2004 Nokia Corporation
7	* Author: Imre Deak <imre.deak@nokia.com>
8	*
9	* This program is free software; you can redistribute it and/or modify it
10	* under the terms of the GNU General Public License as published by the
11	* Free Software Foundation; either version 2 of the License, or (at your
12	* option) any later version.
13	*
14	* This program is distributed in the hope that it will be useful, but
15	* WITHOUT ANY WARRANTY; without even the implied warranty of
16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17	* General Public License for more details.
18	*
19	* You should have received a copy of the GNU General Public License along
20	* with this program; if not, write to the Free Software Foundation, Inc.,
21	* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22	*/
23
24	#ifndef __ASM_ARCH_TC_H
25	#define __ASM_ARCH_TC_H
26
27	#define TCMIF_BASE 0xfffecc00
28	#define OMAP_TC_OCPT1_PRIOR (TCMIF_BASE + 0x00)
29	#define OMAP_TC_EMIFS_PRIOR (TCMIF_BASE + 0x04)
30	#define OMAP_TC_EMIFF_PRIOR (TCMIF_BASE + 0x08)
31	#define EMIFS_CONFIG (TCMIF_BASE + 0x0c)
32	#define EMIFS_CS0_CONFIG (TCMIF_BASE + 0x10)
33	#define EMIFS_CS1_CONFIG (TCMIF_BASE + 0x14)
34	#define EMIFS_CS2_CONFIG (TCMIF_BASE + 0x18)
35	#define EMIFS_CS3_CONFIG (TCMIF_BASE + 0x1c)
36	#define EMIFF_SDRAM_CONFIG (TCMIF_BASE + 0x20)
37	#define EMIFF_MRS (TCMIF_BASE + 0x24)
38	#define TC_TIMEOUT1 (TCMIF_BASE + 0x28)
39	#define TC_TIMEOUT2 (TCMIF_BASE + 0x2c)
40	#define TC_TIMEOUT3 (TCMIF_BASE + 0x30)
41	#define TC_ENDIANISM (TCMIF_BASE + 0x34)
42	#define EMIFF_SDRAM_CONFIG_2 (TCMIF_BASE + 0x3c)
43	#define EMIF_CFG_DYNAMIC_WS (TCMIF_BASE + 0x40)
44	#define EMIFS_ACS0 (TCMIF_BASE + 0x50)
45	#define EMIFS_ACS1 (TCMIF_BASE + 0x54)
46	#define EMIFS_ACS2 (TCMIF_BASE + 0x58)
47	#define EMIFS_ACS3 (TCMIF_BASE + 0x5c)
48	#define OMAP_TC_OCPT2_PRIOR (TCMIF_BASE + 0xd0)
49
50	/* external EMIFS chipselect regions */
51	#define OMAP_CS0_PHYS 0x00000000
52	#define OMAP_CS0_SIZE SZ_64M
53
54	#define OMAP_CS1_PHYS 0x04000000
55	#define OMAP_CS1_SIZE SZ_64M
56
57	#define OMAP_CS1A_PHYS OMAP_CS1_PHYS
58	#define OMAP_CS1A_SIZE SZ_32M
59
60	#define OMAP_CS1B_PHYS (OMAP_CS1A_PHYS + OMAP_CS1A_SIZE)
61	#define OMAP_CS1B_SIZE SZ_32M
62
63	#define OMAP_CS2_PHYS 0x08000000
64	#define OMAP_CS2_SIZE SZ_64M
65
66	#define OMAP_CS2A_PHYS OMAP_CS2_PHYS
67	#define OMAP_CS2A_SIZE SZ_32M
68
69	#define OMAP_CS2B_PHYS (OMAP_CS2A_PHYS + OMAP_CS2A_SIZE)
70	#define OMAP_CS2B_SIZE SZ_32M
71
72	#define OMAP_CS3_PHYS 0x0c000000
73	#define OMAP_CS3_SIZE SZ_64M
74
75	#ifndef __ASSEMBLER__
76
77	/* EMIF Slow Interface Configuration Register */
78	#define OMAP_EMIFS_CONFIG_FR (1 << 4)
79	#define OMAP_EMIFS_CONFIG_PDE (1 << 3)
80	#define OMAP_EMIFS_CONFIG_PWD_EN (1 << 2)
81	#define OMAP_EMIFS_CONFIG_BM (1 << 1)
82	#define OMAP_EMIFS_CONFIG_WP (1 << 0)
83
84	#define EMIFS_CCS(n) (EMIFS_CS0_CONFIG + (4 * (n)))
85	#define EMIFS_ACS(n) (EMIFS_ACS0 + (4 * (n)))
86
87	/* Almost all documentation for chip and board memory maps assumes
88	* BM is clear. Most devel boards have a switch to control booting
89	* from NOR flash (using external chipselect 3) rather than mask ROM,
90	* which uses BM to interchange the physical CS0 and CS3 addresses.
91	*/
92	static inline u32 omap_cs0_phys(void)
93	{
94	return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
95	? OMAP_CS3_PHYS : 0;
96	}
97
98	static inline u32 omap_cs3_phys(void)
99	{
100	return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
101	? 0 : OMAP_CS3_PHYS;
102	}
103
104	#endif /* __ASSEMBLER__ */
105
106	#endif /* __ASM_ARCH_TC_H */