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1/*
2 * linux/include/asm-arm/arch-omap/board-innovator.h
3 *
4 * Copyright (C) 2001 RidgeRun, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26#ifndef __ASM_ARCH_OMAP_INNOVATOR_H
27#define __ASM_ARCH_OMAP_INNOVATOR_H
28
29#if defined (CONFIG_ARCH_OMAP1510)
30
31#ifndef OMAP_SDRAM_DEVICE
32#define OMAP_SDRAM_DEVICE D256M_1X16_4B
33#endif
34
35#define OMAP1510P1_IMIF_PRI_VALUE 0x00
36#define OMAP1510P1_EMIFS_PRI_VALUE 0x00
37#define OMAP1510P1_EMIFF_PRI_VALUE 0x00
38
39/*
40 * These definitions define an area of FLASH set aside
41 * for the use of MTD/JFFS2. This is the area of flash
42 * that a JFFS2 filesystem will reside which is mounted
43 * at boot with the "root=/dev/mtdblock/0 rw"
44 * command line option. The flash address used here must
45 * fall within the legal range defined by rrload for storing
46 * the filesystem component. This address will be sufficiently
47 * deep into the overall flash range to avoid the other
48 * components also stored in flash such as the bootloader,
49 * the bootloader params, and the kernel.
50 * The SW2 settings for the map below are:
51 * 1 off, 2 off, 3 on, 4 off.
52 */
53
54/* Intel flash_0, partitioned as expected by rrload */
55#define OMAP_FLASH_0_BASE 0xD8000000
56#define OMAP_FLASH_0_START 0x00000000
57#define OMAP_FLASH_0_SIZE SZ_16M
58
59/* Intel flash_1, used for cramfs or other flash file systems */
60#define OMAP_FLASH_1_BASE 0xD9000000
61#define OMAP_FLASH_1_START 0x01000000
62#define OMAP_FLASH_1_SIZE SZ_16M
63
64#define NR_FPGA_IRQS 24
65#define NR_IRQS IH_BOARD_BASE + NR_FPGA_IRQS
66
67#ifndef __ASSEMBLY__
68void fpga_write(unsigned char val, int reg);
69unsigned char fpga_read(int reg);
70#endif
71
72#endif /* CONFIG_ARCH_OMAP1510 */
73
74#if defined (CONFIG_ARCH_OMAP16XX)
75
76/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
77#define INNOVATOR1610_ETHR_START 0x04000300
78
79#endif /* CONFIG_ARCH_OMAP1610 */
80#endif /* __ASM_ARCH_OMAP_INNOVATOR_H */