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-rw-r--r--include/asm-arm/arch-ns9xxx/regs-bbu.h28
-rw-r--r--include/asm-arm/arch-ns9xxx/regs-mem.h6
-rw-r--r--include/asm-arm/arch-ns9xxx/regs-sys.h2
3 files changed, 30 insertions, 6 deletions
diff --git a/include/asm-arm/arch-ns9xxx/regs-bbu.h b/include/asm-arm/arch-ns9xxx/regs-bbu.h
index e26269546240..7ee194dc6354 100644
--- a/include/asm-arm/arch-ns9xxx/regs-bbu.h
+++ b/include/asm-arm/arch-ns9xxx/regs-bbu.h
@@ -15,7 +15,31 @@
15 15
16/* BBus Utility */ 16/* BBus Utility */
17 17
18/* GPIO Configuration Register */ 18/* GPIO Configuration Registers block 1 */
19#define BBU_GC(x) __REG2(0x9060000c, (x)) 19/* NOTE: the HRM starts counting at 1 for the GPIO registers, here the start is
20 * at 0 for each block. That is, BBU_GCONFb1(0) is GPIO Configuration Register
21 * #1, BBU_GCONFb2(0) is GPIO Configuration Register #8. */
22#define BBU_GCONFb1(x) __REG2(0x90600010, (x))
23#define BBU_GCONFb2(x) __REG2(0x90600100, (x))
24
25#define BBU_GCONFx_DIR(m) __REGBIT(3 + (((m) & 7) << 2))
26#define BBU_GCONFx_DIR_INPUT(m) __REGVAL(BBU_GCONFx_DIR(m), 0)
27#define BBU_GCONFx_DIR_OUTPUT(m) __REGVAL(BBU_GCONFx_DIR(m), 1)
28#define BBU_GCONFx_INV(m) __REGBIT(2 + (((m) & 7) << 2))
29#define BBU_GCONFx_INV_NO(m) __REGVAL(BBU_GCONFx_INV(m), 0)
30#define BBU_GCONFx_INV_YES(m) __REGVAL(BBU_GCONFx_INV(m), 1)
31#define BBU_GCONFx_FUNC(m) __REGBITS(1 + (((m) & 7) << 2), ((m) & 7) << 2)
32#define BBU_GCONFx_FUNC_0(m) __REGVAL(BBU_GCONFx_FUNC(m), 0)
33#define BBU_GCONFx_FUNC_1(m) __REGVAL(BBU_GCONFx_FUNC(m), 1)
34#define BBU_GCONFx_FUNC_2(m) __REGVAL(BBU_GCONFx_FUNC(m), 2)
35#define BBU_GCONFx_FUNC_3(m) __REGVAL(BBU_GCONFx_FUNC(m), 3)
36
37#define BBU_GCTRL1 __REG(0x90600030)
38#define BBU_GCTRL2 __REG(0x90600034)
39#define BBU_GCTRL3 __REG(0x90600120)
40
41#define BBU_GSTAT1 __REG(0x90600040)
42#define BBU_GSTAT2 __REG(0x90600044)
43#define BBU_GSTAT3 __REG(0x90600130)
20 44
21#endif /* ifndef __ASM_ARCH_REGSBBU_H */ 45#endif /* ifndef __ASM_ARCH_REGSBBU_H */
diff --git a/include/asm-arm/arch-ns9xxx/regs-mem.h b/include/asm-arm/arch-ns9xxx/regs-mem.h
index 8ed8448767b9..fb455a0ed845 100644
--- a/include/asm-arm/arch-ns9xxx/regs-mem.h
+++ b/include/asm-arm/arch-ns9xxx/regs-mem.h
@@ -79,9 +79,9 @@
79#define MEM_SMC(x) __REG2(0xa0700200, (x) << 3) 79#define MEM_SMC(x) __REG2(0xa0700200, (x) << 3)
80 80
81/* Static Memory Configuration Register x: Write protect */ 81/* Static Memory Configuration Register x: Write protect */
82#define MEM_SMC_WSMC __REGBIT(20) 82#define MEM_SMC_PSMC __REGBIT(20)
83#define MEM_SMC_WSMC_OFF __REGVAL(MEM_SMC_WSMC, 0) 83#define MEM_SMC_PSMC_OFF __REGVAL(MEM_SMC_PSMC, 0)
84#define MEM_SMC_WSMC_ON __REGVAL(MEM_SMC_WSMC, 1) 84#define MEM_SMC_PSMC_ON __REGVAL(MEM_SMC_PSMC, 1)
85 85
86/* Static Memory Configuration Register x: Buffer enable */ 86/* Static Memory Configuration Register x: Buffer enable */
87#define MEM_SMC_BSMC __REGBIT(19) 87#define MEM_SMC_BSMC __REGBIT(19)
diff --git a/include/asm-arm/arch-ns9xxx/regs-sys.h b/include/asm-arm/arch-ns9xxx/regs-sys.h
index a42546aeb92a..749262f86204 100644
--- a/include/asm-arm/arch-ns9xxx/regs-sys.h
+++ b/include/asm-arm/arch-ns9xxx/regs-sys.h
@@ -64,7 +64,7 @@
64 64
65/* Timer x Control register: Timer enable */ 65/* Timer x Control register: Timer enable */
66#define SYS_TCx_TEN __REGBIT(15) 66#define SYS_TCx_TEN __REGBIT(15)
67#define SYS_TCx_TEN_DIS __REGVAL(SYS_TCx_TEN, 1) 67#define SYS_TCx_TEN_DIS __REGVAL(SYS_TCx_TEN, 0)
68#define SYS_TCx_TEN_EN __REGVAL(SYS_TCx_TEN, 1) 68#define SYS_TCx_TEN_EN __REGVAL(SYS_TCx_TEN, 1)
69 69
70/* Timer x Control register: CPU debug mode */ 70/* Timer x Control register: CPU debug mode */