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-rw-r--r--include/asm-arm/arch-ns9xxx/board.h2
-rw-r--r--include/asm-arm/arch-ns9xxx/clock.h34
-rw-r--r--include/asm-arm/arch-ns9xxx/hardware.h5
-rw-r--r--include/asm-arm/arch-ns9xxx/processor.h3
-rw-r--r--include/asm-arm/arch-ns9xxx/regs-sys.h6
5 files changed, 45 insertions, 5 deletions
diff --git a/include/asm-arm/arch-ns9xxx/board.h b/include/asm-arm/arch-ns9xxx/board.h
index 91dc8fb1027f..716f34fdb716 100644
--- a/include/asm-arm/arch-ns9xxx/board.h
+++ b/include/asm-arm/arch-ns9xxx/board.h
@@ -15,4 +15,6 @@
15 15
16#define board_is_a9m9750dev() (machine_is_cc9p9360dev()) 16#define board_is_a9m9750dev() (machine_is_cc9p9360dev())
17 17
18#define board_is_jscc9p9360() (machine_is_cc9p9360js())
19
18#endif /* ifndef __ASM_ARCH_BOARD_H */ 20#endif /* ifndef __ASM_ARCH_BOARD_H */
diff --git a/include/asm-arm/arch-ns9xxx/clock.h b/include/asm-arm/arch-ns9xxx/clock.h
index a7c5ab3d9011..bf30cbdcc2bf 100644
--- a/include/asm-arm/arch-ns9xxx/clock.h
+++ b/include/asm-arm/arch-ns9xxx/clock.h
@@ -11,13 +11,43 @@
11#ifndef __ASM_ARCH_CLOCK_H 11#ifndef __ASM_ARCH_CLOCK_H
12#define __ASM_ARCH_CLOCK_H 12#define __ASM_ARCH_CLOCK_H
13 13
14#include <asm/arch-ns9xxx/regs-sys.h>
15
16#define CRYSTAL 29491200 /* Hz */
17
18/* The HRM calls this value f_vco */
14static inline u32 ns9xxx_systemclock(void) __attribute__((const)); 19static inline u32 ns9xxx_systemclock(void) __attribute__((const));
15static inline u32 ns9xxx_systemclock(void) 20static inline u32 ns9xxx_systemclock(void)
16{ 21{
22 u32 pll = SYS_PLL;
23
17 /* 24 /*
18 * This should be a multiple of HZ * TIMERCLOCKSELECT (in time.c) 25 * The system clock should be a multiple of HZ * TIMERCLOCKSELECT (in
26 * time.c).
27 *
28 * The following values are given:
29 * - TIMERCLOCKSELECT == 2^i for an i in {0 .. 6}
30 * - CRYSTAL == 29491200 == 2^17 * 3^2 * 5^2
31 * - ND in {0 .. 31}
32 * - FS in {0 .. 3}
33 *
34 * Assuming the worst, we consider:
35 * - TIMERCLOCKSELECT == 64
36 * - ND == 0
37 * - FS == 3
38 *
39 * So HZ should be a divisor of:
40 * (CRYSTAL * (ND + 1) >> FS) / TIMERCLOCKSELECT
41 * == (2^17 * 3^2 * 5^2 * 1 >> 3) / 64
42 * == 2^8 * 3^2 * 5^2
43 * == 57600
44 *
45 * Currently HZ is defined to be 100 for this platform.
46 *
47 * Fine.
19 */ 48 */
20 return 353894400; 49 return CRYSTAL * (REGGET(pll, SYS_PLL, ND) + 1)
50 >> REGGET(pll, SYS_PLL, FS);
21} 51}
22 52
23static inline u32 ns9xxx_cpuclock(void) __attribute__((const)); 53static inline u32 ns9xxx_cpuclock(void) __attribute__((const));
diff --git a/include/asm-arm/arch-ns9xxx/hardware.h b/include/asm-arm/arch-ns9xxx/hardware.h
index 6819da7c48d4..25600554c4fe 100644
--- a/include/asm-arm/arch-ns9xxx/hardware.h
+++ b/include/asm-arm/arch-ns9xxx/hardware.h
@@ -51,8 +51,9 @@
51 ~(__REGVAL(reg ## _ ## field, value)))) \ 51 ~(__REGVAL(reg ## _ ## field, value)))) \
52 | (__REGVAL(reg ## _ ## field, value)))) 52 | (__REGVAL(reg ## _ ## field, value))))
53 53
54# define REGGET(reg, field) \ 54# define REGGET(var, reg, field) \
55 ((reg & (reg ## _ ## field)) / (field & (-field))) 55 ((var & (reg ## _ ## field)) / \
56 ((reg ## _ ## field) & (-(reg ## _ ## field))))
56 57
57#else 58#else
58 59
diff --git a/include/asm-arm/arch-ns9xxx/processor.h b/include/asm-arm/arch-ns9xxx/processor.h
index 716c106ac0bf..223e51b8e104 100644
--- a/include/asm-arm/arch-ns9xxx/processor.h
+++ b/include/asm-arm/arch-ns9xxx/processor.h
@@ -13,6 +13,7 @@
13 13
14#include <asm/mach-types.h> 14#include <asm/mach-types.h>
15 15
16#define processor_is_ns9360() (machine_is_cc9p9360dev()) 16#define processor_is_ns9360() (machine_is_cc9p9360dev() \
17 || machine_is_cc9p9360js())
17 18
18#endif /* ifndef __ASM_ARCH_PROCESSOR_H */ 19#endif /* ifndef __ASM_ARCH_PROCESSOR_H */
diff --git a/include/asm-arm/arch-ns9xxx/regs-sys.h b/include/asm-arm/arch-ns9xxx/regs-sys.h
index 8162a50bb273..a42546aeb92a 100644
--- a/include/asm-arm/arch-ns9xxx/regs-sys.h
+++ b/include/asm-arm/arch-ns9xxx/regs-sys.h
@@ -48,6 +48,12 @@
48/* PLL Configuration register */ 48/* PLL Configuration register */
49#define SYS_PLL __REG(0xa0900188) 49#define SYS_PLL __REG(0xa0900188)
50 50
51/* PLL FS status */
52#define SYS_PLL_FS __REGBITS(24, 23)
53
54/* PLL ND status */
55#define SYS_PLL_ND __REGBITS(20, 16)
56
51/* PLL Configuration register: PLL SW change */ 57/* PLL Configuration register: PLL SW change */
52#define SYS_PLL_SWC __REGBIT(15) 58#define SYS_PLL_SWC __REGBIT(15)
53#define SYS_PLL_SWC_NO __REGVAL(SYS_PLL_SWC, 0) 59#define SYS_PLL_SWC_NO __REGVAL(SYS_PLL_SWC, 0)