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-rw-r--r--include/asm-arm/arch-l7200/time.h72
1 files changed, 72 insertions, 0 deletions
diff --git a/include/asm-arm/arch-l7200/time.h b/include/asm-arm/arch-l7200/time.h
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1/*
2 * linux/include/asm-arm/arch-l7200/time.h
3 *
4 * Copyright (C) 2000 Rob Scott (rscott@mtrob.fdns.net)
5 * Steve Hill (sjhill@cotw.com)
6 *
7 * Changelog:
8 * 01-02-2000 RS Created l7200 version, derived from rpc code
9 * 05-03-2000 SJH Complete rewrite
10 */
11#ifndef _ASM_ARCH_TIME_H
12#define _ASM_ARCH_TIME_H
13
14#include <asm/arch/irqs.h>
15
16/*
17 * RTC base register address
18 */
19#define RTC_BASE (IO_BASE_2 + 0x2000)
20
21/*
22 * RTC registers
23 */
24#define RTC_RTCDR (*(volatile unsigned char *) (RTC_BASE + 0x000))
25#define RTC_RTCMR (*(volatile unsigned char *) (RTC_BASE + 0x004))
26#define RTC_RTCS (*(volatile unsigned char *) (RTC_BASE + 0x008))
27#define RTC_RTCC (*(volatile unsigned char *) (RTC_BASE + 0x008))
28#define RTC_RTCDV (*(volatile unsigned char *) (RTC_BASE + 0x00c))
29#define RTC_RTCCR (*(volatile unsigned char *) (RTC_BASE + 0x010))
30
31/*
32 * RTCCR register values
33 */
34#define RTC_RATE_32 0x00 /* 32 Hz tick */
35#define RTC_RATE_64 0x10 /* 64 Hz tick */
36#define RTC_RATE_128 0x20 /* 128 Hz tick */
37#define RTC_RATE_256 0x30 /* 256 Hz tick */
38#define RTC_EN_ALARM 0x01 /* Enable alarm */
39#define RTC_EN_TIC 0x04 /* Enable counter */
40#define RTC_EN_STWDOG 0x08 /* Enable watchdog */
41
42/*
43 * Handler for RTC timer interrupt
44 */
45static irqreturn_t
46timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
47{
48 do_timer(regs);
49#ifndef CONFIG_SMP
50 update_process_times(user_mode(regs));
51#endif
52 do_profile(regs);
53 RTC_RTCC = 0; /* Clear interrupt */
54
55 return IRQ_HANDLED;
56}
57
58/*
59 * Set up RTC timer interrupt, and return the current time in seconds.
60 */
61void __init time_init(void)
62{
63 RTC_RTCC = 0; /* Clear interrupt */
64
65 timer_irq.handler = timer_interrupt;
66
67 setup_irq(IRQ_RTC_TICK, &timer_irq);
68
69 RTC_RTCCR = RTC_RATE_128 | RTC_EN_TIC; /* Set rate and enable timer */
70}
71
72#endif