diff options
Diffstat (limited to 'include/asm-arm/arch-ks8695/regs-irq.h')
| -rw-r--r-- | include/asm-arm/arch-ks8695/regs-irq.h | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/include/asm-arm/arch-ks8695/regs-irq.h b/include/asm-arm/arch-ks8695/regs-irq.h deleted file mode 100644 index 70b193f6b756..000000000000 --- a/include/asm-arm/arch-ks8695/regs-irq.h +++ /dev/null | |||
| @@ -1,41 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * include/asm-arm/arch-ks8695/regs-irq.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk> | ||
| 5 | * Copyright (C) 2006 Simtec Electronics | ||
| 6 | * | ||
| 7 | * KS8695 - IRQ registers and bit definitions | ||
| 8 | * | ||
| 9 | * This file is licensed under the terms of the GNU General Public | ||
| 10 | * License version 2. This program is licensed "as is" without any | ||
| 11 | * warranty of any kind, whether express or implied. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #ifndef KS8695_IRQ_H | ||
| 15 | #define KS8695_IRQ_H | ||
| 16 | |||
| 17 | #define KS8695_IRQ_OFFSET (0xF0000 + 0xE200) | ||
| 18 | #define KS8695_IRQ_VA (KS8695_IO_VA + KS8695_IRQ_OFFSET) | ||
| 19 | #define KS8695_IRQ_PA (KS8695_IO_PA + KS8695_IRQ_OFFSET) | ||
| 20 | |||
| 21 | |||
| 22 | /* | ||
| 23 | * Interrupt Controller registers | ||
| 24 | */ | ||
| 25 | #define KS8695_INTMC (0x00) /* Mode Control Register */ | ||
| 26 | #define KS8695_INTEN (0x04) /* Interrupt Enable Register */ | ||
| 27 | #define KS8695_INTST (0x08) /* Interrupt Status Register */ | ||
| 28 | #define KS8695_INTPW (0x0c) /* Interrupt Priority (WAN MAC) */ | ||
| 29 | #define KS8695_INTPH (0x10) /* Interrupt Priority (HPNA) [KS8695 only] */ | ||
| 30 | #define KS8695_INTPL (0x14) /* Interrupt Priority (LAN MAC) */ | ||
| 31 | #define KS8695_INTPT (0x18) /* Interrupt Priority (Timer) */ | ||
| 32 | #define KS8695_INTPU (0x1c) /* Interrupt Priority (UART) */ | ||
| 33 | #define KS8695_INTPE (0x20) /* Interrupt Priority (External Interrupt) */ | ||
| 34 | #define KS8695_INTPC (0x24) /* Interrupt Priority (Communications Channel) */ | ||
| 35 | #define KS8695_INTPBE (0x28) /* Interrupt Priority (Bus Error Response) */ | ||
| 36 | #define KS8695_INTMS (0x2c) /* Interrupt Mask Status Register */ | ||
| 37 | #define KS8695_INTHPF (0x30) /* Interrupt Pending Highest Priority (FIQ) */ | ||
| 38 | #define KS8695_INTHPI (0x34) /* Interrupt Pending Highest Priority (IRQ) */ | ||
| 39 | |||
| 40 | |||
| 41 | #endif | ||