diff options
Diffstat (limited to 'include/asm-arm/arch-ixp4xx')
-rw-r--r-- | include/asm-arm/arch-ixp4xx/coyote.h | 5 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp4xx/gtwx5715.h | 4 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp4xx/ixdp425.h | 3 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp4xx/nas100d.h | 3 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp4xx/nslu2.h | 3 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp4xx/platform.h | 21 |
6 files changed, 12 insertions, 27 deletions
diff --git a/include/asm-arm/arch-ixp4xx/coyote.h b/include/asm-arm/arch-ixp4xx/coyote.h index dd0c2d2d8503..7ac9ba2c035c 100644 --- a/include/asm-arm/arch-ixp4xx/coyote.h +++ b/include/asm-arm/arch-ixp4xx/coyote.h | |||
@@ -16,9 +16,6 @@ | |||
16 | #error "Do not include this directly, instead #include <asm/hardware.h>" | 16 | #error "Do not include this directly, instead #include <asm/hardware.h>" |
17 | #endif | 17 | #endif |
18 | 18 | ||
19 | #define COYOTE_FLASH_BASE IXP4XX_EXP_BUS_CS0_BASE_PHYS | ||
20 | #define COYOTE_FLASH_SIZE IXP4XX_EXP_BUS_CSX_REGION_SIZE * 2 | ||
21 | |||
22 | /* PCI controller GPIO to IRQ pin mappings */ | 19 | /* PCI controller GPIO to IRQ pin mappings */ |
23 | #define COYOTE_PCI_SLOT0_PIN 6 | 20 | #define COYOTE_PCI_SLOT0_PIN 6 |
24 | #define COYOTE_PCI_SLOT1_PIN 11 | 21 | #define COYOTE_PCI_SLOT1_PIN 11 |
@@ -26,7 +23,7 @@ | |||
26 | #define COYOTE_PCI_SLOT0_DEVID 14 | 23 | #define COYOTE_PCI_SLOT0_DEVID 14 |
27 | #define COYOTE_PCI_SLOT1_DEVID 15 | 24 | #define COYOTE_PCI_SLOT1_DEVID 15 |
28 | 25 | ||
29 | #define COYOTE_IDE_BASE_PHYS IXP4XX_EXP_BUS_CS3_BASE_PHYS | 26 | #define COYOTE_IDE_BASE_PHYS IXP4XX_EXP_BUS_BASE(3) |
30 | #define COYOTE_IDE_BASE_VIRT 0xFFFE1000 | 27 | #define COYOTE_IDE_BASE_VIRT 0xFFFE1000 |
31 | #define COYOTE_IDE_REGION_SIZE 0x1000 | 28 | #define COYOTE_IDE_REGION_SIZE 0x1000 |
32 | 29 | ||
diff --git a/include/asm-arm/arch-ixp4xx/gtwx5715.h b/include/asm-arm/arch-ixp4xx/gtwx5715.h index fc460af70627..c3069d67c00e 100644 --- a/include/asm-arm/arch-ixp4xx/gtwx5715.h +++ b/include/asm-arm/arch-ixp4xx/gtwx5715.h | |||
@@ -57,10 +57,6 @@ | |||
57 | #define GTWX5715_GPIO13_IRQ IRQ_IXP4XX_SW_INT1 | 57 | #define GTWX5715_GPIO13_IRQ IRQ_IXP4XX_SW_INT1 |
58 | #define GTWX5715_GPIO14_IRQ IRQ_IXP4XX_SW_INT2 | 58 | #define GTWX5715_GPIO14_IRQ IRQ_IXP4XX_SW_INT2 |
59 | 59 | ||
60 | |||
61 | #define GTWX5715_FLASH_BASE IXP4XX_EXP_BUS_CS0_BASE_PHYS | ||
62 | #define GTWX5715_FLASH_SIZE (0x00800000) | ||
63 | |||
64 | /* PCI controller GPIO to IRQ pin mappings | 60 | /* PCI controller GPIO to IRQ pin mappings |
65 | 61 | ||
66 | INTA INTB | 62 | INTA INTB |
diff --git a/include/asm-arm/arch-ixp4xx/ixdp425.h b/include/asm-arm/arch-ixp4xx/ixdp425.h index 7d21bf941379..3d3820d7ba09 100644 --- a/include/asm-arm/arch-ixp4xx/ixdp425.h +++ b/include/asm-arm/arch-ixp4xx/ixdp425.h | |||
@@ -16,9 +16,6 @@ | |||
16 | #error "Do not include this directly, instead #include <asm/hardware.h>" | 16 | #error "Do not include this directly, instead #include <asm/hardware.h>" |
17 | #endif | 17 | #endif |
18 | 18 | ||
19 | #define IXDP425_FLASH_BASE IXP4XX_EXP_BUS_CS0_BASE_PHYS | ||
20 | #define IXDP425_FLASH_SIZE IXP4XX_EXP_BUS_CSX_REGION_SIZE | ||
21 | |||
22 | #define IXDP425_SDA_PIN 7 | 19 | #define IXDP425_SDA_PIN 7 |
23 | #define IXDP425_SCL_PIN 6 | 20 | #define IXDP425_SCL_PIN 6 |
24 | 21 | ||
diff --git a/include/asm-arm/arch-ixp4xx/nas100d.h b/include/asm-arm/arch-ixp4xx/nas100d.h index ce7a86a98fc2..51ac0180427c 100644 --- a/include/asm-arm/arch-ixp4xx/nas100d.h +++ b/include/asm-arm/arch-ixp4xx/nas100d.h | |||
@@ -19,9 +19,6 @@ | |||
19 | #error "Do not include this directly, instead #include <asm/hardware.h>" | 19 | #error "Do not include this directly, instead #include <asm/hardware.h>" |
20 | #endif | 20 | #endif |
21 | 21 | ||
22 | #define NAS100D_FLASH_BASE IXP4XX_EXP_BUS_CS0_BASE_PHYS | ||
23 | #define NAS100D_FLASH_SIZE IXP4XX_EXP_BUS_CSX_REGION_SIZE | ||
24 | |||
25 | #define NAS100D_SDA_PIN 6 | 22 | #define NAS100D_SDA_PIN 6 |
26 | #define NAS100D_SCL_PIN 5 | 23 | #define NAS100D_SCL_PIN 5 |
27 | 24 | ||
diff --git a/include/asm-arm/arch-ixp4xx/nslu2.h b/include/asm-arm/arch-ixp4xx/nslu2.h index b8b347a559c7..4281838873ef 100644 --- a/include/asm-arm/arch-ixp4xx/nslu2.h +++ b/include/asm-arm/arch-ixp4xx/nslu2.h | |||
@@ -18,9 +18,6 @@ | |||
18 | #error "Do not include this directly, instead #include <asm/hardware.h>" | 18 | #error "Do not include this directly, instead #include <asm/hardware.h>" |
19 | #endif | 19 | #endif |
20 | 20 | ||
21 | #define NSLU2_FLASH_BASE IXP4XX_EXP_BUS_CS0_BASE_PHYS | ||
22 | #define NSLU2_FLASH_SIZE IXP4XX_EXP_BUS_CSX_REGION_SIZE | ||
23 | |||
24 | #define NSLU2_SDA_PIN 7 | 21 | #define NSLU2_SDA_PIN 7 |
25 | #define NSLU2_SCL_PIN 6 | 22 | #define NSLU2_SCL_PIN 6 |
26 | 23 | ||
diff --git a/include/asm-arm/arch-ixp4xx/platform.h b/include/asm-arm/arch-ixp4xx/platform.h index 6b77ed26be79..daf9790645ca 100644 --- a/include/asm-arm/arch-ixp4xx/platform.h +++ b/include/asm-arm/arch-ixp4xx/platform.h | |||
@@ -26,16 +26,17 @@ | |||
26 | */ | 26 | */ |
27 | #define IXP4XX_EXP_BUS_BASE_PHYS (0x50000000) | 27 | #define IXP4XX_EXP_BUS_BASE_PHYS (0x50000000) |
28 | 28 | ||
29 | #define IXP4XX_EXP_BUS_CSX_REGION_SIZE (0x01000000) | 29 | /* |
30 | 30 | * The expansion bus on the IXP4xx can be configured for either 16 or | |
31 | #define IXP4XX_EXP_BUS_CS0_BASE_PHYS (IXP4XX_EXP_BUS_BASE_PHYS + 0x00000000) | 31 | * 32MB windows and the CS offset for each region changes based on the |
32 | #define IXP4XX_EXP_BUS_CS1_BASE_PHYS (IXP4XX_EXP_BUS_BASE_PHYS + 0x01000000) | 32 | * current configuration. This means that we cannot simply hardcode |
33 | #define IXP4XX_EXP_BUS_CS2_BASE_PHYS (IXP4XX_EXP_BUS_BASE_PHYS + 0x02000000) | 33 | * each offset. ixp4xx_sys_init() looks at the expansion bus configuration |
34 | #define IXP4XX_EXP_BUS_CS3_BASE_PHYS (IXP4XX_EXP_BUS_BASE_PHYS + 0x03000000) | 34 | * as setup by the bootloader to determine our window size. |
35 | #define IXP4XX_EXP_BUS_CS4_BASE_PHYS (IXP4XX_EXP_BUS_BASE_PHYS + 0x04000000) | 35 | */ |
36 | #define IXP4XX_EXP_BUS_CS5_BASE_PHYS (IXP4XX_EXP_BUS_BASE_PHYS + 0x05000000) | 36 | extern unsigned long ixp4xx_exp_bus_size; |
37 | #define IXP4XX_EXP_BUS_CS6_BASE_PHYS (IXP4XX_EXP_BUS_BASE_PHYS + 0x06000000) | 37 | |
38 | #define IXP4XX_EXP_BUS_CS7_BASE_PHYS (IXP4XX_EXP_BUS_BASE_PHYS + 0x07000000) | 38 | #define IXP4XX_EXP_BUS_BASE(region)\ |
39 | (IXP4XX_EXP_BUS_BASE_PHYS + ((region) * ixp4xx_exp_bus_size)) | ||
39 | 40 | ||
40 | #define IXP4XX_FLASH_WRITABLE (0x2) | 41 | #define IXP4XX_FLASH_WRITABLE (0x2) |
41 | #define IXP4XX_FLASH_DEFAULT (0xbcd23c40) | 42 | #define IXP4XX_FLASH_DEFAULT (0xbcd23c40) |