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-rw-r--r--include/asm-arm/arch-ixp4xx/debug-macro.S15
-rw-r--r--include/asm-arm/arch-ixp4xx/irq.h13
-rw-r--r--include/asm-arm/arch-ixp4xx/param.h3
-rw-r--r--include/asm-arm/arch-ixp4xx/platform.h27
-rw-r--r--include/asm-arm/arch-ixp4xx/uncompress.h18
5 files changed, 34 insertions, 42 deletions
diff --git a/include/asm-arm/arch-ixp4xx/debug-macro.S b/include/asm-arm/arch-ixp4xx/debug-macro.S
index 2e23651e217f..37bc8ef23e67 100644
--- a/include/asm-arm/arch-ixp4xx/debug-macro.S
+++ b/include/asm-arm/arch-ixp4xx/debug-macro.S
@@ -20,16 +20,5 @@
20 @ byte writes used - Big Endian. 20 @ byte writes used - Big Endian.
21 .endm 21 .endm
22 22
23 .macro senduart,rd,rx 23#define UART_SHIFT 2
24 strb \rd, [\rx] 24#include <asm/hardware/debug-8250.S>
25 .endm
26
27 .macro waituart,rd,rx
281002: ldrb \rd, [\rx, #0x14]
29 and \rd, \rd, #0x60 @ check THRE and TEMT bits
30 teq \rd, #0x60
31 bne 1002b
32 .endm
33
34 .macro busyuart,rd,rx
35 .endm
diff --git a/include/asm-arm/arch-ixp4xx/irq.h b/include/asm-arm/arch-ixp4xx/irq.h
deleted file mode 100644
index 87da70695f0a..000000000000
--- a/include/asm-arm/arch-ixp4xx/irq.h
+++ /dev/null
@@ -1,13 +0,0 @@
1/*
2 * irq.h
3 *
4 * Copyright (C) 2002 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#define fixup_irq(irq) (irq)
13
diff --git a/include/asm-arm/arch-ixp4xx/param.h b/include/asm-arm/arch-ixp4xx/param.h
deleted file mode 100644
index 8a757125e5e7..000000000000
--- a/include/asm-arm/arch-ixp4xx/param.h
+++ /dev/null
@@ -1,3 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-ixp4xx/param.h
3 */
diff --git a/include/asm-arm/arch-ixp4xx/platform.h b/include/asm-arm/arch-ixp4xx/platform.h
index daf9790645ca..13aee17b0475 100644
--- a/include/asm-arm/arch-ixp4xx/platform.h
+++ b/include/asm-arm/arch-ixp4xx/platform.h
@@ -38,6 +38,33 @@ extern unsigned long ixp4xx_exp_bus_size;
38#define IXP4XX_EXP_BUS_BASE(region)\ 38#define IXP4XX_EXP_BUS_BASE(region)\
39 (IXP4XX_EXP_BUS_BASE_PHYS + ((region) * ixp4xx_exp_bus_size)) 39 (IXP4XX_EXP_BUS_BASE_PHYS + ((region) * ixp4xx_exp_bus_size))
40 40
41#define IXP4XX_EXP_BUS_END(region)\
42 (IXP4XX_EXP_BUS_BASE(region) + ixp4xx_exp_bus_size - 1)
43
44/* Those macros can be used to adjust timing and configure
45 * other features for each region.
46 */
47
48#define IXP4XX_EXP_BUS_RECOVERY_T(x) (((x) & 0x0f) << 16)
49#define IXP4XX_EXP_BUS_HOLD_T(x) (((x) & 0x03) << 20)
50#define IXP4XX_EXP_BUS_STROBE_T(x) (((x) & 0x0f) << 22)
51#define IXP4XX_EXP_BUS_SETUP_T(x) (((x) & 0x03) << 26)
52#define IXP4XX_EXP_BUS_ADDR_T(x) (((x) & 0x03) << 28)
53#define IXP4XX_EXP_BUS_SIZE(x) (((x) & 0x0f) << 10)
54#define IXP4XX_EXP_BUS_CYCLES(x) (((x) & 0x03) << 14)
55
56#define IXP4XX_EXP_BUS_CS_EN (1L << 31)
57#define IXP4XX_EXP_BUS_BYTE_RD16 (1L << 6)
58#define IXP4XX_EXP_BUS_HRDY_POL (1L << 5)
59#define IXP4XX_EXP_BUS_MUX_EN (1L << 4)
60#define IXP4XX_EXP_BUS_SPLT_EN (1L << 3)
61#define IXP4XX_EXP_BUS_WR_EN (1L << 1)
62#define IXP4XX_EXP_BUS_BYTE_EN (1L << 0)
63
64#define IXP4XX_EXP_BUS_CYCLES_INTEL 0x00
65#define IXP4XX_EXP_BUS_CYCLES_MOTOROLA 0x01
66#define IXP4XX_EXP_BUS_CYCLES_HPI 0x02
67
41#define IXP4XX_FLASH_WRITABLE (0x2) 68#define IXP4XX_FLASH_WRITABLE (0x2)
42#define IXP4XX_FLASH_DEFAULT (0xbcd23c40) 69#define IXP4XX_FLASH_DEFAULT (0xbcd23c40)
43#define IXP4XX_FLASH_WRITE (0xbcd23c42) 70#define IXP4XX_FLASH_WRITE (0xbcd23c42)
diff --git a/include/asm-arm/arch-ixp4xx/uncompress.h b/include/asm-arm/arch-ixp4xx/uncompress.h
index 960c35810a22..09ae6c91be60 100644
--- a/include/asm-arm/arch-ixp4xx/uncompress.h
+++ b/include/asm-arm/arch-ixp4xx/uncompress.h
@@ -21,26 +21,18 @@
21 21
22static volatile u32* uart_base; 22static volatile u32* uart_base;
23 23
24static __inline__ void putc(char c) 24static inline void putc(int c)
25{ 25{
26 /* Check THRE and TEMT bits before we transmit the character. 26 /* Check THRE and TEMT bits before we transmit the character.
27 */ 27 */
28 while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE); 28 while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
29 barrier();
30
29 *uart_base = c; 31 *uart_base = c;
30} 32}
31 33
32/* 34static void flush(void)
33 * This does not append a newline
34 */
35static void putstr(const char *s)
36{ 35{
37 while (*s)
38 {
39 putc(*s);
40 if (*s == '\n')
41 putc('\r');
42 s++;
43 }
44} 36}
45 37
46static __inline__ void __arch_decomp_setup(unsigned long arch_id) 38static __inline__ void __arch_decomp_setup(unsigned long arch_id)