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-rw-r--r--include/asm-arm/arch-ixp4xx/platform.h173
1 files changed, 0 insertions, 173 deletions
diff --git a/include/asm-arm/arch-ixp4xx/platform.h b/include/asm-arm/arch-ixp4xx/platform.h
deleted file mode 100644
index b2af5154cef3..000000000000
--- a/include/asm-arm/arch-ixp4xx/platform.h
+++ /dev/null
@@ -1,173 +0,0 @@
1/*
2 * include/asm-arm/arch-ixp4xx/platform.h
3 *
4 * Constants and functions that are useful to IXP4xx platform-specific code
5 * and device drivers.
6 *
7 * Copyright (C) 2004 MontaVista Software, Inc.
8 */
9
10#ifndef __ASM_ARCH_HARDWARE_H__
11#error "Do not include this directly, instead #include <asm/arch/hardware.h>"
12#endif
13
14#ifndef __ASSEMBLY__
15
16#include <asm/types.h>
17
18#ifndef __ARMEB__
19#define REG_OFFSET 0
20#else
21#define REG_OFFSET 3
22#endif
23
24/*
25 * Expansion bus memory regions
26 */
27#define IXP4XX_EXP_BUS_BASE_PHYS (0x50000000)
28
29/*
30 * The expansion bus on the IXP4xx can be configured for either 16 or
31 * 32MB windows and the CS offset for each region changes based on the
32 * current configuration. This means that we cannot simply hardcode
33 * each offset. ixp4xx_sys_init() looks at the expansion bus configuration
34 * as setup by the bootloader to determine our window size.
35 */
36extern unsigned long ixp4xx_exp_bus_size;
37
38#define IXP4XX_EXP_BUS_BASE(region)\
39 (IXP4XX_EXP_BUS_BASE_PHYS + ((region) * ixp4xx_exp_bus_size))
40
41#define IXP4XX_EXP_BUS_END(region)\
42 (IXP4XX_EXP_BUS_BASE(region) + ixp4xx_exp_bus_size - 1)
43
44/* Those macros can be used to adjust timing and configure
45 * other features for each region.
46 */
47
48#define IXP4XX_EXP_BUS_RECOVERY_T(x) (((x) & 0x0f) << 16)
49#define IXP4XX_EXP_BUS_HOLD_T(x) (((x) & 0x03) << 20)
50#define IXP4XX_EXP_BUS_STROBE_T(x) (((x) & 0x0f) << 22)
51#define IXP4XX_EXP_BUS_SETUP_T(x) (((x) & 0x03) << 26)
52#define IXP4XX_EXP_BUS_ADDR_T(x) (((x) & 0x03) << 28)
53#define IXP4XX_EXP_BUS_SIZE(x) (((x) & 0x0f) << 10)
54#define IXP4XX_EXP_BUS_CYCLES(x) (((x) & 0x03) << 14)
55
56#define IXP4XX_EXP_BUS_CS_EN (1L << 31)
57#define IXP4XX_EXP_BUS_BYTE_RD16 (1L << 6)
58#define IXP4XX_EXP_BUS_HRDY_POL (1L << 5)
59#define IXP4XX_EXP_BUS_MUX_EN (1L << 4)
60#define IXP4XX_EXP_BUS_SPLT_EN (1L << 3)
61#define IXP4XX_EXP_BUS_WR_EN (1L << 1)
62#define IXP4XX_EXP_BUS_BYTE_EN (1L << 0)
63
64#define IXP4XX_EXP_BUS_CYCLES_INTEL 0x00
65#define IXP4XX_EXP_BUS_CYCLES_MOTOROLA 0x01
66#define IXP4XX_EXP_BUS_CYCLES_HPI 0x02
67
68#define IXP4XX_FLASH_WRITABLE (0x2)
69#define IXP4XX_FLASH_DEFAULT (0xbcd23c40)
70#define IXP4XX_FLASH_WRITE (0xbcd23c42)
71
72/*
73 * Clock Speed Definitions.
74 */
75#define IXP4XX_PERIPHERAL_BUS_CLOCK (66) /* 66Mhzi APB BUS */
76#define IXP4XX_UART_XTAL 14745600
77
78/*
79 * This structure provide a means for the board setup code
80 * to give information to th pata_ixp4xx driver. It is
81 * passed as platform_data.
82 */
83struct ixp4xx_pata_data {
84 volatile u32 *cs0_cfg;
85 volatile u32 *cs1_cfg;
86 unsigned long cs0_bits;
87 unsigned long cs1_bits;
88 void __iomem *cs0;
89 void __iomem *cs1;
90};
91
92struct sys_timer;
93
94#define IXP4XX_ETH_NPEA 0x00
95#define IXP4XX_ETH_NPEB 0x10
96#define IXP4XX_ETH_NPEC 0x20
97
98/* Information about built-in Ethernet MAC interfaces */
99struct eth_plat_info {
100 u8 phy; /* MII PHY ID, 0 - 31 */
101 u8 rxq; /* configurable, currently 0 - 31 only */
102 u8 txreadyq;
103 u8 hwaddr[6];
104};
105
106/* Information about built-in HSS (synchronous serial) interfaces */
107struct hss_plat_info {
108 int (*set_clock)(int port, unsigned int clock_type);
109 int (*open)(int port, void *pdev,
110 void (*set_carrier_cb)(void *pdev, int carrier));
111 void (*close)(int port, void *pdev);
112 u8 txreadyq;
113};
114
115/*
116 * Frequency of clock used for primary clocksource
117 */
118extern unsigned long ixp4xx_timer_freq;
119
120/*
121 * Functions used by platform-level setup code
122 */
123extern void ixp4xx_map_io(void);
124extern void ixp4xx_init_irq(void);
125extern void ixp4xx_sys_init(void);
126extern void ixp4xx_timer_init(void);
127extern struct sys_timer ixp4xx_timer;
128extern void ixp4xx_pci_preinit(void);
129struct pci_sys_data;
130extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
131extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
132
133/*
134 * GPIO-functions
135 */
136/*
137 * The following converted to the real HW bits the gpio_line_config
138 */
139/* GPIO pin types */
140#define IXP4XX_GPIO_OUT 0x1
141#define IXP4XX_GPIO_IN 0x2
142
143/* GPIO signal types */
144#define IXP4XX_GPIO_LOW 0
145#define IXP4XX_GPIO_HIGH 1
146
147/* GPIO Clocks */
148#define IXP4XX_GPIO_CLK_0 14
149#define IXP4XX_GPIO_CLK_1 15
150
151static inline void gpio_line_config(u8 line, u32 direction)
152{
153 if (direction == IXP4XX_GPIO_IN)
154 *IXP4XX_GPIO_GPOER |= (1 << line);
155 else
156 *IXP4XX_GPIO_GPOER &= ~(1 << line);
157}
158
159static inline void gpio_line_get(u8 line, int *value)
160{
161 *value = (*IXP4XX_GPIO_GPINR >> line) & 0x1;
162}
163
164static inline void gpio_line_set(u8 line, int value)
165{
166 if (value == IXP4XX_GPIO_HIGH)
167 *IXP4XX_GPIO_GPOUTR |= (1 << line);
168 else if (value == IXP4XX_GPIO_LOW)
169 *IXP4XX_GPIO_GPOUTR &= ~(1 << line);
170}
171
172#endif // __ASSEMBLY__
173
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