aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/asm-arm/arch-ixp4xx/ixp4xx-regs.h')
-rw-r--r--include/asm-arm/arch-ixp4xx/ixp4xx-regs.h76
1 files changed, 50 insertions, 26 deletions
diff --git a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
index 004696a95bdb..9444958bec1e 100644
--- a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
+++ b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
@@ -36,38 +36,39 @@
36 * 36 *
37 * 0x6000000 0x00004000 ioremap'd QMgr 37 * 0x6000000 0x00004000 ioremap'd QMgr
38 * 38 *
39 * 0xC0000000 0x00001000 0xffbfe000 PCI CFG 39 * 0xC0000000 0x00001000 0xffbff000 PCI CFG
40 * 40 *
41 * 0xC4000000 0x00001000 0xffbfd000 EXP CFG 41 * 0xC4000000 0x00001000 0xffbfe000 EXP CFG
42 * 42 *
43 * 0xC8000000 0x0000C000 0xffbf2000 On-Chip Peripherals 43 * 0xC8000000 0x00013000 0xffbeb000 On-Chip Peripherals
44 */ 44 */
45 45
46/* 46/*
47 * Queue Manager 47 * Queue Manager
48 */ 48 */
49#define IXP4XX_QMGR_BASE_PHYS (0x60000000) 49#define IXP4XX_QMGR_BASE_PHYS (0x60000000)
50#define IXP4XX_QMGR_REGION_SIZE (0x00004000)
50 51
51/* 52/*
52 * Expansion BUS Configuration registers 53 * Expansion BUS Configuration registers
53 */ 54 */
54#define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000) 55#define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000)
55#define IXP4XX_EXP_CFG_BASE_VIRT (0xFFBFD000) 56#define IXP4XX_EXP_CFG_BASE_VIRT (0xFFBFE000)
56#define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000) 57#define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000)
57 58
58/* 59/*
59 * PCI Config registers 60 * PCI Config registers
60 */ 61 */
61#define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000) 62#define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000)
62#define IXP4XX_PCI_CFG_BASE_VIRT (0xFFBFE000) 63#define IXP4XX_PCI_CFG_BASE_VIRT (0xFFBFF000)
63#define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000) 64#define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000)
64 65
65/* 66/*
66 * Peripheral space 67 * Peripheral space
67 */ 68 */
68#define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000) 69#define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000)
69#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBF2000) 70#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBEB000)
70#define IXP4XX_PERIPHERAL_REGION_SIZE (0x0000C000) 71#define IXP4XX_PERIPHERAL_REGION_SIZE (0x00013000)
71 72
72/* 73/*
73 * Debug UART 74 * Debug UART
@@ -115,25 +116,48 @@
115/* 116/*
116 * Peripheral Space Register Region Base Addresses 117 * Peripheral Space Register Region Base Addresses
117 */ 118 */
118#define IXP4XX_UART1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x0000) 119#define IXP4XX_UART1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x0000)
119#define IXP4XX_UART2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x1000) 120#define IXP4XX_UART2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x1000)
120#define IXP4XX_PMU_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x2000) 121#define IXP4XX_PMU_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x2000)
121#define IXP4XX_INTC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x3000) 122#define IXP4XX_INTC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x3000)
122#define IXP4XX_GPIO_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x4000) 123#define IXP4XX_GPIO_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x4000)
123#define IXP4XX_TIMER_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x5000) 124#define IXP4XX_TIMER_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x5000)
124#define IXP4XX_EthA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x9000) 125#define IXP4XX_NPEA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x6000)
125#define IXP4XX_EthB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xA000) 126#define IXP4XX_NPEB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x7000)
126#define IXP4XX_USB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xB000) 127#define IXP4XX_NPEC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x8000)
127 128#define IXP4XX_EthB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x9000)
128#define IXP4XX_UART1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x0000) 129#define IXP4XX_EthC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xA000)
129#define IXP4XX_UART2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x1000) 130#define IXP4XX_USB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xB000)
130#define IXP4XX_PMU_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x2000) 131/* ixp46X only */
131#define IXP4XX_INTC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x3000) 132#define IXP4XX_EthA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xC000)
132#define IXP4XX_GPIO_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x4000) 133#define IXP4XX_EthB1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xD000)
133#define IXP4XX_TIMER_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x5000) 134#define IXP4XX_EthB2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xE000)
134#define IXP4XX_EthA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x9000) 135#define IXP4XX_EthB3_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xF000)
135#define IXP4XX_EthB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xA000) 136#define IXP4XX_TIMESYNC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x10000)
136#define IXP4XX_USB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xB000) 137#define IXP4XX_I2C_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x11000)
138#define IXP4XX_SSP_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x12000)
139
140
141#define IXP4XX_UART1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x0000)
142#define IXP4XX_UART2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x1000)
143#define IXP4XX_PMU_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x2000)
144#define IXP4XX_INTC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x3000)
145#define IXP4XX_GPIO_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x4000)
146#define IXP4XX_TIMER_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x5000)
147#define IXP4XX_NPEA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_PHYS + 0x6000)
148#define IXP4XX_NPEB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_PHYS + 0x7000)
149#define IXP4XX_NPEC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_PHYS + 0x8000)
150#define IXP4XX_EthB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x9000)
151#define IXP4XX_EthC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xA000)
152#define IXP4XX_USB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xB000)
153/* ixp46X only */
154#define IXP4XX_EthA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xC000)
155#define IXP4XX_EthB1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xD000)
156#define IXP4XX_EthB2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xE000)
157#define IXP4XX_EthB3_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xF000)
158#define IXP4XX_TIMESYNC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x10000)
159#define IXP4XX_I2C_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x11000)
160#define IXP4XX_SSP_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x12000)
137 161
138/* 162/*
139 * Constants to make it easy to access Interrupt Controller registers 163 * Constants to make it easy to access Interrupt Controller registers