diff options
Diffstat (limited to 'include/asm-arm/arch-ixp4xx/io.h')
-rw-r--r-- | include/asm-arm/arch-ixp4xx/io.h | 83 |
1 files changed, 43 insertions, 40 deletions
diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h index e350dcb544e8..942b622455bc 100644 --- a/include/asm-arm/arch-ixp4xx/io.h +++ b/include/asm-arm/arch-ixp4xx/io.h | |||
@@ -59,11 +59,10 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); | |||
59 | * fallback to the default. | 59 | * fallback to the default. |
60 | */ | 60 | */ |
61 | static inline void __iomem * | 61 | static inline void __iomem * |
62 | __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned long align) | 62 | __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags) |
63 | { | 63 | { |
64 | extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long); | ||
65 | if((addr < 0x48000000) || (addr > 0x4fffffff)) | 64 | if((addr < 0x48000000) || (addr > 0x4fffffff)) |
66 | return __ioremap(addr, size, flags, align); | 65 | return __ioremap(addr, size, flags); |
67 | 66 | ||
68 | return (void *)addr; | 67 | return (void *)addr; |
69 | } | 68 | } |
@@ -71,18 +70,16 @@ __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned | |||
71 | static inline void | 70 | static inline void |
72 | __ixp4xx_iounmap(void __iomem *addr) | 71 | __ixp4xx_iounmap(void __iomem *addr) |
73 | { | 72 | { |
74 | extern void __iounmap(void __iomem *addr); | ||
75 | |||
76 | if ((u32)addr >= VMALLOC_START) | 73 | if ((u32)addr >= VMALLOC_START) |
77 | __iounmap(addr); | 74 | __iounmap(addr); |
78 | } | 75 | } |
79 | 76 | ||
80 | #define __arch_ioremap(a, s, f, x) __ixp4xx_ioremap(a, s, f, x) | 77 | #define __arch_ioremap(a, s, f) __ixp4xx_ioremap(a, s, f) |
81 | #define __arch_iounmap(a) __ixp4xx_iounmap(a) | 78 | #define __arch_iounmap(a) __ixp4xx_iounmap(a) |
82 | 79 | ||
83 | #define writeb(p, v) __ixp4xx_writeb(p, v) | 80 | #define writeb(v, p) __ixp4xx_writeb(v, p) |
84 | #define writew(p, v) __ixp4xx_writew(p, v) | 81 | #define writew(v, p) __ixp4xx_writew(v, p) |
85 | #define writel(p, v) __ixp4xx_writel(p, v) | 82 | #define writel(v, p) __ixp4xx_writel(v, p) |
86 | 83 | ||
87 | #define writesb(p, v, l) __ixp4xx_writesb(p, v, l) | 84 | #define writesb(p, v, l) __ixp4xx_writesb(p, v, l) |
88 | #define writesw(p, v, l) __ixp4xx_writesw(p, v, l) | 85 | #define writesw(p, v, l) __ixp4xx_writesw(p, v, l) |
@@ -97,8 +94,9 @@ __ixp4xx_iounmap(void __iomem *addr) | |||
97 | #define readsl(p, v, l) __ixp4xx_readsl(p, v, l) | 94 | #define readsl(p, v, l) __ixp4xx_readsl(p, v, l) |
98 | 95 | ||
99 | static inline void | 96 | static inline void |
100 | __ixp4xx_writeb(u8 value, u32 addr) | 97 | __ixp4xx_writeb(u8 value, volatile void __iomem *p) |
101 | { | 98 | { |
99 | u32 addr = (u32)p; | ||
102 | u32 n, byte_enables, data; | 100 | u32 n, byte_enables, data; |
103 | 101 | ||
104 | if (addr >= VMALLOC_START) { | 102 | if (addr >= VMALLOC_START) { |
@@ -113,15 +111,16 @@ __ixp4xx_writeb(u8 value, u32 addr) | |||
113 | } | 111 | } |
114 | 112 | ||
115 | static inline void | 113 | static inline void |
116 | __ixp4xx_writesb(u32 bus_addr, u8 *vaddr, int count) | 114 | __ixp4xx_writesb(volatile void __iomem *bus_addr, const u8 *vaddr, int count) |
117 | { | 115 | { |
118 | while (count--) | 116 | while (count--) |
119 | writeb(*vaddr++, bus_addr); | 117 | writeb(*vaddr++, bus_addr); |
120 | } | 118 | } |
121 | 119 | ||
122 | static inline void | 120 | static inline void |
123 | __ixp4xx_writew(u16 value, u32 addr) | 121 | __ixp4xx_writew(u16 value, volatile void __iomem *p) |
124 | { | 122 | { |
123 | u32 addr = (u32)p; | ||
125 | u32 n, byte_enables, data; | 124 | u32 n, byte_enables, data; |
126 | 125 | ||
127 | if (addr >= VMALLOC_START) { | 126 | if (addr >= VMALLOC_START) { |
@@ -136,15 +135,16 @@ __ixp4xx_writew(u16 value, u32 addr) | |||
136 | } | 135 | } |
137 | 136 | ||
138 | static inline void | 137 | static inline void |
139 | __ixp4xx_writesw(u32 bus_addr, u16 *vaddr, int count) | 138 | __ixp4xx_writesw(volatile void __iomem *bus_addr, const u16 *vaddr, int count) |
140 | { | 139 | { |
141 | while (count--) | 140 | while (count--) |
142 | writew(*vaddr++, bus_addr); | 141 | writew(*vaddr++, bus_addr); |
143 | } | 142 | } |
144 | 143 | ||
145 | static inline void | 144 | static inline void |
146 | __ixp4xx_writel(u32 value, u32 addr) | 145 | __ixp4xx_writel(u32 value, volatile void __iomem *p) |
147 | { | 146 | { |
147 | u32 addr = (u32)p; | ||
148 | if (addr >= VMALLOC_START) { | 148 | if (addr >= VMALLOC_START) { |
149 | __raw_writel(value, addr); | 149 | __raw_writel(value, addr); |
150 | return; | 150 | return; |
@@ -154,15 +154,16 @@ __ixp4xx_writel(u32 value, u32 addr) | |||
154 | } | 154 | } |
155 | 155 | ||
156 | static inline void | 156 | static inline void |
157 | __ixp4xx_writesl(u32 bus_addr, u32 *vaddr, int count) | 157 | __ixp4xx_writesl(volatile void __iomem *bus_addr, const u32 *vaddr, int count) |
158 | { | 158 | { |
159 | while (count--) | 159 | while (count--) |
160 | writel(*vaddr++, bus_addr); | 160 | writel(*vaddr++, bus_addr); |
161 | } | 161 | } |
162 | 162 | ||
163 | static inline unsigned char | 163 | static inline unsigned char |
164 | __ixp4xx_readb(u32 addr) | 164 | __ixp4xx_readb(const volatile void __iomem *p) |
165 | { | 165 | { |
166 | u32 addr = (u32)p; | ||
166 | u32 n, byte_enables, data; | 167 | u32 n, byte_enables, data; |
167 | 168 | ||
168 | if (addr >= VMALLOC_START) | 169 | if (addr >= VMALLOC_START) |
@@ -177,15 +178,16 @@ __ixp4xx_readb(u32 addr) | |||
177 | } | 178 | } |
178 | 179 | ||
179 | static inline void | 180 | static inline void |
180 | __ixp4xx_readsb(u32 bus_addr, u8 *vaddr, u32 count) | 181 | __ixp4xx_readsb(const volatile void __iomem *bus_addr, u8 *vaddr, u32 count) |
181 | { | 182 | { |
182 | while (count--) | 183 | while (count--) |
183 | *vaddr++ = readb(bus_addr); | 184 | *vaddr++ = readb(bus_addr); |
184 | } | 185 | } |
185 | 186 | ||
186 | static inline unsigned short | 187 | static inline unsigned short |
187 | __ixp4xx_readw(u32 addr) | 188 | __ixp4xx_readw(const volatile void __iomem *p) |
188 | { | 189 | { |
190 | u32 addr = (u32)p; | ||
189 | u32 n, byte_enables, data; | 191 | u32 n, byte_enables, data; |
190 | 192 | ||
191 | if (addr >= VMALLOC_START) | 193 | if (addr >= VMALLOC_START) |
@@ -200,15 +202,16 @@ __ixp4xx_readw(u32 addr) | |||
200 | } | 202 | } |
201 | 203 | ||
202 | static inline void | 204 | static inline void |
203 | __ixp4xx_readsw(u32 bus_addr, u16 *vaddr, u32 count) | 205 | __ixp4xx_readsw(const volatile void __iomem *bus_addr, u16 *vaddr, u32 count) |
204 | { | 206 | { |
205 | while (count--) | 207 | while (count--) |
206 | *vaddr++ = readw(bus_addr); | 208 | *vaddr++ = readw(bus_addr); |
207 | } | 209 | } |
208 | 210 | ||
209 | static inline unsigned long | 211 | static inline unsigned long |
210 | __ixp4xx_readl(u32 addr) | 212 | __ixp4xx_readl(const volatile void __iomem *p) |
211 | { | 213 | { |
214 | u32 addr = (u32)p; | ||
212 | u32 data; | 215 | u32 data; |
213 | 216 | ||
214 | if (addr >= VMALLOC_START) | 217 | if (addr >= VMALLOC_START) |
@@ -221,7 +224,7 @@ __ixp4xx_readl(u32 addr) | |||
221 | } | 224 | } |
222 | 225 | ||
223 | static inline void | 226 | static inline void |
224 | __ixp4xx_readsl(u32 bus_addr, u32 *vaddr, u32 count) | 227 | __ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count) |
225 | { | 228 | { |
226 | while (count--) | 229 | while (count--) |
227 | *vaddr++ = readl(bus_addr); | 230 | *vaddr++ = readl(bus_addr); |
@@ -239,7 +242,7 @@ __ixp4xx_readsl(u32 bus_addr, u32 *vaddr, u32 count) | |||
239 | eth_copy_and_sum((s),__mem_pci(c),(l),(b)) | 242 | eth_copy_and_sum((s),__mem_pci(c),(l),(b)) |
240 | 243 | ||
241 | static inline int | 244 | static inline int |
242 | check_signature(unsigned long bus_addr, const unsigned char *signature, | 245 | check_signature(const unsigned char __iomem *bus_addr, const unsigned char *signature, |
243 | int length) | 246 | int length) |
244 | { | 247 | { |
245 | int retval = 0; | 248 | int retval = 0; |
@@ -389,7 +392,7 @@ __ixp4xx_insl(u32 io_addr, u32 *vaddr, u32 count) | |||
389 | #define __is_io_address(p) (((unsigned long)p >= PIO_OFFSET) && \ | 392 | #define __is_io_address(p) (((unsigned long)p >= PIO_OFFSET) && \ |
390 | ((unsigned long)p <= (PIO_MASK + PIO_OFFSET))) | 393 | ((unsigned long)p <= (PIO_MASK + PIO_OFFSET))) |
391 | static inline unsigned int | 394 | static inline unsigned int |
392 | __ixp4xx_ioread8(void __iomem *addr) | 395 | __ixp4xx_ioread8(const void __iomem *addr) |
393 | { | 396 | { |
394 | unsigned long port = (unsigned long __force)addr; | 397 | unsigned long port = (unsigned long __force)addr; |
395 | if (__is_io_address(port)) | 398 | if (__is_io_address(port)) |
@@ -398,12 +401,12 @@ __ixp4xx_ioread8(void __iomem *addr) | |||
398 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 401 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
399 | return (unsigned int)__raw_readb(port); | 402 | return (unsigned int)__raw_readb(port); |
400 | #else | 403 | #else |
401 | return (unsigned int)__ixp4xx_readb(port); | 404 | return (unsigned int)__ixp4xx_readb(addr); |
402 | #endif | 405 | #endif |
403 | } | 406 | } |
404 | 407 | ||
405 | static inline void | 408 | static inline void |
406 | __ixp4xx_ioread8_rep(void __iomem *addr, void *vaddr, u32 count) | 409 | __ixp4xx_ioread8_rep(const void __iomem *addr, void *vaddr, u32 count) |
407 | { | 410 | { |
408 | unsigned long port = (unsigned long __force)addr; | 411 | unsigned long port = (unsigned long __force)addr; |
409 | if (__is_io_address(port)) | 412 | if (__is_io_address(port)) |
@@ -412,12 +415,12 @@ __ixp4xx_ioread8_rep(void __iomem *addr, void *vaddr, u32 count) | |||
412 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 415 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
413 | __raw_readsb(addr, vaddr, count); | 416 | __raw_readsb(addr, vaddr, count); |
414 | #else | 417 | #else |
415 | __ixp4xx_readsb(port, vaddr, count); | 418 | __ixp4xx_readsb(addr, vaddr, count); |
416 | #endif | 419 | #endif |
417 | } | 420 | } |
418 | 421 | ||
419 | static inline unsigned int | 422 | static inline unsigned int |
420 | __ixp4xx_ioread16(void __iomem *addr) | 423 | __ixp4xx_ioread16(const void __iomem *addr) |
421 | { | 424 | { |
422 | unsigned long port = (unsigned long __force)addr; | 425 | unsigned long port = (unsigned long __force)addr; |
423 | if (__is_io_address(port)) | 426 | if (__is_io_address(port)) |
@@ -426,12 +429,12 @@ __ixp4xx_ioread16(void __iomem *addr) | |||
426 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 429 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
427 | return le16_to_cpu(__raw_readw((u32)port)); | 430 | return le16_to_cpu(__raw_readw((u32)port)); |
428 | #else | 431 | #else |
429 | return (unsigned int)__ixp4xx_readw((u32)port); | 432 | return (unsigned int)__ixp4xx_readw(addr); |
430 | #endif | 433 | #endif |
431 | } | 434 | } |
432 | 435 | ||
433 | static inline void | 436 | static inline void |
434 | __ixp4xx_ioread16_rep(void __iomem *addr, void *vaddr, u32 count) | 437 | __ixp4xx_ioread16_rep(const void __iomem *addr, void *vaddr, u32 count) |
435 | { | 438 | { |
436 | unsigned long port = (unsigned long __force)addr; | 439 | unsigned long port = (unsigned long __force)addr; |
437 | if (__is_io_address(port)) | 440 | if (__is_io_address(port)) |
@@ -440,12 +443,12 @@ __ixp4xx_ioread16_rep(void __iomem *addr, void *vaddr, u32 count) | |||
440 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 443 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
441 | __raw_readsw(addr, vaddr, count); | 444 | __raw_readsw(addr, vaddr, count); |
442 | #else | 445 | #else |
443 | __ixp4xx_readsw(port, vaddr, count); | 446 | __ixp4xx_readsw(addr, vaddr, count); |
444 | #endif | 447 | #endif |
445 | } | 448 | } |
446 | 449 | ||
447 | static inline unsigned int | 450 | static inline unsigned int |
448 | __ixp4xx_ioread32(void __iomem *addr) | 451 | __ixp4xx_ioread32(const void __iomem *addr) |
449 | { | 452 | { |
450 | unsigned long port = (unsigned long __force)addr; | 453 | unsigned long port = (unsigned long __force)addr; |
451 | if (__is_io_address(port)) | 454 | if (__is_io_address(port)) |
@@ -454,13 +457,13 @@ __ixp4xx_ioread32(void __iomem *addr) | |||
454 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 457 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
455 | return le32_to_cpu(__raw_readl((u32)port)); | 458 | return le32_to_cpu(__raw_readl((u32)port)); |
456 | #else | 459 | #else |
457 | return (unsigned int)__ixp4xx_readl((u32)port); | 460 | return (unsigned int)__ixp4xx_readl(addr); |
458 | #endif | 461 | #endif |
459 | } | 462 | } |
460 | } | 463 | } |
461 | 464 | ||
462 | static inline void | 465 | static inline void |
463 | __ixp4xx_ioread32_rep(void __iomem *addr, void *vaddr, u32 count) | 466 | __ixp4xx_ioread32_rep(const void __iomem *addr, void *vaddr, u32 count) |
464 | { | 467 | { |
465 | unsigned long port = (unsigned long __force)addr; | 468 | unsigned long port = (unsigned long __force)addr; |
466 | if (__is_io_address(port)) | 469 | if (__is_io_address(port)) |
@@ -469,7 +472,7 @@ __ixp4xx_ioread32_rep(void __iomem *addr, void *vaddr, u32 count) | |||
469 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 472 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
470 | __raw_readsl(addr, vaddr, count); | 473 | __raw_readsl(addr, vaddr, count); |
471 | #else | 474 | #else |
472 | __ixp4xx_readsl(port, vaddr, count); | 475 | __ixp4xx_readsl(addr, vaddr, count); |
473 | #endif | 476 | #endif |
474 | } | 477 | } |
475 | 478 | ||
@@ -483,7 +486,7 @@ __ixp4xx_iowrite8(u8 value, void __iomem *addr) | |||
483 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 486 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
484 | __raw_writeb(value, port); | 487 | __raw_writeb(value, port); |
485 | #else | 488 | #else |
486 | __ixp4xx_writeb(value, port); | 489 | __ixp4xx_writeb(value, addr); |
487 | #endif | 490 | #endif |
488 | } | 491 | } |
489 | 492 | ||
@@ -497,7 +500,7 @@ __ixp4xx_iowrite8_rep(void __iomem *addr, const void *vaddr, u32 count) | |||
497 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 500 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
498 | __raw_writesb(addr, vaddr, count); | 501 | __raw_writesb(addr, vaddr, count); |
499 | #else | 502 | #else |
500 | __ixp4xx_writesb(port, vaddr, count); | 503 | __ixp4xx_writesb(addr, vaddr, count); |
501 | #endif | 504 | #endif |
502 | } | 505 | } |
503 | 506 | ||
@@ -511,7 +514,7 @@ __ixp4xx_iowrite16(u16 value, void __iomem *addr) | |||
511 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 514 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
512 | __raw_writew(cpu_to_le16(value), addr); | 515 | __raw_writew(cpu_to_le16(value), addr); |
513 | #else | 516 | #else |
514 | __ixp4xx_writew(value, port); | 517 | __ixp4xx_writew(value, addr); |
515 | #endif | 518 | #endif |
516 | } | 519 | } |
517 | 520 | ||
@@ -525,7 +528,7 @@ __ixp4xx_iowrite16_rep(void __iomem *addr, const void *vaddr, u32 count) | |||
525 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 528 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
526 | __raw_writesw(addr, vaddr, count); | 529 | __raw_writesw(addr, vaddr, count); |
527 | #else | 530 | #else |
528 | __ixp4xx_writesw(port, vaddr, count); | 531 | __ixp4xx_writesw(addr, vaddr, count); |
529 | #endif | 532 | #endif |
530 | } | 533 | } |
531 | 534 | ||
@@ -539,7 +542,7 @@ __ixp4xx_iowrite32(u32 value, void __iomem *addr) | |||
539 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 542 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
540 | __raw_writel(cpu_to_le32(value), port); | 543 | __raw_writel(cpu_to_le32(value), port); |
541 | #else | 544 | #else |
542 | __ixp4xx_writel(value, port); | 545 | __ixp4xx_writel(value, addr); |
543 | #endif | 546 | #endif |
544 | } | 547 | } |
545 | 548 | ||
@@ -553,7 +556,7 @@ __ixp4xx_iowrite32_rep(void __iomem *addr, const void *vaddr, u32 count) | |||
553 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | 556 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI |
554 | __raw_writesl(addr, vaddr, count); | 557 | __raw_writesl(addr, vaddr, count); |
555 | #else | 558 | #else |
556 | __ixp4xx_writesl(port, vaddr, count); | 559 | __ixp4xx_writesl(addr, vaddr, count); |
557 | #endif | 560 | #endif |
558 | } | 561 | } |
559 | 562 | ||