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Diffstat (limited to 'include/asm-arm/arch-ixp4xx/io.h')
-rw-r--r--include/asm-arm/arch-ixp4xx/io.h102
1 files changed, 60 insertions, 42 deletions
diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h
index 7495026e2c18..e350dcb544e8 100644
--- a/include/asm-arm/arch-ixp4xx/io.h
+++ b/include/asm-arm/arch-ixp4xx/io.h
@@ -383,39 +383,45 @@ __ixp4xx_insl(u32 io_addr, u32 *vaddr, u32 count)
383 *vaddr++ = inl(io_addr); 383 *vaddr++ = inl(io_addr);
384} 384}
385 385
386#define __is_io_address(p) (((unsigned long)p >= 0x0) && \ 386#define PIO_OFFSET 0x10000UL
387 ((unsigned long)p <= 0x0000ffff)) 387#define PIO_MASK 0x0ffffUL
388
389#define __is_io_address(p) (((unsigned long)p >= PIO_OFFSET) && \
390 ((unsigned long)p <= (PIO_MASK + PIO_OFFSET)))
388static inline unsigned int 391static inline unsigned int
389__ixp4xx_ioread8(void __iomem *port) 392__ixp4xx_ioread8(void __iomem *addr)
390{ 393{
394 unsigned long port = (unsigned long __force)addr;
391 if (__is_io_address(port)) 395 if (__is_io_address(port))
392 return (unsigned int)__ixp4xx_inb((unsigned int)port); 396 return (unsigned int)__ixp4xx_inb(port & PIO_MASK);
393 else 397 else
394#ifndef CONFIG_IXP4XX_INDIRECT_PCI 398#ifndef CONFIG_IXP4XX_INDIRECT_PCI
395 return (unsigned int)__raw_readb((u32)port); 399 return (unsigned int)__raw_readb(port);
396#else 400#else
397 return (unsigned int)__ixp4xx_readb((u32)port); 401 return (unsigned int)__ixp4xx_readb(port);
398#endif 402#endif
399} 403}
400 404
401static inline void 405static inline void
402__ixp4xx_ioread8_rep(u32 port, u8 *vaddr, u32 count) 406__ixp4xx_ioread8_rep(void __iomem *addr, void *vaddr, u32 count)
403{ 407{
408 unsigned long port = (unsigned long __force)addr;
404 if (__is_io_address(port)) 409 if (__is_io_address(port))
405 __ixp4xx_insb(port, vaddr, count); 410 __ixp4xx_insb(port & PIO_MASK, vaddr, count);
406 else 411 else
407#ifndef CONFIG_IXP4XX_INDIRECT_PCI 412#ifndef CONFIG_IXP4XX_INDIRECT_PCI
408 __raw_readsb((void __iomem *)port, vaddr, count); 413 __raw_readsb(addr, vaddr, count);
409#else 414#else
410 __ixp4xx_readsb(port, vaddr, count); 415 __ixp4xx_readsb(port, vaddr, count);
411#endif 416#endif
412} 417}
413 418
414static inline unsigned int 419static inline unsigned int
415__ixp4xx_ioread16(void __iomem *port) 420__ixp4xx_ioread16(void __iomem *addr)
416{ 421{
422 unsigned long port = (unsigned long __force)addr;
417 if (__is_io_address(port)) 423 if (__is_io_address(port))
418 return (unsigned int)__ixp4xx_inw((unsigned int)port); 424 return (unsigned int)__ixp4xx_inw(port & PIO_MASK);
419 else 425 else
420#ifndef CONFIG_IXP4XX_INDIRECT_PCI 426#ifndef CONFIG_IXP4XX_INDIRECT_PCI
421 return le16_to_cpu(__raw_readw((u32)port)); 427 return le16_to_cpu(__raw_readw((u32)port));
@@ -425,23 +431,25 @@ __ixp4xx_ioread16(void __iomem *port)
425} 431}
426 432
427static inline void 433static inline void
428__ixp4xx_ioread16_rep(u32 port, u16 *vaddr, u32 count) 434__ixp4xx_ioread16_rep(void __iomem *addr, void *vaddr, u32 count)
429{ 435{
436 unsigned long port = (unsigned long __force)addr;
430 if (__is_io_address(port)) 437 if (__is_io_address(port))
431 __ixp4xx_insw(port, vaddr, count); 438 __ixp4xx_insw(port & PIO_MASK, vaddr, count);
432 else 439 else
433#ifndef CONFIG_IXP4XX_INDIRECT_PCI 440#ifndef CONFIG_IXP4XX_INDIRECT_PCI
434 __raw_readsw((void __iomem *)port, vaddr, count); 441 __raw_readsw(addr, vaddr, count);
435#else 442#else
436 __ixp4xx_readsw(port, vaddr, count); 443 __ixp4xx_readsw(port, vaddr, count);
437#endif 444#endif
438} 445}
439 446
440static inline unsigned int 447static inline unsigned int
441__ixp4xx_ioread32(void __iomem *port) 448__ixp4xx_ioread32(void __iomem *addr)
442{ 449{
450 unsigned long port = (unsigned long __force)addr;
443 if (__is_io_address(port)) 451 if (__is_io_address(port))
444 return (unsigned int)__ixp4xx_inl((unsigned int)port); 452 return (unsigned int)__ixp4xx_inl(port & PIO_MASK);
445 else { 453 else {
446#ifndef CONFIG_IXP4XX_INDIRECT_PCI 454#ifndef CONFIG_IXP4XX_INDIRECT_PCI
447 return le32_to_cpu(__raw_readl((u32)port)); 455 return le32_to_cpu(__raw_readl((u32)port));
@@ -452,90 +460,100 @@ __ixp4xx_ioread32(void __iomem *port)
452} 460}
453 461
454static inline void 462static inline void
455__ixp4xx_ioread32_rep(u32 port, u32 *vaddr, u32 count) 463__ixp4xx_ioread32_rep(void __iomem *addr, void *vaddr, u32 count)
456{ 464{
465 unsigned long port = (unsigned long __force)addr;
457 if (__is_io_address(port)) 466 if (__is_io_address(port))
458 __ixp4xx_insl(port, vaddr, count); 467 __ixp4xx_insl(port & PIO_MASK, vaddr, count);
459 else 468 else
460#ifndef CONFIG_IXP4XX_INDIRECT_PCI 469#ifndef CONFIG_IXP4XX_INDIRECT_PCI
461 __raw_readsl((void __iomem *)port, vaddr, count); 470 __raw_readsl(addr, vaddr, count);
462#else 471#else
463 __ixp4xx_readsl(port, vaddr, count); 472 __ixp4xx_readsl(port, vaddr, count);
464#endif 473#endif
465} 474}
466 475
467static inline void 476static inline void
468__ixp4xx_iowrite8(u8 value, void __iomem *port) 477__ixp4xx_iowrite8(u8 value, void __iomem *addr)
469{ 478{
479 unsigned long port = (unsigned long __force)addr;
470 if (__is_io_address(port)) 480 if (__is_io_address(port))
471 __ixp4xx_outb(value, (unsigned int)port); 481 __ixp4xx_outb(value, port & PIO_MASK);
472 else 482 else
473#ifndef CONFIG_IXP4XX_INDIRECT_PCI 483#ifndef CONFIG_IXP4XX_INDIRECT_PCI
474 __raw_writeb(value, (u32)port); 484 __raw_writeb(value, port);
475#else 485#else
476 __ixp4xx_writeb(value, (u32)port); 486 __ixp4xx_writeb(value, port);
477#endif 487#endif
478} 488}
479 489
480static inline void 490static inline void
481__ixp4xx_iowrite8_rep(u32 port, u8 *vaddr, u32 count) 491__ixp4xx_iowrite8_rep(void __iomem *addr, const void *vaddr, u32 count)
482{ 492{
493 unsigned long port = (unsigned long __force)addr;
483 if (__is_io_address(port)) 494 if (__is_io_address(port))
484 __ixp4xx_outsb(port, vaddr, count); 495 __ixp4xx_outsb(port & PIO_MASK, vaddr, count);
496 else
485#ifndef CONFIG_IXP4XX_INDIRECT_PCI 497#ifndef CONFIG_IXP4XX_INDIRECT_PCI
486 __raw_writesb((void __iomem *)port, vaddr, count); 498 __raw_writesb(addr, vaddr, count);
487#else 499#else
488 __ixp4xx_writesb(port, vaddr, count); 500 __ixp4xx_writesb(port, vaddr, count);
489#endif 501#endif
490} 502}
491 503
492static inline void 504static inline void
493__ixp4xx_iowrite16(u16 value, void __iomem *port) 505__ixp4xx_iowrite16(u16 value, void __iomem *addr)
494{ 506{
507 unsigned long port = (unsigned long __force)addr;
495 if (__is_io_address(port)) 508 if (__is_io_address(port))
496 __ixp4xx_outw(value, (unsigned int)port); 509 __ixp4xx_outw(value, port & PIO_MASK);
497 else 510 else
498#ifndef CONFIG_IXP4XX_INDIRECT_PCI 511#ifndef CONFIG_IXP4XX_INDIRECT_PCI
499 __raw_writew(cpu_to_le16(value), (u32)port); 512 __raw_writew(cpu_to_le16(value), addr);
500#else 513#else
501 __ixp4xx_writew(value, (u32)port); 514 __ixp4xx_writew(value, port);
502#endif 515#endif
503} 516}
504 517
505static inline void 518static inline void
506__ixp4xx_iowrite16_rep(u32 port, u16 *vaddr, u32 count) 519__ixp4xx_iowrite16_rep(void __iomem *addr, const void *vaddr, u32 count)
507{ 520{
521 unsigned long port = (unsigned long __force)addr;
508 if (__is_io_address(port)) 522 if (__is_io_address(port))
509 __ixp4xx_outsw(port, vaddr, count); 523 __ixp4xx_outsw(port & PIO_MASK, vaddr, count);
524 else
510#ifndef CONFIG_IXP4XX_INDIRECT_PCI 525#ifndef CONFIG_IXP4XX_INDIRECT_PCI
511 __raw_readsw((void __iomem *)port, vaddr, count); 526 __raw_writesw(addr, vaddr, count);
512#else 527#else
513 __ixp4xx_writesw(port, vaddr, count); 528 __ixp4xx_writesw(port, vaddr, count);
514#endif 529#endif
515} 530}
516 531
517static inline void 532static inline void
518__ixp4xx_iowrite32(u32 value, void __iomem *port) 533__ixp4xx_iowrite32(u32 value, void __iomem *addr)
519{ 534{
535 unsigned long port = (unsigned long __force)addr;
520 if (__is_io_address(port)) 536 if (__is_io_address(port))
521 __ixp4xx_outl(value, (unsigned int)port); 537 __ixp4xx_outl(value, port & PIO_MASK);
522 else 538 else
523#ifndef CONFIG_IXP4XX_INDIRECT_PCI 539#ifndef CONFIG_IXP4XX_INDIRECT_PCI
524 __raw_writel(cpu_to_le32(value), (u32)port); 540 __raw_writel(cpu_to_le32(value), port);
525#else 541#else
526 __ixp4xx_writel(value, (u32)port); 542 __ixp4xx_writel(value, port);
527#endif 543#endif
528} 544}
529 545
530static inline void 546static inline void
531__ixp4xx_iowrite32_rep(u32 port, u32 *vaddr, u32 count) 547__ixp4xx_iowrite32_rep(void __iomem *addr, const void *vaddr, u32 count)
532{ 548{
549 unsigned long port = (unsigned long __force)addr;
533 if (__is_io_address(port)) 550 if (__is_io_address(port))
534 __ixp4xx_outsl(port, vaddr, count); 551 __ixp4xx_outsl(port & PIO_MASK, vaddr, count);
552 else
535#ifndef CONFIG_IXP4XX_INDIRECT_PCI 553#ifndef CONFIG_IXP4XX_INDIRECT_PCI
536 __raw_readsl((void __iomem *)port, vaddr, count); 554 __raw_writesl(addr, vaddr, count);
537#else 555#else
538 __ixp4xx_outsl(port, vaddr, count); 556 __ixp4xx_writesl(port, vaddr, count);
539#endif 557#endif
540} 558}
541 559
@@ -555,7 +573,7 @@ __ixp4xx_iowrite32_rep(u32 port, u32 *vaddr, u32 count)
555#define iowrite16_rep(p, v, c) __ixp4xx_iowrite16_rep(p, v, c) 573#define iowrite16_rep(p, v, c) __ixp4xx_iowrite16_rep(p, v, c)
556#define iowrite32_rep(p, v, c) __ixp4xx_iowrite32_rep(p, v, c) 574#define iowrite32_rep(p, v, c) __ixp4xx_iowrite32_rep(p, v, c)
557 575
558#define ioport_map(port, nr) ((void __iomem*)port) 576#define ioport_map(port, nr) ((void __iomem*)(port + PIO_OFFSET))
559#define ioport_unmap(addr) 577#define ioport_unmap(addr)
560 578
561#endif // __ASM_ARM_ARCH_IO_H 579#endif // __ASM_ARM_ARCH_IO_H