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-rw-r--r--include/asm-arm/arch-ixp2000/dma.h9
-rw-r--r--include/asm-arm/arch-ixp2000/enp2611.h6
-rw-r--r--include/asm-arm/arch-ixp2000/entry-macro.S1
-rw-r--r--include/asm-arm/arch-ixp2000/io.h98
-rw-r--r--include/asm-arm/arch-ixp2000/ixp2000-regs.h8
5 files changed, 15 insertions, 107 deletions
diff --git a/include/asm-arm/arch-ixp2000/dma.h b/include/asm-arm/arch-ixp2000/dma.h
index 0fb3568a98dd..548d8dc507eb 100644
--- a/include/asm-arm/arch-ixp2000/dma.h
+++ b/include/asm-arm/arch-ixp2000/dma.h
@@ -7,12 +7,3 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#ifndef __ASM_ARCH_DMA_H
11#define __ASM_ARCH_DMA_H
12
13#define MAX_DMA_ADDRESS 0xffffffff
14
15/* No DMA */
16#define MAX_DMA_CHANNELS 0
17
18#endif /* _ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-ixp2000/enp2611.h b/include/asm-arm/arch-ixp2000/enp2611.h
index 95128d9f5026..42f3c28dc5c4 100644
--- a/include/asm-arm/arch-ixp2000/enp2611.h
+++ b/include/asm-arm/arch-ixp2000/enp2611.h
@@ -36,5 +36,11 @@
36#define ENP2611_GPIO_SCL 7 36#define ENP2611_GPIO_SCL 7
37#define ENP2611_GPIO_SDA 6 37#define ENP2611_GPIO_SDA 6
38 38
39#define IRQ_ENP2611_THERMAL IRQ_IXP2000_GPIO4
40#define IRQ_ENP2611_OPTION_BOARD IRQ_IXP2000_GPIO3
41#define IRQ_ENP2611_CALEB IRQ_IXP2000_GPIO2
42#define IRQ_ENP2611_PM3386_1 IRQ_IXP2000_GPIO1
43#define IRQ_ENP2611_PM3386_0 IRQ_IXP2000_GPIO0
44
39 45
40#endif 46#endif
diff --git a/include/asm-arm/arch-ixp2000/entry-macro.S b/include/asm-arm/arch-ixp2000/entry-macro.S
index e3a4e4121298..16e1e6124b31 100644
--- a/include/asm-arm/arch-ixp2000/entry-macro.S
+++ b/include/asm-arm/arch-ixp2000/entry-macro.S
@@ -7,6 +7,7 @@
7 * License version 2. This program is licensed "as is" without any 7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <asm/arch/irqs.h>
10 11
11 .macro disable_fiq 12 .macro disable_fiq
12 .endm 13 .endm
diff --git a/include/asm-arm/arch-ixp2000/io.h b/include/asm-arm/arch-ixp2000/io.h
index 7fbcdf9931ee..c0ff2c6c66e7 100644
--- a/include/asm-arm/arch-ixp2000/io.h
+++ b/include/asm-arm/arch-ixp2000/io.h
@@ -131,102 +131,4 @@
131#endif 131#endif
132 132
133 133
134#ifdef CONFIG_ARCH_IXDP2X01
135/*
136 * This is an ugly hack but the CS8900 on the 2x01's does not sit in any sort
137 * of "I/O space" and is just direct mapped into a 32-bit-only addressable
138 * bus. The address space for this bus is such that we can't really easily
139 * make it contiguous to the PCI I/O address range, and it also does not
140 * need swapping like PCI addresses do (IXDP2x01 is a BE platform).
141 * B/C of this we can't use the standard in/out functions and need to
142 * runtime check if the incoming address is a PCI address or for
143 * the CS89x0.
144 */
145#undef inw
146#undef outw
147#undef insw
148#undef outsw
149
150#include <asm/mach-types.h>
151
152static inline void insw(u32 ptr, void *buf, int length)
153{
154 register volatile u32 *port = (volatile u32 *)ptr;
155
156 /*
157 * Is this cycle meant for the CS8900?
158 */
159 if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
160 (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
161 ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
162 u8 *buf8 = (u8*)buf;
163 register u32 tmp32;
164
165 do {
166 tmp32 = *port;
167 *buf8++ = (u8)tmp32;
168 *buf8++ = (u8)(tmp32 >> 8);
169 } while(--length);
170
171 return;
172 }
173
174 __raw_readsw(alignw(___io(ptr)),buf,length);
175}
176
177static inline void outsw(u32 ptr, void *buf, int length)
178{
179 register volatile u32 *port = (volatile u32 *)ptr;
180
181 /*
182 * Is this cycle meant for the CS8900?
183 */
184 if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
185 (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
186 ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
187 register u32 tmp32;
188 u8 *buf8 = (u8*)buf;
189 do {
190 tmp32 = *buf8++;
191 tmp32 |= (*buf8++) << 8;
192 *port = tmp32;
193 } while(--length);
194 return;
195 }
196
197 __raw_writesw(alignw(___io(ptr)),buf,length);
198}
199
200
201static inline u16 inw(u32 ptr)
202{
203 register volatile u32 *port = (volatile u32 *)ptr;
204
205 /*
206 * Is this cycle meant for the CS8900?
207 */
208 if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
209 (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
210 ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
211 return (u16)(*port);
212 }
213
214 return __raw_readw(alignw(___io(ptr)));
215}
216
217static inline void outw(u16 value, u32 ptr)
218{
219 register volatile u32 *port = (volatile u32 *)ptr;
220
221 if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
222 (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
223 ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
224 *port = value;
225 return;
226 }
227
228 __raw_writew((value),alignw(___io(ptr)));
229}
230#endif /* IXDP2x01 */
231
232#endif 134#endif
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
index fc5ac6aec4f2..8cf70ff160af 100644
--- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h
+++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
@@ -156,6 +156,14 @@
156#define IXP2000_IRQ_THD_RAW_STATUS_B_1 IXP2000_INTCTL_REG(0x84) 156#define IXP2000_IRQ_THD_RAW_STATUS_B_1 IXP2000_INTCTL_REG(0x84)
157#define IXP2000_IRQ_THD_RAW_STATUS_B_2 IXP2000_INTCTL_REG(0x88) 157#define IXP2000_IRQ_THD_RAW_STATUS_B_2 IXP2000_INTCTL_REG(0x88)
158#define IXP2000_IRQ_THD_RAW_STATUS_B_3 IXP2000_INTCTL_REG(0x8c) 158#define IXP2000_IRQ_THD_RAW_STATUS_B_3 IXP2000_INTCTL_REG(0x8c)
159#define IXP2000_IRQ_THD_STATUS_A_0 IXP2000_INTCTL_REG(0xe0)
160#define IXP2000_IRQ_THD_STATUS_A_1 IXP2000_INTCTL_REG(0xe4)
161#define IXP2000_IRQ_THD_STATUS_A_2 IXP2000_INTCTL_REG(0xe8)
162#define IXP2000_IRQ_THD_STATUS_A_3 IXP2000_INTCTL_REG(0xec)
163#define IXP2000_IRQ_THD_STATUS_B_0 IXP2000_INTCTL_REG(0x100)
164#define IXP2000_IRQ_THD_STATUS_B_1 IXP2000_INTCTL_REG(0x104)
165#define IXP2000_IRQ_THD_STATUS_B_2 IXP2000_INTCTL_REG(0x108)
166#define IXP2000_IRQ_THD_STATUS_B_3 IXP2000_INTCTL_REG(0x10c)
159#define IXP2000_IRQ_THD_ENABLE_SET_A_0 IXP2000_INTCTL_REG(0x160) 167#define IXP2000_IRQ_THD_ENABLE_SET_A_0 IXP2000_INTCTL_REG(0x160)
160#define IXP2000_IRQ_THD_ENABLE_SET_A_1 IXP2000_INTCTL_REG(0x164) 168#define IXP2000_IRQ_THD_ENABLE_SET_A_1 IXP2000_INTCTL_REG(0x164)
161#define IXP2000_IRQ_THD_ENABLE_SET_A_2 IXP2000_INTCTL_REG(0x168) 169#define IXP2000_IRQ_THD_ENABLE_SET_A_2 IXP2000_INTCTL_REG(0x168)