diff options
Diffstat (limited to 'include/asm-arm/arch-ixp2000')
-rw-r--r-- | include/asm-arm/arch-ixp2000/gpio.h | 31 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp2000/io.h | 96 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp2000/ixdp2x00.h | 4 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp2000/ixdp2x01.h | 4 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp2000/ixp2000-regs.h | 21 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp2000/platform.h | 23 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp2000/vmalloc.h | 2 |
7 files changed, 127 insertions, 54 deletions
diff --git a/include/asm-arm/arch-ixp2000/gpio.h b/include/asm-arm/arch-ixp2000/gpio.h index 84634af5cc64..03cbbe1fd9d8 100644 --- a/include/asm-arm/arch-ixp2000/gpio.h +++ b/include/asm-arm/arch-ixp2000/gpio.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * include/asm-arm/arch-ixp2000/ixp2000-gpio.h | 2 | * include/asm-arm/arch-ixp2000/gpio.h |
3 | * | 3 | * |
4 | * Copyright (C) 2002 Intel Corporation. | 4 | * Copyright (C) 2002 Intel Corporation. |
5 | * | 5 | * |
@@ -16,26 +16,18 @@ | |||
16 | * Use this instead of directly setting the GPIO registers. | 16 | * Use this instead of directly setting the GPIO registers. |
17 | * GPIOs may also be used as GPIOs (e.g. for emulating i2c/smb) | 17 | * GPIOs may also be used as GPIOs (e.g. for emulating i2c/smb) |
18 | */ | 18 | */ |
19 | #ifndef _ASM_ARCH_IXP2000_GPIO_H_ | 19 | #ifndef __ASM_ARCH_GPIO_H |
20 | #define _ASM_ARCH_IXP2000_GPIO_H_ | 20 | #define __ASM_ARCH_GPIO_H |
21 | 21 | ||
22 | #ifndef __ASSEMBLY__ | 22 | #ifndef __ASSEMBLY__ |
23 | #define GPIO_OUT 0x0 | 23 | |
24 | #define GPIO_IN 0x80 | 24 | #define GPIO_IN 0 |
25 | #define GPIO_OUT 1 | ||
25 | 26 | ||
26 | #define IXP2000_GPIO_LOW 0 | 27 | #define IXP2000_GPIO_LOW 0 |
27 | #define IXP2000_GPIO_HIGH 1 | 28 | #define IXP2000_GPIO_HIGH 1 |
28 | 29 | ||
29 | #define GPIO_NO_EDGES 0 | 30 | extern void gpio_line_config(int line, int direction); |
30 | #define GPIO_FALLING_EDGE 1 | ||
31 | #define GPIO_RISING_EDGE 2 | ||
32 | #define GPIO_BOTH_EDGES 3 | ||
33 | #define GPIO_LEVEL_LOW 4 | ||
34 | #define GPIO_LEVEL_HIGH 8 | ||
35 | |||
36 | extern void set_GPIO_IRQ_edge(int gpio_nr, int edge); | ||
37 | extern void set_GPIO_IRQ_level(int gpio_nr, int level); | ||
38 | extern void gpio_line_config(int line, int style); | ||
39 | 31 | ||
40 | static inline int gpio_line_get(int line) | 32 | static inline int gpio_line_get(int line) |
41 | { | 33 | { |
@@ -45,11 +37,12 @@ static inline int gpio_line_get(int line) | |||
45 | static inline void gpio_line_set(int line, int value) | 37 | static inline void gpio_line_set(int line, int value) |
46 | { | 38 | { |
47 | if (value == IXP2000_GPIO_HIGH) { | 39 | if (value == IXP2000_GPIO_HIGH) { |
48 | ixp_reg_write(IXP2000_GPIO_POSR, BIT(line)); | 40 | ixp2000_reg_write(IXP2000_GPIO_POSR, 1 << line); |
49 | } else if (value == IXP2000_GPIO_LOW) | 41 | } else if (value == IXP2000_GPIO_LOW) { |
50 | ixp_reg_write(IXP2000_GPIO_POCR, BIT(line)); | 42 | ixp2000_reg_write(IXP2000_GPIO_POCR, 1 << line); |
43 | } | ||
51 | } | 44 | } |
52 | 45 | ||
53 | #endif /* !__ASSEMBLY__ */ | 46 | #endif /* !__ASSEMBLY__ */ |
54 | #endif /* ASM_ARCH_IXP2000_GPIO_H_ */ | ||
55 | 47 | ||
48 | #endif /* ASM_ARCH_IXP2000_GPIO_H_ */ | ||
diff --git a/include/asm-arm/arch-ixp2000/io.h b/include/asm-arm/arch-ixp2000/io.h index 083462668e18..3241cd6f0778 100644 --- a/include/asm-arm/arch-ixp2000/io.h +++ b/include/asm-arm/arch-ixp2000/io.h | |||
@@ -17,18 +17,23 @@ | |||
17 | 17 | ||
18 | #define IO_SPACE_LIMIT 0xffffffff | 18 | #define IO_SPACE_LIMIT 0xffffffff |
19 | #define __mem_pci(a) (a) | 19 | #define __mem_pci(a) (a) |
20 | #define ___io(p) ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE)) | ||
21 | 20 | ||
22 | /* | 21 | /* |
23 | * The IXP2400 before revision B0 asserts byte lanes for PCI I/O | 22 | * The A? revisions of the IXP2000s assert byte lanes for PCI I/O |
24 | * transactions the other way round (MEM transactions don't have this | 23 | * transactions the other way round (MEM transactions don't have this |
25 | * issue), so we need to override the standard functions. B0 and later | 24 | * issue), so if we want to support those models, we need to override |
26 | * have a bit that can be set to 1 to get the 'proper' behavior, but | 25 | * the standard I/O functions. |
27 | * since that isn't available on the A? revisions we just keep doing | 26 | * |
28 | * things manually. | 27 | * B0 and later have a bit that can be set to 1 to get the proper |
28 | * behavior for I/O transactions, which then allows us to use the | ||
29 | * standard I/O functions. This is what we do if the user does not | ||
30 | * explicitly ask for support for pre-B0. | ||
29 | */ | 31 | */ |
30 | #define alignb(addr) (void __iomem *)((unsigned long)addr ^ 3) | 32 | #ifdef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO |
31 | #define alignw(addr) (void __iomem *)((unsigned long)addr ^ 2) | 33 | #define ___io(p) ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE)) |
34 | |||
35 | #define alignb(addr) (void __iomem *)((unsigned long)(addr) ^ 3) | ||
36 | #define alignw(addr) (void __iomem *)((unsigned long)(addr) ^ 2) | ||
32 | 37 | ||
33 | #define outb(v,p) __raw_writeb((v),alignb(___io(p))) | 38 | #define outb(v,p) __raw_writeb((v),alignb(___io(p))) |
34 | #define outw(v,p) __raw_writew((v),alignw(___io(p))) | 39 | #define outw(v,p) __raw_writew((v),alignw(___io(p))) |
@@ -48,6 +53,81 @@ | |||
48 | #define insw(p,d,l) __raw_readsw(alignw(___io(p)),d,l) | 53 | #define insw(p,d,l) __raw_readsw(alignw(___io(p)),d,l) |
49 | #define insl(p,d,l) __raw_readsl(___io(p),d,l) | 54 | #define insl(p,d,l) __raw_readsl(___io(p),d,l) |
50 | 55 | ||
56 | #define __is_io_address(p) ((((unsigned long)(p)) & ~(IXP2000_PCI_IO_SIZE - 1)) == IXP2000_PCI_IO_VIRT_BASE) | ||
57 | |||
58 | #define ioread8(p) \ | ||
59 | ({ \ | ||
60 | unsigned int __v; \ | ||
61 | \ | ||
62 | if (__is_io_address(p)) { \ | ||
63 | __v = __raw_readb(alignb(p)); \ | ||
64 | } else { \ | ||
65 | __v = __raw_readb(p); \ | ||
66 | } \ | ||
67 | \ | ||
68 | __v; \ | ||
69 | }) \ | ||
70 | |||
71 | #define ioread16(p) \ | ||
72 | ({ \ | ||
73 | unsigned int __v; \ | ||
74 | \ | ||
75 | if (__is_io_address(p)) { \ | ||
76 | __v = __raw_readw(alignw(p)); \ | ||
77 | } else { \ | ||
78 | __v = le16_to_cpu(__raw_readw(p)); \ | ||
79 | } \ | ||
80 | \ | ||
81 | __v; \ | ||
82 | }) | ||
83 | |||
84 | #define ioread32(p) \ | ||
85 | ({ \ | ||
86 | unsigned int __v; \ | ||
87 | \ | ||
88 | if (__is_io_address(p)) { \ | ||
89 | __v = __raw_readl(p); \ | ||
90 | } else { \ | ||
91 | __v = le32_to_cpu(__raw_readl(p)); \ | ||
92 | } \ | ||
93 | \ | ||
94 | __v; \ | ||
95 | }) | ||
96 | |||
97 | #define iowrite8(v,p) \ | ||
98 | ({ \ | ||
99 | if (__is_io_address(p)) { \ | ||
100 | __raw_writeb((v), alignb(p)); \ | ||
101 | } else { \ | ||
102 | __raw_writeb((v), p); \ | ||
103 | } \ | ||
104 | }) | ||
105 | |||
106 | #define iowrite16(v,p) \ | ||
107 | ({ \ | ||
108 | if (__is_io_address(p)) { \ | ||
109 | __raw_writew((v), alignw(p)); \ | ||
110 | } else { \ | ||
111 | __raw_writew(cpu_to_le16(v), p); \ | ||
112 | } \ | ||
113 | }) | ||
114 | |||
115 | #define iowrite32(v,p) \ | ||
116 | ({ \ | ||
117 | if (__is_io_address(p)) { \ | ||
118 | __raw_writel((v), p); \ | ||
119 | } else { \ | ||
120 | __raw_writel(cpu_to_le32(v), p); \ | ||
121 | } \ | ||
122 | }) | ||
123 | |||
124 | #define ioport_map(port, nr) ___io(port) | ||
125 | |||
126 | #define ioport_unmap(addr) | ||
127 | #else | ||
128 | #define __io(p) ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE)) | ||
129 | #endif | ||
130 | |||
51 | 131 | ||
52 | #ifdef CONFIG_ARCH_IXDP2X01 | 132 | #ifdef CONFIG_ARCH_IXDP2X01 |
53 | /* | 133 | /* |
diff --git a/include/asm-arm/arch-ixp2000/ixdp2x00.h b/include/asm-arm/arch-ixp2000/ixdp2x00.h index 3a398dfbf125..229381c64283 100644 --- a/include/asm-arm/arch-ixp2000/ixdp2x00.h +++ b/include/asm-arm/arch-ixp2000/ixdp2x00.h | |||
@@ -21,8 +21,8 @@ | |||
21 | * On board CPLD memory map | 21 | * On board CPLD memory map |
22 | */ | 22 | */ |
23 | #define IXDP2X00_PHYS_CPLD_BASE 0xc7000000 | 23 | #define IXDP2X00_PHYS_CPLD_BASE 0xc7000000 |
24 | #define IXDP2X00_VIRT_CPLD_BASE 0xfafff000 | 24 | #define IXDP2X00_VIRT_CPLD_BASE 0xfe000000 |
25 | #define IXDP2X00_CPLD_SIZE 0x00001000 | 25 | #define IXDP2X00_CPLD_SIZE 0x00100000 |
26 | 26 | ||
27 | 27 | ||
28 | #define IXDP2X00_CPLD_REG(x) \ | 28 | #define IXDP2X00_CPLD_REG(x) \ |
diff --git a/include/asm-arm/arch-ixp2000/ixdp2x01.h b/include/asm-arm/arch-ixp2000/ixdp2x01.h index b3a1bcda8d01..b768009c3a51 100644 --- a/include/asm-arm/arch-ixp2000/ixdp2x01.h +++ b/include/asm-arm/arch-ixp2000/ixdp2x01.h | |||
@@ -18,8 +18,8 @@ | |||
18 | #define __IXDP2X01_H__ | 18 | #define __IXDP2X01_H__ |
19 | 19 | ||
20 | #define IXDP2X01_PHYS_CPLD_BASE 0xc6024000 | 20 | #define IXDP2X01_PHYS_CPLD_BASE 0xc6024000 |
21 | #define IXDP2X01_VIRT_CPLD_BASE 0xfafff000 | 21 | #define IXDP2X01_VIRT_CPLD_BASE 0xfe000000 |
22 | #define IXDP2X01_CPLD_REGION_SIZE 0x00001000 | 22 | #define IXDP2X01_CPLD_REGION_SIZE 0x00100000 |
23 | 23 | ||
24 | #define IXDP2X01_CPLD_VIRT_REG(reg) (volatile unsigned long*)(IXDP2X01_VIRT_CPLD_BASE | reg) | 24 | #define IXDP2X01_CPLD_VIRT_REG(reg) (volatile unsigned long*)(IXDP2X01_VIRT_CPLD_BASE | reg) |
25 | #define IXDP2X01_CPLD_PHYS_REG(reg) (volatile u32*)(IXDP2X01_PHYS_CPLD_BASE | reg) | 25 | #define IXDP2X01_CPLD_PHYS_REG(reg) (volatile u32*)(IXDP2X01_PHYS_CPLD_BASE | reg) |
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h index a1d9e181b10f..75623f81ef75 100644 --- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h +++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h | |||
@@ -18,6 +18,21 @@ | |||
18 | #ifndef _IXP2000_REGS_H_ | 18 | #ifndef _IXP2000_REGS_H_ |
19 | #define _IXP2000_REGS_H_ | 19 | #define _IXP2000_REGS_H_ |
20 | 20 | ||
21 | /* | ||
22 | * IXP2000 linux memory map: | ||
23 | * | ||
24 | * virt phys size | ||
25 | * fb000000 db000000 16M PCI CFG1 | ||
26 | * fc000000 da000000 16M PCI CFG0 | ||
27 | * fd000000 d8000000 16M PCI I/O | ||
28 | * fe[0-7]00000 8M per-platform mappings | ||
29 | * feb00000 c8000000 1M MSF | ||
30 | * fec00000 df000000 1M PCI CSRs | ||
31 | * fed00000 de000000 1M PCI CREG | ||
32 | * fee00000 d6000000 1M INTCTL | ||
33 | * fef00000 c0000000 1M CAP | ||
34 | */ | ||
35 | |||
21 | /* | 36 | /* |
22 | * Static I/O regions. | 37 | * Static I/O regions. |
23 | * | 38 | * |
@@ -71,6 +86,10 @@ | |||
71 | #define IXP2000_PCI_CSR_VIRT_BASE 0xfec00000 | 86 | #define IXP2000_PCI_CSR_VIRT_BASE 0xfec00000 |
72 | #define IXP2000_PCI_CSR_SIZE 0x00100000 | 87 | #define IXP2000_PCI_CSR_SIZE 0x00100000 |
73 | 88 | ||
89 | #define IXP2000_MSF_PHYS_BASE 0xc8000000 | ||
90 | #define IXP2000_MSF_VIRT_BASE 0xfeb00000 | ||
91 | #define IXP2000_MSF_SIZE 0x00100000 | ||
92 | |||
74 | #define IXP2000_PCI_IO_PHYS_BASE 0xd8000000 | 93 | #define IXP2000_PCI_IO_PHYS_BASE 0xd8000000 |
75 | #define IXP2000_PCI_IO_VIRT_BASE 0xfd000000 | 94 | #define IXP2000_PCI_IO_VIRT_BASE 0xfd000000 |
76 | #define IXP2000_PCI_IO_SIZE 0x01000000 | 95 | #define IXP2000_PCI_IO_SIZE 0x01000000 |
@@ -241,7 +260,7 @@ | |||
241 | #define PCI_CONTROL_BE_DEI (1 << 21) /* Big Endian Data Enable In */ | 260 | #define PCI_CONTROL_BE_DEI (1 << 21) /* Big Endian Data Enable In */ |
242 | #define PCI_CONTROL_BE_BEO (1 << 20) /* Big Endian Byte Enable Out */ | 261 | #define PCI_CONTROL_BE_BEO (1 << 20) /* Big Endian Byte Enable Out */ |
243 | #define PCI_CONTROL_BE_BEI (1 << 19) /* Big Endian Byte Enable In */ | 262 | #define PCI_CONTROL_BE_BEI (1 << 19) /* Big Endian Byte Enable In */ |
244 | #define PCI_CONTROL_PNR (1 << 17) /* PCI Not Reset bit */ | 263 | #define PCI_CONTROL_IEE (1 << 17) /* I/O cycle Endian swap Enable */ |
245 | 264 | ||
246 | #define IXP2000_PCI_RST_REL (1 << 2) | 265 | #define IXP2000_PCI_RST_REL (1 << 2) |
247 | #define CFG_RST_DIR (*IXP2000_PCI_CONTROL & IXP2000_PCICNTL_PCF) | 266 | #define CFG_RST_DIR (*IXP2000_PCI_CONTROL & IXP2000_PCICNTL_PCF) |
diff --git a/include/asm-arm/arch-ixp2000/platform.h b/include/asm-arm/arch-ixp2000/platform.h index 901bba6d02b4..c0caf3e3e6fd 100644 --- a/include/asm-arm/arch-ixp2000/platform.h +++ b/include/asm-arm/arch-ixp2000/platform.h | |||
@@ -115,6 +115,7 @@ static inline unsigned int ixp2000_is_pcimaster(void) | |||
115 | } | 115 | } |
116 | 116 | ||
117 | void ixp2000_map_io(void); | 117 | void ixp2000_map_io(void); |
118 | void ixp2000_uart_init(void); | ||
118 | void ixp2000_init_irq(void); | 119 | void ixp2000_init_irq(void); |
119 | void ixp2000_init_time(unsigned long); | 120 | void ixp2000_init_time(unsigned long); |
120 | unsigned long ixp2000_gettimeoffset(void); | 121 | unsigned long ixp2000_gettimeoffset(void); |
@@ -138,30 +139,10 @@ struct ixp2000_flash_data { | |||
138 | unsigned long (*bank_setup)(unsigned long); | 139 | unsigned long (*bank_setup)(unsigned long); |
139 | }; | 140 | }; |
140 | 141 | ||
141 | /* | ||
142 | * GPIO helper functions | ||
143 | */ | ||
144 | #define GPIO_IN 0 | ||
145 | #define GPIO_OUT 1 | ||
146 | |||
147 | extern void gpio_line_config(int line, int style); | ||
148 | |||
149 | static inline int gpio_line_get(int line) | ||
150 | { | ||
151 | return (((*IXP2000_GPIO_PLR) >> line) & 1); | ||
152 | } | ||
153 | |||
154 | static inline void gpio_line_set(int line, int value) | ||
155 | { | ||
156 | if (value) | ||
157 | ixp2000_reg_write(IXP2000_GPIO_POSR, (1 << line)); | ||
158 | else | ||
159 | ixp2000_reg_write(IXP2000_GPIO_POCR, (1 << line)); | ||
160 | } | ||
161 | |||
162 | struct ixp2000_i2c_pins { | 142 | struct ixp2000_i2c_pins { |
163 | unsigned long sda_pin; | 143 | unsigned long sda_pin; |
164 | unsigned long scl_pin; | 144 | unsigned long scl_pin; |
165 | }; | 145 | }; |
166 | 146 | ||
147 | |||
167 | #endif /* !__ASSEMBLY__ */ | 148 | #endif /* !__ASSEMBLY__ */ |
diff --git a/include/asm-arm/arch-ixp2000/vmalloc.h b/include/asm-arm/arch-ixp2000/vmalloc.h index 473dff4ec561..275136963a0c 100644 --- a/include/asm-arm/arch-ixp2000/vmalloc.h +++ b/include/asm-arm/arch-ixp2000/vmalloc.h | |||
@@ -17,4 +17,4 @@ | |||
17 | * The vmalloc() routines leaves a hole of 4kB between each vmalloced | 17 | * The vmalloc() routines leaves a hole of 4kB between each vmalloced |
18 | * area for the same reason. ;) | 18 | * area for the same reason. ;) |
19 | */ | 19 | */ |
20 | #define VMALLOC_END 0xfaffefff | 20 | #define VMALLOC_END 0xfb000000 |