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-rw-r--r--include/asm-arm/arch-ixp2000/irqs.h174
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diff --git a/include/asm-arm/arch-ixp2000/irqs.h b/include/asm-arm/arch-ixp2000/irqs.h
new file mode 100644
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1/*
2 * linux/include/asm-arm/arch-ixp2000/irqs.h
3 *
4 * Original Author: Naeem Afzal <naeem.m.afzal@intel.com>
5 * Maintainer: Deepak Saxena <dsaxena@plexity.net>
6 *
7 * Copyright (C) 2002 Intel Corp.
8 * Copyright (C) 2003-2004 MontaVista Software, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#ifndef _IRQS_H
16#define _IRQS_H
17
18/*
19 * Do NOT add #ifdef MACHINE_FOO in here.
20 * Simpy add your machine IRQs here and increase NR_IRQS if needed to
21 * hold your machine's IRQ table.
22 */
23
24/*
25 * Some interrupt numbers go unused b/c the IRQ mask/ummask/status
26 * register has those bit reserved. We just mark those interrupts
27 * as invalid and this allows us to do mask/unmask with a single
28 * shift operation instead of having to map the IRQ number to
29 * a HW IRQ number.
30 */
31#define IRQ_IXP2000_SOFT_INT 0 /* soft interrupt */
32#define IRQ_IXP2000_ERRSUM 1 /* OR of all bits in ErrorStatus reg*/
33#define IRQ_IXP2000_UART 2
34#define IRQ_IXP2000_GPIO 3
35#define IRQ_IXP2000_TIMER1 4
36#define IRQ_IXP2000_TIMER2 5
37#define IRQ_IXP2000_TIMER3 6
38#define IRQ_IXP2000_TIMER4 7
39#define IRQ_IXP2000_PMU 8
40#define IRQ_IXP2000_SPF 9 /* Slow port framer IRQ */
41#define IRQ_IXP2000_DMA1 10
42#define IRQ_IXP2000_DMA2 11
43#define IRQ_IXP2000_DMA3 12
44#define IRQ_IXP2000_PCI_DOORBELL 13
45#define IRQ_IXP2000_ME_ATTN 14
46#define IRQ_IXP2000_PCI 15 /* PCI INTA or INTB */
47#define IRQ_IXP2000_THDA0 16 /* thread 0-31A */
48#define IRQ_IXP2000_THDA1 17 /* thread 32-63A, IXP2800 only */
49#define IRQ_IXP2000_THDA2 18 /* thread 64-95A */
50#define IRQ_IXP2000_THDA3 19 /* thread 96-127A, IXP2800 only */
51#define IRQ_IXP2000_THDB0 24 /* thread 0-31B */
52#define IRQ_IXP2000_THDB1 25 /* thread 32-63B, IXP2800 only */
53#define IRQ_IXP2000_THDB2 26 /* thread 64-95B */
54#define IRQ_IXP2000_THDB3 27 /* thread 96-127B, IXP2800 only */
55
56/* define generic GPIOs */
57#define IRQ_IXP2000_GPIO0 32
58#define IRQ_IXP2000_GPIO1 33
59#define IRQ_IXP2000_GPIO2 34
60#define IRQ_IXP2000_GPIO3 35
61#define IRQ_IXP2000_GPIO4 36
62#define IRQ_IXP2000_GPIO5 37
63#define IRQ_IXP2000_GPIO6 38
64#define IRQ_IXP2000_GPIO7 39
65
66/* split off the 2 PCI sources */
67#define IRQ_IXP2000_PCIA 40
68#define IRQ_IXP2000_PCIB 41
69
70#define NR_IXP2000_IRQS 42
71
72#define IXP2000_BOARD_IRQ(x) (NR_IXP2000_IRQS + (x))
73
74#define IXP2000_BOARD_IRQ_MASK(irq) (1 << (irq - NR_IXP2000_IRQS))
75
76/*
77 * This allows for all the on-chip sources plus up to 32 CPLD based
78 * IRQs. Should be more than enough.
79 */
80#define IXP2000_BOARD_IRQS 32
81#define NR_IRQS (NR_IXP2000_IRQS + IXP2000_BOARD_IRQS)
82
83
84/*
85 * IXDP2400 specific IRQs
86 */
87#define IRQ_IXDP2400_INGRESS_NPU IXP2000_BOARD_IRQ(0)
88#define IRQ_IXDP2400_ENET IXP2000_BOARD_IRQ(1)
89#define IRQ_IXDP2400_MEDIA_PCI IXP2000_BOARD_IRQ(2)
90#define IRQ_IXDP2400_MEDIA_SP IXP2000_BOARD_IRQ(3)
91#define IRQ_IXDP2400_SF_PCI IXP2000_BOARD_IRQ(4)
92#define IRQ_IXDP2400_SF_SP IXP2000_BOARD_IRQ(5)
93#define IRQ_IXDP2400_PMC IXP2000_BOARD_IRQ(6)
94#define IRQ_IXDP2400_TVM IXP2000_BOARD_IRQ(7)
95
96#define NR_IXDP2400_IRQS ((IRQ_IXDP2400_TVM)+1)
97#define IXDP2400_NR_IRQS NR_IXDP2400_IRQS - NR_IXP2000_IRQS
98
99/* IXDP2800 specific IRQs */
100#define IRQ_IXDP2800_EGRESS_ENET IXP2000_BOARD_IRQ(0)
101#define IRQ_IXDP2800_INGRESS_NPU IXP2000_BOARD_IRQ(1)
102#define IRQ_IXDP2800_PMC IXP2000_BOARD_IRQ(2)
103#define IRQ_IXDP2800_FABRIC_PCI IXP2000_BOARD_IRQ(3)
104#define IRQ_IXDP2800_FABRIC IXP2000_BOARD_IRQ(4)
105#define IRQ_IXDP2800_MEDIA IXP2000_BOARD_IRQ(5)
106
107#define NR_IXDP2800_IRQS ((IRQ_IXDP2800_MEDIA)+1)
108#define IXDP2800_NR_IRQS NR_IXDP2800_IRQS - NR_IXP2000_IRQS
109
110/*
111 * IRQs on both IXDP2x01 boards
112 */
113#define IRQ_IXDP2X01_SPCI_DB_0 IXP2000_BOARD_IRQ(2)
114#define IRQ_IXDP2X01_SPCI_DB_1 IXP2000_BOARD_IRQ(3)
115#define IRQ_IXDP2X01_SPCI_PMC_INTA IXP2000_BOARD_IRQ(4)
116#define IRQ_IXDP2X01_SPCI_PMC_INTB IXP2000_BOARD_IRQ(5)
117#define IRQ_IXDP2X01_SPCI_PMC_INTC IXP2000_BOARD_IRQ(6)
118#define IRQ_IXDP2X01_SPCI_PMC_INTD IXP2000_BOARD_IRQ(7)
119#define IRQ_IXDP2X01_SPCI_FIC_INT IXP2000_BOARD_IRQ(8)
120#define IRQ_IXDP2X01_IPMI_FROM IXP2000_BOARD_IRQ(16)
121#define IRQ_IXDP2X01_125US IXP2000_BOARD_IRQ(17)
122#define IRQ_IXDP2X01_DB_0_ADD IXP2000_BOARD_IRQ(18)
123#define IRQ_IXDP2X01_DB_1_ADD IXP2000_BOARD_IRQ(19)
124#define IRQ_IXDP2X01_UART1 IXP2000_BOARD_IRQ(21)
125#define IRQ_IXDP2X01_UART2 IXP2000_BOARD_IRQ(22)
126#define IRQ_IXDP2X01_FIC_ADD_INT IXP2000_BOARD_IRQ(24)
127#define IRQ_IXDP2X01_CS8900 IXP2000_BOARD_IRQ(25)
128#define IRQ_IXDP2X01_BBSRAM IXP2000_BOARD_IRQ(26)
129
130#define IXDP2X01_VALID_IRQ_MASK ( \
131 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_DB_0) | \
132 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_DB_1) | \
133 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTA) | \
134 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTB) | \
135 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTC) | \
136 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTD) | \
137 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_FIC_INT) | \
138 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_IPMI_FROM) | \
139 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_125US) | \
140 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_DB_0_ADD) | \
141 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_DB_1_ADD) | \
142 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_UART1) | \
143 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_UART2) | \
144 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_FIC_ADD_INT) | \
145 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_CS8900) | \
146 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_BBSRAM) )
147
148/*
149 * IXDP2401 specific IRQs
150 */
151#define IRQ_IXDP2401_INTA_82546 IXP2000_BOARD_IRQ(0)
152#define IRQ_IXDP2401_INTB_82546 IXP2000_BOARD_IRQ(1)
153
154#define IXDP2401_VALID_IRQ_MASK ( \
155 IXDP2X01_VALID_IRQ_MASK | \
156 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2401_INTA_82546) |\
157 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2401_INTB_82546))
158
159/*
160 * IXDP2801-specific IRQs
161 */
162#define IRQ_IXDP2801_RIV IXP2000_BOARD_IRQ(0)
163#define IRQ_IXDP2801_CNFG_MEDIA IXP2000_BOARD_IRQ(27)
164#define IRQ_IXDP2801_CLOCK_REF IXP2000_BOARD_IRQ(28)
165
166#define IXDP2801_VALID_IRQ_MASK ( \
167 IXDP2X01_VALID_IRQ_MASK | \
168 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2801_RIV) |\
169 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2801_CNFG_MEDIA) |\
170 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2801_CLOCK_REF))
171
172#define NR_IXDP2X01_IRQS ((IRQ_IXDP2801_CLOCK_REF) + 1)
173
174#endif /*_IRQS_H*/