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-rw-r--r--include/asm-arm/arch-iop33x/debug-macro.S12
-rw-r--r--include/asm-arm/arch-iop33x/dma.h4
-rw-r--r--include/asm-arm/arch-iop33x/entry-macro.S8
-rw-r--r--include/asm-arm/arch-iop33x/hardware.h19
-rw-r--r--include/asm-arm/arch-iop33x/io.h12
-rw-r--r--include/asm-arm/arch-iop33x/iop331.h110
-rw-r--r--include/asm-arm/arch-iop33x/iop33x.h33
-rw-r--r--include/asm-arm/arch-iop33x/iq80331.h8
-rw-r--r--include/asm-arm/arch-iop33x/iq80332.h8
-rw-r--r--include/asm-arm/arch-iop33x/irqs.h86
-rw-r--r--include/asm-arm/arch-iop33x/memory.h6
-rw-r--r--include/asm-arm/arch-iop33x/system.h17
-rw-r--r--include/asm-arm/arch-iop33x/timex.h3
-rw-r--r--include/asm-arm/arch-iop33x/uncompress.h9
-rw-r--r--include/asm-arm/arch-iop33x/vmalloc.h15
15 files changed, 130 insertions, 220 deletions
diff --git a/include/asm-arm/arch-iop33x/debug-macro.S b/include/asm-arm/arch-iop33x/debug-macro.S
index b647edff475d..9e7132ebe6a7 100644
--- a/include/asm-arm/arch-iop33x/debug-macro.S
+++ b/include/asm-arm/arch-iop33x/debug-macro.S
@@ -1,17 +1,17 @@
1/* linux/include/asm-arm/arch-iop33x/debug-macro.S 1/*
2 * include/asm-arm/arch-iop33x/debug-macro.S
2 * 3 *
3 * Debugging macro include header 4 * Debugging macro include header
4 * 5 *
5 * Copyright (C) 1994-1999 Russell King 6 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks 7 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 * 8 *
8 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 10 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
11 * 12 */
12*/
13 13
14 .macro addruart,rx 14 .macro addruart, rx
15 mrc p15, 0, \rx, c1, c0 15 mrc p15, 0, \rx, c1, c0
16 tst \rx, #1 @ mmu enabled? 16 tst \rx, #1 @ mmu enabled?
17 moveq \rx, #0xff000000 @ physical 17 moveq \rx, #0xff000000 @ physical
diff --git a/include/asm-arm/arch-iop33x/dma.h b/include/asm-arm/arch-iop33x/dma.h
index d577ca59f4b0..b7775fdc5ad3 100644
--- a/include/asm-arm/arch-iop33x/dma.h
+++ b/include/asm-arm/arch-iop33x/dma.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/include/asm-arm/arch-iop33x/dma.h 2 * include/asm-arm/arch-iop33x/dma.h
3 * 3 *
4 * Copyright (C) 2004 Intel Corp. 4 * Copyright (C) 2004 Intel Corp.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
diff --git a/include/asm-arm/arch-iop33x/entry-macro.S b/include/asm-arm/arch-iop33x/entry-macro.S
index 4750e98e9b4a..92b791702e34 100644
--- a/include/asm-arm/arch-iop33x/entry-macro.S
+++ b/include/asm-arm/arch-iop33x/entry-macro.S
@@ -3,16 +3,16 @@
3 * 3 *
4 * Low-level IRQ helper macros for IOP33x-based platforms 4 * Low-level IRQ helper macros for IOP33x-based platforms
5 * 5 *
6 * This file is licensed under the terms of the GNU General Public 6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any 7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <asm/arch/irqs.h> 10#include <asm/arch/iop33x.h>
11 11
12 .macro disable_fiq 12 .macro disable_fiq
13 .endm 13 .endm
14 14
15 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 15 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
16 ldr \base, =IOP3XX_REG_ADDR(0x07C8) 16 ldr \base, =IOP3XX_REG_ADDR(0x07C8)
17 ldr \irqstat, [\base] @ Read IINTVEC 17 ldr \irqstat, [\base] @ Read IINTVEC
18 cmp \irqstat, #0 18 cmp \irqstat, #0
diff --git a/include/asm-arm/arch-iop33x/hardware.h b/include/asm-arm/arch-iop33x/hardware.h
index 3ebfdc6fea99..0659cf94d040 100644
--- a/include/asm-arm/arch-iop33x/hardware.h
+++ b/include/asm-arm/arch-iop33x/hardware.h
@@ -1,8 +1,9 @@
1/* 1/*
2 * linux/include/asm-arm/arch-iop33x/hardware.h 2 * include/asm-arm/arch-iop33x/hardware.h
3 */ 3 */
4#ifndef __ASM_ARCH_HARDWARE_H 4
5#define __ASM_ARCH_HARDWARE_H 5#ifndef __HARDWARE_H
6#define __HARDWARE_H
6 7
7#include <asm/types.h> 8#include <asm/types.h>
8 9
@@ -15,14 +16,15 @@
15 * The PCI IO space is located at virtual 0xfe000000 from physical 16 * The PCI IO space is located at virtual 0xfe000000 from physical
16 * 0x90000000. The PCI BARs must be programmed with physical addresses, 17 * 0x90000000. The PCI BARs must be programmed with physical addresses,
17 * but when we read them, we convert them to virtual addresses. See 18 * but when we read them, we convert them to virtual addresses. See
18 * arch/arm/mach-iop33x/pci.c 19 * arch/arm/mach-iop3xx/iop3xx-pci.c
19 */ 20 */
20 21#define pcibios_assign_all_busses() 1
21#define pcibios_assign_all_busses() 1
22#define PCIBIOS_MIN_IO 0x00000000 22#define PCIBIOS_MIN_IO 0x00000000
23#define PCIBIOS_MIN_MEM 0x00000000 23#define PCIBIOS_MIN_MEM 0x00000000
24 24
25#ifndef __ASSEMBLY__ 25#ifndef __ASSEMBLY__
26void iop33x_init_irq(void);
27
26extern struct platform_device iop33x_uart0_device; 28extern struct platform_device iop33x_uart0_device;
27extern struct platform_device iop33x_uart1_device; 29extern struct platform_device iop33x_uart1_device;
28#endif 30#endif
@@ -32,7 +34,7 @@ extern struct platform_device iop33x_uart1_device;
32 * Generic chipset bits 34 * Generic chipset bits
33 * 35 *
34 */ 36 */
35#include "iop331.h" 37#include "iop33x.h"
36 38
37/* 39/*
38 * Board specific bits 40 * Board specific bits
@@ -40,4 +42,5 @@ extern struct platform_device iop33x_uart1_device;
40#include "iq80331.h" 42#include "iq80331.h"
41#include "iq80332.h" 43#include "iq80332.h"
42 44
43#endif /* _ASM_ARCH_HARDWARE_H */ 45
46#endif
diff --git a/include/asm-arm/arch-iop33x/io.h b/include/asm-arm/arch-iop33x/io.h
index a9949d5d4953..c017402bab96 100644
--- a/include/asm-arm/arch-iop33x/io.h
+++ b/include/asm-arm/arch-iop33x/io.h
@@ -1,21 +1,21 @@
1/* 1/*
2 * linux/include/asm-arm/arch-iop33x/io.h 2 * include/asm-arm/arch-iop33x/io.h
3 * 3 *
4 * Copyright (C) 2001 MontaVista Software, Inc. 4 * Copyright (C) 2001 MontaVista Software, Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#ifndef __ASM_ARM_ARCH_IO_H 11#ifndef __IO_H
12#define __ASM_ARM_ARCH_IO_H 12#define __IO_H
13 13
14#include <asm/hardware.h> 14#include <asm/hardware.h>
15 15
16#define IO_SPACE_LIMIT 0xffffffff 16#define IO_SPACE_LIMIT 0xffffffff
17
18#define __io(p) ((void __iomem *)(p)) 17#define __io(p) ((void __iomem *)(p))
19#define __mem_pci(a) (a) 18#define __mem_pci(a) (a)
20 19
20
21#endif 21#endif
diff --git a/include/asm-arm/arch-iop33x/iop331.h b/include/asm-arm/arch-iop33x/iop331.h
deleted file mode 100644
index 8c7ec583615f..000000000000
--- a/include/asm-arm/arch-iop33x/iop331.h
+++ /dev/null
@@ -1,110 +0,0 @@
1/*
2 * linux/include/asm/arch-iop33x/iop331.h
3 *
4 * Intel IOP331 Chip definitions
5 *
6 * Author: Dave Jiang (dave.jiang@intel.com)
7 * Copyright (C) 2003, 2004 Intel Corp.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef _IOP331_HW_H_
15#define _IOP331_HW_H_
16
17
18/*
19 * This is needed for mixed drivers that need to work on all
20 * IOP3xx variants but behave slightly differently on each.
21 */
22#ifndef __ASSEMBLY__
23#define iop_is_331() 1
24#endif
25
26/*
27 * IOP331 chipset registers
28 */
29#define IOP331_VIRT_MEM_BASE 0xfeffe000 /* chip virtual mem address*/
30#define IOP331_PHYS_MEM_BASE 0xffffe000 /* chip physical memory address */
31#define IOP331_REG_ADDR(reg) (IOP331_VIRT_MEM_BASE | (reg))
32
33/* Reserved 0x00000000 through 0x000000FF */
34
35/* Address Translation Unit 0x00000100 through 0x000001FF */
36
37/* Messaging Unit 0x00000300 through 0x000003FF */
38
39/* DMA Controller 0x00000400 through 0x000004FF */
40
41/* Memory controller 0x00000500 through 0x0005FF */
42
43/* Peripheral bus interface unit 0x00000680 through 0x0006FF */
44
45/* Peripheral performance monitoring unit 0x00000700 through 0x00077F */
46/* Internal arbitration unit 0x00000780 through 0x0007BF */
47
48/* Interrupt Controller */
49#define IOP331_INTCTL0 (volatile u32 *)IOP331_REG_ADDR(0x00000790)
50#define IOP331_INTCTL1 (volatile u32 *)IOP331_REG_ADDR(0x00000794)
51#define IOP331_INTSTR0 (volatile u32 *)IOP331_REG_ADDR(0x00000798)
52#define IOP331_INTSTR1 (volatile u32 *)IOP331_REG_ADDR(0x0000079C)
53#define IOP331_IINTSRC0 (volatile u32 *)IOP331_REG_ADDR(0x000007A0)
54#define IOP331_IINTSRC1 (volatile u32 *)IOP331_REG_ADDR(0x000007A4)
55#define IOP331_FINTSRC0 (volatile u32 *)IOP331_REG_ADDR(0x000007A8)
56#define IOP331_FINTSRC1 (volatile u32 *)IOP331_REG_ADDR(0x000007AC)
57#define IOP331_IPR0 (volatile u32 *)IOP331_REG_ADDR(0x000007B0)
58#define IOP331_IPR1 (volatile u32 *)IOP331_REG_ADDR(0x000007B4)
59#define IOP331_IPR2 (volatile u32 *)IOP331_REG_ADDR(0x000007B8)
60#define IOP331_IPR3 (volatile u32 *)IOP331_REG_ADDR(0x000007BC)
61#define IOP331_INTBASE (volatile u32 *)IOP331_REG_ADDR(0x000007C0)
62#define IOP331_INTSIZE (volatile u32 *)IOP331_REG_ADDR(0x000007C4)
63#define IOP331_IINTVEC (volatile u32 *)IOP331_REG_ADDR(0x000007C8)
64#define IOP331_FINTVEC (volatile u32 *)IOP331_REG_ADDR(0x000007CC)
65
66
67/* Application accelerator unit 0x00000800 - 0x000008FF */
68
69#define IOP331_SPDSCR (volatile u32 *)IOP331_REG_ADDR(0x000015C0)
70#define IOP331_PPDSCR (volatile u32 *)IOP331_REG_ADDR(0x000015C8)
71/* SSP serial port unit 0x00001600 - 0x0000167F */
72
73/* I2C bus interface unit 0x00001680 - 0x000016FF */
74
75/* 0x00001700 through 0x0000172C UART 0 */
76
77/* Reserved 0x00001730 through 0x0000173F */
78
79/* 0x00001740 through 0x0000176C UART 1 */
80
81#define IOP331_UART0_PHYS (IOP331_PHYS_MEM_BASE | 0x00001700) /* UART #1 physical */
82#define IOP331_UART1_PHYS (IOP331_PHYS_MEM_BASE | 0x00001740) /* UART #2 physical */
83#define IOP331_UART0_VIRT (IOP331_VIRT_MEM_BASE | 0x00001700) /* UART #1 virtual addr */
84#define IOP331_UART1_VIRT (IOP331_VIRT_MEM_BASE | 0x00001740) /* UART #2 virtual addr */
85
86/* Reserved 0x00001770 through 0x0000177F */
87
88/* General Purpose I/O Registers */
89#define IOP331_GPOE (volatile u32 *)IOP331_REG_ADDR(0x00001780)
90#define IOP331_GPID (volatile u32 *)IOP331_REG_ADDR(0x00001784)
91#define IOP331_GPOD (volatile u32 *)IOP331_REG_ADDR(0x00001788)
92
93/* Reserved 0x0000178c through 0x000019ff */
94
95/*
96 * Peripherals that are shared between the iop32x and iop33x but
97 * located at different addresses.
98 */
99#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1780 + (reg))
100#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07d0 + (reg))
101
102#include <asm/hardware/iop3xx.h>
103
104
105#ifndef __ASSEMBLY__
106extern void iop331_init_irq(void);
107extern void iop331_time_init(void);
108#endif
109
110#endif // _IOP331_HW_H_
diff --git a/include/asm-arm/arch-iop33x/iop33x.h b/include/asm-arm/arch-iop33x/iop33x.h
new file mode 100644
index 000000000000..7ac6e93db5ff
--- /dev/null
+++ b/include/asm-arm/arch-iop33x/iop33x.h
@@ -0,0 +1,33 @@
1/*
2 * include/asm-arm/arch-iop33x/iop33x.h
3 *
4 * Intel IOP33X Chip definitions
5 *
6 * Author: Dave Jiang (dave.jiang@intel.com)
7 * Copyright (C) 2003, 2004 Intel Corp.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __IOP33X_H
15#define __IOP33X_H
16
17/*
18 * Peripherals that are shared between the iop32x and iop33x but
19 * located at different addresses.
20 */
21#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1780 + (reg))
22#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07d0 + (reg))
23
24#include <asm/hardware/iop3xx.h>
25
26/* UARTs */
27#define IOP33X_UART0_PHYS (IOP3XX_PERIPHERAL_PHYS_BASE + 0x1700)
28#define IOP33X_UART0_VIRT (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1700)
29#define IOP33X_UART1_PHYS (IOP3XX_PERIPHERAL_PHYS_BASE + 0x1740)
30#define IOP33X_UART1_VIRT (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1740)
31
32
33#endif
diff --git a/include/asm-arm/arch-iop33x/iq80331.h b/include/asm-arm/arch-iop33x/iq80331.h
index 186762bf8944..79b9302017ea 100644
--- a/include/asm-arm/arch-iop33x/iq80331.h
+++ b/include/asm-arm/arch-iop33x/iq80331.h
@@ -1,11 +1,11 @@
1/* 1/*
2 * linux/include/asm/arch-iop33x/iq80331.h 2 * include/asm-arm/arch-iop33x/iq80331.h
3 * 3 *
4 * Intel IQ80331 evaluation board registers 4 * Intel IQ80331 evaluation board registers
5 */ 5 */
6 6
7#ifndef _IQ80331_H_ 7#ifndef __IQ80331_H
8#define _IQ80331_H_ 8#define __IQ80331_H
9 9
10#define IQ80331_7SEG_1 0xce840000 /* 7-Segment MSB */ 10#define IQ80331_7SEG_1 0xce840000 /* 7-Segment MSB */
11#define IQ80331_7SEG_0 0xce850000 /* 7-Segment LSB (WO) */ 11#define IQ80331_7SEG_0 0xce850000 /* 7-Segment LSB (WO) */
@@ -13,4 +13,4 @@
13#define IQ80331_BATT_STAT 0xce8f0000 /* Battery Status */ 13#define IQ80331_BATT_STAT 0xce8f0000 /* Battery Status */
14 14
15 15
16#endif // _IQ80331_H_ 16#endif
diff --git a/include/asm-arm/arch-iop33x/iq80332.h b/include/asm-arm/arch-iop33x/iq80332.h
index 2a5d4ee01df9..053165629492 100644
--- a/include/asm-arm/arch-iop33x/iq80332.h
+++ b/include/asm-arm/arch-iop33x/iq80332.h
@@ -1,11 +1,11 @@
1/* 1/*
2 * linux/include/asm/arch-iop33x/iq80332.h 2 * include/asm-arm/arch-iop33x/iq80332.h
3 * 3 *
4 * Intel IQ80332 evaluation board registers 4 * Intel IQ80332 evaluation board registers
5 */ 5 */
6 6
7#ifndef _IQ80332_H_ 7#ifndef __IQ80332_H
8#define _IQ80332_H_ 8#define __IQ80332_H
9 9
10#define IQ80332_7SEG_1 0xce840000 /* 7-Segment MSB */ 10#define IQ80332_7SEG_1 0xce840000 /* 7-Segment MSB */
11#define IQ80332_7SEG_0 0xce850000 /* 7-Segment LSB (WO) */ 11#define IQ80332_7SEG_0 0xce850000 /* 7-Segment LSB (WO) */
@@ -13,4 +13,4 @@
13#define IQ80332_BATT_STAT 0xce8f0000 /* Battery Status */ 13#define IQ80332_BATT_STAT 0xce8f0000 /* Battery Status */
14 14
15 15
16#endif // _IQ80332_H_ 16#endif
diff --git a/include/asm-arm/arch-iop33x/irqs.h b/include/asm-arm/arch-iop33x/irqs.h
index a875404a07fc..d045f8403396 100644
--- a/include/asm-arm/arch-iop33x/irqs.h
+++ b/include/asm-arm/arch-iop33x/irqs.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/include/asm-arm/arch-iop33x/irqs.h 2 * include/asm-arm/arch-iop33x/irqs.h
3 * 3 *
4 * Author: Dave Jiang (dave.jiang@intel.com) 4 * Author: Dave Jiang (dave.jiang@intel.com)
5 * Copyright: (C) 2003 Intel Corp. 5 * Copyright: (C) 2003 Intel Corp.
@@ -7,54 +7,54 @@
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 *
11 */ 10 */
12#ifndef _IRQS_H_ 11
13#define _IRQS_H_ 12#ifndef __IRQS_H
13#define __IRQS_H
14 14
15/* 15/*
16 * IOP80331 chipset interrupts 16 * IOP80331 chipset interrupts
17 */ 17 */
18#define IRQ_IOP331_DMA0_EOT 0 18#define IRQ_IOP33X_DMA0_EOT 0
19#define IRQ_IOP331_DMA0_EOC 1 19#define IRQ_IOP33X_DMA0_EOC 1
20#define IRQ_IOP331_DMA1_EOT 2 20#define IRQ_IOP33X_DMA1_EOT 2
21#define IRQ_IOP331_DMA1_EOC 3 21#define IRQ_IOP33X_DMA1_EOC 3
22#define IRQ_IOP331_AA_EOT 6 22#define IRQ_IOP33X_AA_EOT 6
23#define IRQ_IOP331_AA_EOC 7 23#define IRQ_IOP33X_AA_EOC 7
24#define IRQ_IOP331_TIMER0 8 24#define IRQ_IOP33X_TIMER0 8
25#define IRQ_IOP331_TIMER1 9 25#define IRQ_IOP33X_TIMER1 9
26#define IRQ_IOP331_I2C_0 10 26#define IRQ_IOP33X_I2C_0 10
27#define IRQ_IOP331_I2C_1 11 27#define IRQ_IOP33X_I2C_1 11
28#define IRQ_IOP331_MSG 12 28#define IRQ_IOP33X_MSG 12
29#define IRQ_IOP331_MSGIBQ 13 29#define IRQ_IOP33X_MSGIBQ 13
30#define IRQ_IOP331_ATU_BIST 14 30#define IRQ_IOP33X_ATU_BIST 14
31#define IRQ_IOP331_PERFMON 15 31#define IRQ_IOP33X_PERFMON 15
32#define IRQ_IOP331_CORE_PMU 16 32#define IRQ_IOP33X_CORE_PMU 16
33#define IRQ_IOP331_XINT0 24 33#define IRQ_IOP33X_XINT0 24
34#define IRQ_IOP331_XINT1 25 34#define IRQ_IOP33X_XINT1 25
35#define IRQ_IOP331_XINT2 26 35#define IRQ_IOP33X_XINT2 26
36#define IRQ_IOP331_XINT3 27 36#define IRQ_IOP33X_XINT3 27
37#define IRQ_IOP331_XINT8 32 37#define IRQ_IOP33X_XINT8 32
38#define IRQ_IOP331_XINT9 33 38#define IRQ_IOP33X_XINT9 33
39#define IRQ_IOP331_XINT10 34 39#define IRQ_IOP33X_XINT10 34
40#define IRQ_IOP331_XINT11 35 40#define IRQ_IOP33X_XINT11 35
41#define IRQ_IOP331_XINT12 36 41#define IRQ_IOP33X_XINT12 36
42#define IRQ_IOP331_XINT13 37 42#define IRQ_IOP33X_XINT13 37
43#define IRQ_IOP331_XINT14 38 43#define IRQ_IOP33X_XINT14 38
44#define IRQ_IOP331_XINT15 39 44#define IRQ_IOP33X_XINT15 39
45#define IRQ_IOP331_UART0 51 45#define IRQ_IOP33X_UART0 51
46#define IRQ_IOP331_UART1 52 46#define IRQ_IOP33X_UART1 52
47#define IRQ_IOP331_PBIE 53 47#define IRQ_IOP33X_PBIE 53
48#define IRQ_IOP331_ATU_CRW 54 48#define IRQ_IOP33X_ATU_CRW 54
49#define IRQ_IOP331_ATU_ERR 55 49#define IRQ_IOP33X_ATU_ERR 55
50#define IRQ_IOP331_MCU_ERR 56 50#define IRQ_IOP33X_MCU_ERR 56
51#define IRQ_IOP331_DMA0_ERR 57 51#define IRQ_IOP33X_DMA0_ERR 57
52#define IRQ_IOP331_DMA1_ERR 58 52#define IRQ_IOP33X_DMA1_ERR 58
53#define IRQ_IOP331_AA_ERR 60 53#define IRQ_IOP33X_AA_ERR 60
54#define IRQ_IOP331_MSG_ERR 62 54#define IRQ_IOP33X_MSG_ERR 62
55#define IRQ_IOP331_HPI 63 55#define IRQ_IOP33X_HPI 63
56 56
57#define NR_IRQS 64 57#define NR_IRQS 64
58 58
59 59
60#endif // _IRQ_H_ 60#endif
diff --git a/include/asm-arm/arch-iop33x/memory.h b/include/asm-arm/arch-iop33x/memory.h
index de208d2cca4e..0d39139b241e 100644
--- a/include/asm-arm/arch-iop33x/memory.h
+++ b/include/asm-arm/arch-iop33x/memory.h
@@ -1,9 +1,9 @@
1/* 1/*
2 * linux/include/asm-arm/arch-iop33x/memory.h 2 * include/asm-arm/arch-iop33x/memory.h
3 */ 3 */
4 4
5#ifndef __ASM_ARCH_MEMORY_H 5#ifndef __MEMORY_H
6#define __ASM_ARCH_MEMORY_H 6#define __MEMORY_H
7 7
8#include <asm/hardware.h> 8#include <asm/hardware.h>
9 9
diff --git a/include/asm-arm/arch-iop33x/system.h b/include/asm-arm/arch-iop33x/system.h
index 8270ad9f86c8..00dd07ece262 100644
--- a/include/asm-arm/arch-iop33x/system.h
+++ b/include/asm-arm/arch-iop33x/system.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/include/asm-arm/arch-iop33x/system.h 2 * include/asm-arm/arch-iop33x/system.h
3 * 3 *
4 * Copyright (C) 2001 MontaVista Software, Inc. 4 * Copyright (C) 2001 MontaVista Software, Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
@@ -13,17 +13,10 @@ static inline void arch_idle(void)
13 cpu_do_idle(); 13 cpu_do_idle();
14} 14}
15 15
16
17static inline void arch_reset(char mode) 16static inline void arch_reset(char mode)
18{ 17{
19 *IOP3XX_PCSR = 0x30; 18 *IOP3XX_PCSR = 0x30;
20 19
21 if ( 1 && mode == 's') { 20 /* Jump into ROM at address 0 */
22 /* Jump into ROM at address 0 */ 21 cpu_reset(0);
23 cpu_reset(0);
24 } else {
25 /* No on-chip reset capability */
26 cpu_reset(0);
27 }
28} 22}
29
diff --git a/include/asm-arm/arch-iop33x/timex.h b/include/asm-arm/arch-iop33x/timex.h
index 8994322a09f4..fe3e1e369ff9 100644
--- a/include/asm-arm/arch-iop33x/timex.h
+++ b/include/asm-arm/arch-iop33x/timex.h
@@ -1,8 +1,9 @@
1/* 1/*
2 * linux/include/asm-arm/arch-iop33x/timex.h 2 * include/asm-arm/arch-iop33x/timex.h
3 * 3 *
4 * IOP3xx architecture timex specifications 4 * IOP3xx architecture timex specifications
5 */ 5 */
6
6#include <asm/hardware.h> 7#include <asm/hardware.h>
7 8
8#define CLOCK_TICK_RATE (100 * HZ) 9#define CLOCK_TICK_RATE (100 * HZ)
diff --git a/include/asm-arm/arch-iop33x/uncompress.h b/include/asm-arm/arch-iop33x/uncompress.h
index 62904ae3b038..e17fbc05877b 100644
--- a/include/asm-arm/arch-iop33x/uncompress.h
+++ b/include/asm-arm/arch-iop33x/uncompress.h
@@ -1,6 +1,7 @@
1/* 1/*
2 * linux/include/asm-arm/arch-iop33x/uncompress.h 2 * include/asm-arm/arch-iop33x/uncompress.h
3 */ 3 */
4
4#include <asm/types.h> 5#include <asm/types.h>
5#include <asm/mach-types.h> 6#include <asm/mach-types.h>
6#include <linux/serial_reg.h> 7#include <linux/serial_reg.h>
@@ -8,13 +9,13 @@
8 9
9static volatile u32 *uart_base; 10static volatile u32 *uart_base;
10 11
11#define TX_DONE (UART_LSR_TEMT|UART_LSR_THRE) 12#define TX_DONE (UART_LSR_TEMT | UART_LSR_THRE)
12 13
13static inline void putc(char c) 14static inline void putc(char c)
14{ 15{
15 while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE) 16 while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
16 barrier(); 17 barrier();
17 *uart_base = c; 18 uart_base[UART_TX] = c;
18} 19}
19 20
20static inline void flush(void) 21static inline void flush(void)
@@ -24,7 +25,7 @@ static inline void flush(void)
24static __inline__ void __arch_decomp_setup(unsigned long arch_id) 25static __inline__ void __arch_decomp_setup(unsigned long arch_id)
25{ 26{
26 if (machine_is_iq80331() || machine_is_iq80332()) 27 if (machine_is_iq80331() || machine_is_iq80332())
27 uart_base = (volatile u32 *)IOP331_UART0_PHYS; 28 uart_base = (volatile u32 *)IOP33X_UART0_PHYS;
28 else 29 else
29 uart_base = (volatile u32 *)0xfe800000; 30 uart_base = (volatile u32 *)0xfe800000;
30} 31}
diff --git a/include/asm-arm/arch-iop33x/vmalloc.h b/include/asm-arm/arch-iop33x/vmalloc.h
index b5092027449e..66f545a7f4fc 100644
--- a/include/asm-arm/arch-iop33x/vmalloc.h
+++ b/include/asm-arm/arch-iop33x/vmalloc.h
@@ -1,16 +1,5 @@
1/* 1/*
2 * linux/include/asm-arm/arch-iop33x/vmalloc.h 2 * include/asm-arm/arch-iop33x/vmalloc.h
3 */ 3 */
4 4
5/* 5#define VMALLOC_END 0xfe000000
6 * Just any arbitrary offset to the start of the vmalloc VM area: the
7 * current 8MB value just means that there will be a 8MB "hole" after the
8 * physical memory until the kernel virtual memory starts. That means that
9 * any out-of-bounds memory accesses will hopefully be caught.
10 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
11 * area for the same reason. ;)
12 */
13//#define VMALLOC_END (0xe8000000)
14/* increase usable physical RAM to ~992M per RMK */
15#define VMALLOC_END (0xfe000000)
16
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-22 10:38:33 -0500