diff options
Diffstat (limited to 'include/asm-arm/arch-iop33x/iop331.h')
| -rw-r--r-- | include/asm-arm/arch-iop33x/iop331.h | 110 |
1 files changed, 0 insertions, 110 deletions
diff --git a/include/asm-arm/arch-iop33x/iop331.h b/include/asm-arm/arch-iop33x/iop331.h deleted file mode 100644 index 8c7ec583615f..000000000000 --- a/include/asm-arm/arch-iop33x/iop331.h +++ /dev/null | |||
| @@ -1,110 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * linux/include/asm/arch-iop33x/iop331.h | ||
| 3 | * | ||
| 4 | * Intel IOP331 Chip definitions | ||
| 5 | * | ||
| 6 | * Author: Dave Jiang (dave.jiang@intel.com) | ||
| 7 | * Copyright (C) 2003, 2004 Intel Corp. | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #ifndef _IOP331_HW_H_ | ||
| 15 | #define _IOP331_HW_H_ | ||
| 16 | |||
| 17 | |||
| 18 | /* | ||
| 19 | * This is needed for mixed drivers that need to work on all | ||
| 20 | * IOP3xx variants but behave slightly differently on each. | ||
| 21 | */ | ||
| 22 | #ifndef __ASSEMBLY__ | ||
| 23 | #define iop_is_331() 1 | ||
| 24 | #endif | ||
| 25 | |||
| 26 | /* | ||
| 27 | * IOP331 chipset registers | ||
| 28 | */ | ||
| 29 | #define IOP331_VIRT_MEM_BASE 0xfeffe000 /* chip virtual mem address*/ | ||
| 30 | #define IOP331_PHYS_MEM_BASE 0xffffe000 /* chip physical memory address */ | ||
| 31 | #define IOP331_REG_ADDR(reg) (IOP331_VIRT_MEM_BASE | (reg)) | ||
| 32 | |||
| 33 | /* Reserved 0x00000000 through 0x000000FF */ | ||
| 34 | |||
| 35 | /* Address Translation Unit 0x00000100 through 0x000001FF */ | ||
| 36 | |||
| 37 | /* Messaging Unit 0x00000300 through 0x000003FF */ | ||
| 38 | |||
| 39 | /* DMA Controller 0x00000400 through 0x000004FF */ | ||
| 40 | |||
| 41 | /* Memory controller 0x00000500 through 0x0005FF */ | ||
| 42 | |||
| 43 | /* Peripheral bus interface unit 0x00000680 through 0x0006FF */ | ||
| 44 | |||
| 45 | /* Peripheral performance monitoring unit 0x00000700 through 0x00077F */ | ||
| 46 | /* Internal arbitration unit 0x00000780 through 0x0007BF */ | ||
| 47 | |||
| 48 | /* Interrupt Controller */ | ||
| 49 | #define IOP331_INTCTL0 (volatile u32 *)IOP331_REG_ADDR(0x00000790) | ||
| 50 | #define IOP331_INTCTL1 (volatile u32 *)IOP331_REG_ADDR(0x00000794) | ||
| 51 | #define IOP331_INTSTR0 (volatile u32 *)IOP331_REG_ADDR(0x00000798) | ||
| 52 | #define IOP331_INTSTR1 (volatile u32 *)IOP331_REG_ADDR(0x0000079C) | ||
| 53 | #define IOP331_IINTSRC0 (volatile u32 *)IOP331_REG_ADDR(0x000007A0) | ||
| 54 | #define IOP331_IINTSRC1 (volatile u32 *)IOP331_REG_ADDR(0x000007A4) | ||
| 55 | #define IOP331_FINTSRC0 (volatile u32 *)IOP331_REG_ADDR(0x000007A8) | ||
| 56 | #define IOP331_FINTSRC1 (volatile u32 *)IOP331_REG_ADDR(0x000007AC) | ||
| 57 | #define IOP331_IPR0 (volatile u32 *)IOP331_REG_ADDR(0x000007B0) | ||
| 58 | #define IOP331_IPR1 (volatile u32 *)IOP331_REG_ADDR(0x000007B4) | ||
| 59 | #define IOP331_IPR2 (volatile u32 *)IOP331_REG_ADDR(0x000007B8) | ||
| 60 | #define IOP331_IPR3 (volatile u32 *)IOP331_REG_ADDR(0x000007BC) | ||
| 61 | #define IOP331_INTBASE (volatile u32 *)IOP331_REG_ADDR(0x000007C0) | ||
| 62 | #define IOP331_INTSIZE (volatile u32 *)IOP331_REG_ADDR(0x000007C4) | ||
| 63 | #define IOP331_IINTVEC (volatile u32 *)IOP331_REG_ADDR(0x000007C8) | ||
| 64 | #define IOP331_FINTVEC (volatile u32 *)IOP331_REG_ADDR(0x000007CC) | ||
| 65 | |||
| 66 | |||
| 67 | /* Application accelerator unit 0x00000800 - 0x000008FF */ | ||
| 68 | |||
| 69 | #define IOP331_SPDSCR (volatile u32 *)IOP331_REG_ADDR(0x000015C0) | ||
| 70 | #define IOP331_PPDSCR (volatile u32 *)IOP331_REG_ADDR(0x000015C8) | ||
| 71 | /* SSP serial port unit 0x00001600 - 0x0000167F */ | ||
| 72 | |||
| 73 | /* I2C bus interface unit 0x00001680 - 0x000016FF */ | ||
| 74 | |||
| 75 | /* 0x00001700 through 0x0000172C UART 0 */ | ||
| 76 | |||
| 77 | /* Reserved 0x00001730 through 0x0000173F */ | ||
| 78 | |||
| 79 | /* 0x00001740 through 0x0000176C UART 1 */ | ||
| 80 | |||
| 81 | #define IOP331_UART0_PHYS (IOP331_PHYS_MEM_BASE | 0x00001700) /* UART #1 physical */ | ||
| 82 | #define IOP331_UART1_PHYS (IOP331_PHYS_MEM_BASE | 0x00001740) /* UART #2 physical */ | ||
| 83 | #define IOP331_UART0_VIRT (IOP331_VIRT_MEM_BASE | 0x00001700) /* UART #1 virtual addr */ | ||
| 84 | #define IOP331_UART1_VIRT (IOP331_VIRT_MEM_BASE | 0x00001740) /* UART #2 virtual addr */ | ||
| 85 | |||
| 86 | /* Reserved 0x00001770 through 0x0000177F */ | ||
| 87 | |||
| 88 | /* General Purpose I/O Registers */ | ||
| 89 | #define IOP331_GPOE (volatile u32 *)IOP331_REG_ADDR(0x00001780) | ||
| 90 | #define IOP331_GPID (volatile u32 *)IOP331_REG_ADDR(0x00001784) | ||
| 91 | #define IOP331_GPOD (volatile u32 *)IOP331_REG_ADDR(0x00001788) | ||
| 92 | |||
| 93 | /* Reserved 0x0000178c through 0x000019ff */ | ||
| 94 | |||
| 95 | /* | ||
| 96 | * Peripherals that are shared between the iop32x and iop33x but | ||
| 97 | * located at different addresses. | ||
| 98 | */ | ||
| 99 | #define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1780 + (reg)) | ||
| 100 | #define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07d0 + (reg)) | ||
| 101 | |||
| 102 | #include <asm/hardware/iop3xx.h> | ||
| 103 | |||
| 104 | |||
| 105 | #ifndef __ASSEMBLY__ | ||
| 106 | extern void iop331_init_irq(void); | ||
| 107 | extern void iop331_time_init(void); | ||
| 108 | #endif | ||
| 109 | |||
| 110 | #endif // _IOP331_HW_H_ | ||