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-rw-r--r--include/asm-arm/arch-iop32x/entry-macro.S33
-rw-r--r--include/asm-arm/arch-iop32x/time.h4
2 files changed, 28 insertions, 9 deletions
diff --git a/include/asm-arm/arch-iop32x/entry-macro.S b/include/asm-arm/arch-iop32x/entry-macro.S
index 1500cbbd2295..207db99dfbd2 100644
--- a/include/asm-arm/arch-iop32x/entry-macro.S
+++ b/include/asm-arm/arch-iop32x/entry-macro.S
@@ -9,13 +9,28 @@
9 */ 9 */
10#include <asm/arch/iop32x.h> 10#include <asm/arch/iop32x.h>
11 11
12 .macro disable_fiq 12 .macro disable_fiq
13 .endm 13 .endm
14 14
15 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 15 .macro get_irqnr_preamble, base, tmp
16 ldr \base, =IOP3XX_REG_ADDR(0x07D8) 16 mrc p15, 0, \tmp, c15, c1, 0
17 ldr \irqstat, [\base] @ Read IINTSRC 17 orr \tmp, \tmp, #(1 << 6)
18 cmp \irqstat, #0 18 mcr p15, 0, \tmp, c15, c1, 0 @ Enable cp6 access
19 clzne \irqnr, \irqstat 19 mrc p15, 0, \tmp, c15, c1, 0
20 rsbne \irqnr, \irqnr, #31 20 mov \tmp, \tmp
21 .endm 21 sub pc, pc, #4 @ cp_wait
22 .endm
23
24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
25 mrc p6, 0, \irqstat, c8, c0, 0 @ Read IINTSRC
26 cmp \irqstat, #0
27 clzne \irqnr, \irqstat
28 rsbne \irqnr, \irqnr, #31
29 .endm
30
31 .macro arch_ret_to_user, tmp1, tmp2
32 mrc p15, 0, \tmp1, c15, c1, 0
33 ands \tmp2, \tmp1, #(1 << 6)
34 bicne \tmp1, \tmp1, #(1 << 6)
35 mcrne p15, 0, \tmp1, c15, c1, 0 @ Disable cp6 access
36 .endm
diff --git a/include/asm-arm/arch-iop32x/time.h b/include/asm-arm/arch-iop32x/time.h
new file mode 100644
index 000000000000..0f28c9949623
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/time.h
@@ -0,0 +1,4 @@
1#ifndef _IOP32X_TIME_H_
2#define _IOP32X_TIME_H_
3#define IRQ_IOP_TIMER0 IRQ_IOP32X_TIMER0
4#endif