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-rw-r--r--include/asm-arm/arch-iop32x/debug-macro.S20
-rw-r--r--include/asm-arm/arch-iop32x/dma.h9
-rw-r--r--include/asm-arm/arch-iop32x/entry-macro.S21
-rw-r--r--include/asm-arm/arch-iop32x/glantank.h13
-rw-r--r--include/asm-arm/arch-iop32x/hardware.h44
-rw-r--r--include/asm-arm/arch-iop32x/io.h22
-rw-r--r--include/asm-arm/arch-iop32x/iop32x.h28
-rw-r--r--include/asm-arm/arch-iop32x/iq31244.h17
-rw-r--r--include/asm-arm/arch-iop32x/iq80321.h17
-rw-r--r--include/asm-arm/arch-iop32x/irqs.h50
-rw-r--r--include/asm-arm/arch-iop32x/memory.h26
-rw-r--r--include/asm-arm/arch-iop32x/n2100.h19
-rw-r--r--include/asm-arm/arch-iop32x/system.h33
-rw-r--r--include/asm-arm/arch-iop32x/timex.h9
-rw-r--r--include/asm-arm/arch-iop32x/uncompress.h39
-rw-r--r--include/asm-arm/arch-iop32x/vmalloc.h5
16 files changed, 372 insertions, 0 deletions
diff --git a/include/asm-arm/arch-iop32x/debug-macro.S b/include/asm-arm/arch-iop32x/debug-macro.S
new file mode 100644
index 000000000000..9022b6849e23
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/debug-macro.S
@@ -0,0 +1,20 @@
1/*
2 * include/asm-arm/arch-iop32x/debug-macro.S
3 *
4 * Debugging macro include header
5 *
6 * Copyright (C) 1994-1999 Russell King
7 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14 .macro addruart, rx
15 mov \rx, #0xfe000000 @ physical as well as virtual
16 orr \rx, \rx, #0x00800000 @ location of the UART
17 .endm
18
19#define UART_SHIFT 0
20#include <asm/hardware/debug-8250.S>
diff --git a/include/asm-arm/arch-iop32x/dma.h b/include/asm-arm/arch-iop32x/dma.h
new file mode 100644
index 000000000000..e977a9ef3160
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/dma.h
@@ -0,0 +1,9 @@
1/*
2 * include/asm-arm/arch-iop32x/dma.h
3 *
4 * Copyright (C) 2004 Intel Corp.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
diff --git a/include/asm-arm/arch-iop32x/entry-macro.S b/include/asm-arm/arch-iop32x/entry-macro.S
new file mode 100644
index 000000000000..1500cbbd2295
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/entry-macro.S
@@ -0,0 +1,21 @@
1/*
2 * include/asm-arm/arch-iop32x/entry-macro.S
3 *
4 * Low-level IRQ helper macros for IOP32x-based platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10#include <asm/arch/iop32x.h>
11
12 .macro disable_fiq
13 .endm
14
15 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
16 ldr \base, =IOP3XX_REG_ADDR(0x07D8)
17 ldr \irqstat, [\base] @ Read IINTSRC
18 cmp \irqstat, #0
19 clzne \irqnr, \irqstat
20 rsbne \irqnr, \irqnr, #31
21 .endm
diff --git a/include/asm-arm/arch-iop32x/glantank.h b/include/asm-arm/arch-iop32x/glantank.h
new file mode 100644
index 000000000000..3b065618dd00
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/glantank.h
@@ -0,0 +1,13 @@
1/*
2 * include/asm/arch-iop32x/glantank.h
3 *
4 * IO-Data GLAN Tank board registers
5 */
6
7#ifndef __GLANTANK_H
8#define __GLANTANK_H
9
10#define GLANTANK_UART 0xfe800000 /* UART */
11
12
13#endif
diff --git a/include/asm-arm/arch-iop32x/hardware.h b/include/asm-arm/arch-iop32x/hardware.h
new file mode 100644
index 000000000000..6556ed5eee31
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/hardware.h
@@ -0,0 +1,44 @@
1/*
2 * include/asm-arm/arch-iop32x/hardware.h
3 */
4
5#ifndef __HARDWARE_H
6#define __HARDWARE_H
7
8#include <asm/types.h>
9
10/*
11 * Note about PCI IO space mappings
12 *
13 * To make IO space accesses efficient, we store virtual addresses in
14 * the IO resources.
15 *
16 * The PCI IO space is located at virtual 0xfe000000 from physical
17 * 0x90000000. The PCI BARs must be programmed with physical addresses,
18 * but when we read them, we convert them to virtual addresses. See
19 * arch/arm/plat-iop/pci.c.
20 */
21#define pcibios_assign_all_busses() 1
22#define PCIBIOS_MIN_IO 0x00000000
23#define PCIBIOS_MIN_MEM 0x00000000
24
25#ifndef __ASSEMBLY__
26void iop32x_init_irq(void);
27#endif
28
29
30/*
31 * Generic chipset bits
32 */
33#include "iop32x.h"
34
35/*
36 * Board specific bits
37 */
38#include "glantank.h"
39#include "iq80321.h"
40#include "iq31244.h"
41#include "n2100.h"
42
43
44#endif
diff --git a/include/asm-arm/arch-iop32x/io.h b/include/asm-arm/arch-iop32x/io.h
new file mode 100644
index 000000000000..12d9ee02cde3
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/io.h
@@ -0,0 +1,22 @@
1/*
2 * include/asm-arm/arch-iop32x/io.h
3 *
4 * Copyright (C) 2001 MontaVista Software, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __IO_H
12#define __IO_H
13
14#include <asm/hardware.h>
15
16#define IO_SPACE_LIMIT 0xffffffff
17
18#define __io(p) ((void __iomem *)(p))
19#define __mem_pci(a) (a)
20
21
22#endif
diff --git a/include/asm-arm/arch-iop32x/iop32x.h b/include/asm-arm/arch-iop32x/iop32x.h
new file mode 100644
index 000000000000..4bbd85f3ed2a
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/iop32x.h
@@ -0,0 +1,28 @@
1/*
2 * include/asm-arm/arch-iop32x/iop32x.h
3 *
4 * Intel IOP32X Chip definitions
5 *
6 * Author: Rory Bolt <rorybolt@pacbell.net>
7 * Copyright (C) 2002 Rory Bolt
8 * Copyright (C) 2004 Intel Corp.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#ifndef __IOP32X_H
16#define __IOP32X_H
17
18/*
19 * Peripherals that are shared between the iop32x and iop33x but
20 * located at different addresses.
21 */
22#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c0 + (reg))
23#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg))
24
25#include <asm/hardware/iop3xx.h>
26
27
28#endif
diff --git a/include/asm-arm/arch-iop32x/iq31244.h b/include/asm-arm/arch-iop32x/iq31244.h
new file mode 100644
index 000000000000..fff4eafa1f6b
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/iq31244.h
@@ -0,0 +1,17 @@
1/*
2 * include/asm-arm/arch-iop32x/iq31244.h
3 *
4 * Intel IQ31244 evaluation board registers
5 */
6
7#ifndef __IQ31244_H
8#define __IQ31244_H
9
10#define IQ31244_UART 0xfe800000 /* UART #1 */
11#define IQ31244_7SEG_1 0xfe840000 /* 7-Segment MSB */
12#define IQ31244_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */
13#define IQ31244_ROTARY_SW 0xfe8d0000 /* Rotary Switch */
14#define IQ31244_BATT_STAT 0xfe8f0000 /* Battery Status */
15
16
17#endif
diff --git a/include/asm-arm/arch-iop32x/iq80321.h b/include/asm-arm/arch-iop32x/iq80321.h
new file mode 100644
index 000000000000..eb69db9b9a06
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/iq80321.h
@@ -0,0 +1,17 @@
1/*
2 * include/asm-arm/arch-iop32x/iq80321.h
3 *
4 * Intel IQ80321 evaluation board registers
5 */
6
7#ifndef __IQ80321_H
8#define __IQ80321_H
9
10#define IQ80321_UART 0xfe800000 /* UART #1 */
11#define IQ80321_7SEG_1 0xfe840000 /* 7-Segment MSB */
12#define IQ80321_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */
13#define IQ80321_ROTARY_SW 0xfe8d0000 /* Rotary Switch */
14#define IQ80321_BATT_STAT 0xfe8f0000 /* Battery Status */
15
16
17#endif
diff --git a/include/asm-arm/arch-iop32x/irqs.h b/include/asm-arm/arch-iop32x/irqs.h
new file mode 100644
index 000000000000..bbaef873afce
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/irqs.h
@@ -0,0 +1,50 @@
1/*
2 * include/asm-arm/arch-iop32x/irqs.h
3 *
4 * Author: Rory Bolt <rorybolt@pacbell.net>
5 * Copyright: (C) 2002 Rory Bolt
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __IRQS_H
13#define __IRQS_H
14
15/*
16 * IOP80321 chipset interrupts
17 */
18#define IRQ_IOP32X_DMA0_EOT 0
19#define IRQ_IOP32X_DMA0_EOC 1
20#define IRQ_IOP32X_DMA1_EOT 2
21#define IRQ_IOP32X_DMA1_EOC 3
22#define IRQ_IOP32X_AA_EOT 6
23#define IRQ_IOP32X_AA_EOC 7
24#define IRQ_IOP32X_CORE_PMON 8
25#define IRQ_IOP32X_TIMER0 9
26#define IRQ_IOP32X_TIMER1 10
27#define IRQ_IOP32X_I2C_0 11
28#define IRQ_IOP32X_I2C_1 12
29#define IRQ_IOP32X_MESSAGING 13
30#define IRQ_IOP32X_ATU_BIST 14
31#define IRQ_IOP32X_PERFMON 15
32#define IRQ_IOP32X_CORE_PMU 16
33#define IRQ_IOP32X_BIU_ERR 17
34#define IRQ_IOP32X_ATU_ERR 18
35#define IRQ_IOP32X_MCU_ERR 19
36#define IRQ_IOP32X_DMA0_ERR 20
37#define IRQ_IOP32X_DMA1_ERR 21
38#define IRQ_IOP32X_AA_ERR 23
39#define IRQ_IOP32X_MSG_ERR 24
40#define IRQ_IOP32X_SSP 25
41#define IRQ_IOP32X_XINT0 27
42#define IRQ_IOP32X_XINT1 28
43#define IRQ_IOP32X_XINT2 29
44#define IRQ_IOP32X_XINT3 30
45#define IRQ_IOP32X_HPI 31
46
47#define NR_IRQS 32
48
49
50#endif
diff --git a/include/asm-arm/arch-iop32x/memory.h b/include/asm-arm/arch-iop32x/memory.h
new file mode 100644
index 000000000000..764cd3f0d416
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/memory.h
@@ -0,0 +1,26 @@
1/*
2 * include/asm-arm/arch-iop32x/memory.h
3 */
4
5#ifndef __MEMORY_H
6#define __MEMORY_H
7
8#include <asm/hardware.h>
9
10/*
11 * Physical DRAM offset.
12 */
13#define PHYS_OFFSET UL(0xa0000000)
14
15/*
16 * Virtual view <-> PCI DMA view memory address translations
17 * virt_to_bus: Used to translate the virtual address to an
18 * address suitable to be passed to set_dma_addr
19 * bus_to_virt: Used to convert an address for DMA operations
20 * to an address that the kernel can use.
21 */
22#define __virt_to_bus(x) (((__virt_to_phys(x)) & ~(*IOP3XX_IATVR2)) | ((*IOP3XX_IABAR2) & 0xfffffff0))
23#define __bus_to_virt(x) (__phys_to_virt(((x) & ~(*IOP3XX_IALR2)) | ( *IOP3XX_IATVR2)))
24
25
26#endif
diff --git a/include/asm-arm/arch-iop32x/n2100.h b/include/asm-arm/arch-iop32x/n2100.h
new file mode 100644
index 000000000000..fed31a648425
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/n2100.h
@@ -0,0 +1,19 @@
1/*
2 * include/asm/arch-iop32x/n2100.h
3 *
4 * Thecus N2100 board registers
5 */
6
7#ifndef __N2100_H
8#define __N2100_H
9
10#define N2100_UART 0xfe800000 /* UART */
11
12#define N2100_COPY_BUTTON IOP3XX_GPIO_LINE(0)
13#define N2100_PCA9532_RESET IOP3XX_GPIO_LINE(2)
14#define N2100_RESET_BUTTON IOP3XX_GPIO_LINE(3)
15#define N2100_HARDWARE_RESET IOP3XX_GPIO_LINE(4)
16#define N2100_POWER_BUTTON IOP3XX_GPIO_LINE(5)
17
18
19#endif
diff --git a/include/asm-arm/arch-iop32x/system.h b/include/asm-arm/arch-iop32x/system.h
new file mode 100644
index 000000000000..17b7eb7e9c0d
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/system.h
@@ -0,0 +1,33 @@
1/*
2 * include/asm-arm/arch-iop32x/system.h
3 *
4 * Copyright (C) 2001 MontaVista Software, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <asm/mach-types.h>
12
13static inline void arch_idle(void)
14{
15 cpu_do_idle();
16}
17
18static inline void arch_reset(char mode)
19{
20 local_irq_disable();
21
22 if (machine_is_n2100()) {
23 gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
24 gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
25 while (1)
26 ;
27 }
28
29 *IOP3XX_PCSR = 0x30;
30
31 /* Jump into ROM at address 0 */
32 cpu_reset(0);
33}
diff --git a/include/asm-arm/arch-iop32x/timex.h b/include/asm-arm/arch-iop32x/timex.h
new file mode 100644
index 000000000000..9934b087311b
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/timex.h
@@ -0,0 +1,9 @@
1/*
2 * include/asm-arm/arch-iop32x/timex.h
3 *
4 * IOP32x architecture timex specifications
5 */
6
7#include <asm/hardware.h>
8
9#define CLOCK_TICK_RATE (100 * HZ)
diff --git a/include/asm-arm/arch-iop32x/uncompress.h b/include/asm-arm/arch-iop32x/uncompress.h
new file mode 100644
index 000000000000..e64f52bf2bce
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/uncompress.h
@@ -0,0 +1,39 @@
1/*
2 * include/asm-arm/arch-iop32x/uncompress.h
3 */
4
5#include <asm/types.h>
6#include <asm/mach-types.h>
7#include <linux/serial_reg.h>
8#include <asm/hardware.h>
9
10static volatile u8 *uart_base;
11
12#define TX_DONE (UART_LSR_TEMT | UART_LSR_THRE)
13
14static inline void putc(char c)
15{
16 while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
17 barrier();
18 uart_base[UART_TX] = c;
19}
20
21static inline void flush(void)
22{
23}
24
25static __inline__ void __arch_decomp_setup(unsigned long arch_id)
26{
27 if (machine_is_iq80321())
28 uart_base = (volatile u8 *)IQ80321_UART;
29 else if (machine_is_iq31244())
30 uart_base = (volatile u8 *)IQ31244_UART;
31 else
32 uart_base = (volatile u8 *)0xfe800000;
33}
34
35/*
36 * nothing to do
37 */
38#define arch_decomp_setup() __arch_decomp_setup(arch_id)
39#define arch_decomp_wdog()
diff --git a/include/asm-arm/arch-iop32x/vmalloc.h b/include/asm-arm/arch-iop32x/vmalloc.h
new file mode 100644
index 000000000000..0a70baa19517
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/vmalloc.h
@@ -0,0 +1,5 @@
1/*
2 * include/asm-arm/arch-iop32x/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe000000
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-01 05:46:40 -0500