diff options
Diffstat (limited to 'include/asm-arm/arch-iop13xx/system.h')
-rw-r--r-- | include/asm-arm/arch-iop13xx/system.h | 34 |
1 files changed, 2 insertions, 32 deletions
diff --git a/include/asm-arm/arch-iop13xx/system.h b/include/asm-arm/arch-iop13xx/system.h index 127827058e1f..8575af8db78c 100644 --- a/include/asm-arm/arch-iop13xx/system.h +++ b/include/asm-arm/arch-iop13xx/system.h | |||
@@ -13,43 +13,13 @@ static inline void arch_idle(void) | |||
13 | cpu_do_idle(); | 13 | cpu_do_idle(); |
14 | } | 14 | } |
15 | 15 | ||
16 | /* WDTCR CP6 R7 Page 9 */ | ||
17 | static inline u32 read_wdtcr(void) | ||
18 | { | ||
19 | u32 val; | ||
20 | asm volatile("mrc p6, 0, %0, c7, c9, 0":"=r" (val)); | ||
21 | return val; | ||
22 | } | ||
23 | static inline void write_wdtcr(u32 val) | ||
24 | { | ||
25 | asm volatile("mcr p6, 0, %0, c7, c9, 0"::"r" (val)); | ||
26 | } | ||
27 | |||
28 | /* WDTSR CP6 R8 Page 9 */ | ||
29 | static inline u32 read_wdtsr(void) | ||
30 | { | ||
31 | u32 val; | ||
32 | asm volatile("mrc p6, 0, %0, c8, c9, 0":"=r" (val)); | ||
33 | return val; | ||
34 | } | ||
35 | static inline void write_wdtsr(u32 val) | ||
36 | { | ||
37 | asm volatile("mcr p6, 0, %0, c8, c9, 0"::"r" (val)); | ||
38 | } | ||
39 | |||
40 | #define IOP13XX_WDTCR_EN_ARM 0x1e1e1e1e | ||
41 | #define IOP13XX_WDTCR_EN 0xe1e1e1e1 | ||
42 | #define IOP13XX_WDTCR_DIS_ARM 0x1f1f1f1f | ||
43 | #define IOP13XX_WDTCR_DIS 0xf1f1f1f1 | ||
44 | #define IOP13XX_WDTSR_WRITE_EN (1 << 31) | ||
45 | #define IOP13XX_WDTCR_IB_RESET (1 << 0) | ||
46 | static inline void arch_reset(char mode) | 16 | static inline void arch_reset(char mode) |
47 | { | 17 | { |
48 | /* | 18 | /* |
49 | * Reset the internal bus (warning both cores are reset) | 19 | * Reset the internal bus (warning both cores are reset) |
50 | */ | 20 | */ |
51 | write_wdtcr(IOP13XX_WDTCR_EN_ARM); | 21 | write_wdtcr(IOP_WDTCR_EN_ARM); |
52 | write_wdtcr(IOP13XX_WDTCR_EN); | 22 | write_wdtcr(IOP_WDTCR_EN); |
53 | write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET); | 23 | write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET); |
54 | write_wdtcr(0x1000); | 24 | write_wdtcr(0x1000); |
55 | 25 | ||