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Diffstat (limited to 'include/asm-arm/arch-iop13xx/iop13xx.h')
-rw-r--r--include/asm-arm/arch-iop13xx/iop13xx.h24
1 files changed, 15 insertions, 9 deletions
diff --git a/include/asm-arm/arch-iop13xx/iop13xx.h b/include/asm-arm/arch-iop13xx/iop13xx.h
index d26b755a9879..85707e9c3325 100644
--- a/include/asm-arm/arch-iop13xx/iop13xx.h
+++ b/include/asm-arm/arch-iop13xx/iop13xx.h
@@ -8,6 +8,7 @@ extern u32 iop13xx_atue_pmmr_offset;
8void iop13xx_init_irq(void); 8void iop13xx_init_irq(void);
9void iop13xx_map_io(void); 9void iop13xx_map_io(void);
10void iop13xx_platform_init(void); 10void iop13xx_platform_init(void);
11void iop13xx_add_tpmi_devices(void);
11void iop13xx_init_irq(void); 12void iop13xx_init_irq(void);
12 13
13/* CPUID CP6 R0 Page 0 */ 14/* CPUID CP6 R0 Page 0 */
@@ -27,19 +28,24 @@ static inline int iop13xx_cpu_id(void)
27#define IOP13XX_PCI_OFFSET IOP13XX_MAX_RAM_SIZE 28#define IOP13XX_PCI_OFFSET IOP13XX_MAX_RAM_SIZE
28 29
29/* PCI MAP 30/* PCI MAP
30 * 0x0000.0000 - 0x8000.0000 1:1 mapping with Physical RAM 31 * bus range cpu phys cpu virt note
31 * 0x8000.0000 - 0x8800.0000 PCIX/PCIE memory window (128MB) 32 * 0x0000.0000 + 2GB (n/a) (n/a) inbound, 1:1 mapping with Physical RAM
32*/ 33 * 0x8000.0000 + 928M 0x1.8000.0000 (ioremap) PCIX outbound memory window
34 * 0x8000.0000 + 928M 0x2.8000.0000 (ioremap) PCIE outbound memory window
35 *
36 * IO MAP
37 * 0x1000 + 64K 0x0.fffb.1000 0xfec6.1000 PCIX outbound i/o window
38 * 0x1000 + 64K 0x0.fffd.1000 0xfed7.1000 PCIE outbound i/o window
39 */
33#define IOP13XX_PCIX_IO_WINDOW_SIZE 0x10000UL 40#define IOP13XX_PCIX_IO_WINDOW_SIZE 0x10000UL
34#define IOP13XX_PCIX_LOWER_IO_PA 0xfffb0000UL 41#define IOP13XX_PCIX_LOWER_IO_PA 0xfffb0000UL
35#define IOP13XX_PCIX_LOWER_IO_VA 0xfec60000UL 42#define IOP13XX_PCIX_LOWER_IO_VA 0xfec60000UL
36#define IOP13XX_PCIX_LOWER_IO_BA 0x0fff0000UL 43#define IOP13XX_PCIX_LOWER_IO_BA 0x0UL /* OIOTVR */
44#define IOP13XX_PCIX_IO_BUS_OFFSET 0x1000UL
37#define IOP13XX_PCIX_UPPER_IO_PA (IOP13XX_PCIX_LOWER_IO_PA +\ 45#define IOP13XX_PCIX_UPPER_IO_PA (IOP13XX_PCIX_LOWER_IO_PA +\
38 IOP13XX_PCIX_IO_WINDOW_SIZE - 1) 46 IOP13XX_PCIX_IO_WINDOW_SIZE - 1)
39#define IOP13XX_PCIX_UPPER_IO_VA (IOP13XX_PCIX_LOWER_IO_VA +\ 47#define IOP13XX_PCIX_UPPER_IO_VA (IOP13XX_PCIX_LOWER_IO_VA +\
40 IOP13XX_PCIX_IO_WINDOW_SIZE - 1) 48 IOP13XX_PCIX_IO_WINDOW_SIZE - 1)
41#define IOP13XX_PCIX_IO_OFFSET (IOP13XX_PCIX_LOWER_IO_VA -\
42 IOP13XX_PCIX_LOWER_IO_BA)
43#define IOP13XX_PCIX_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\ 49#define IOP13XX_PCIX_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\
44 (IOP13XX_PCIX_LOWER_IO_PA\ 50 (IOP13XX_PCIX_LOWER_IO_PA\
45 - IOP13XX_PCIX_LOWER_IO_VA)) 51 - IOP13XX_PCIX_LOWER_IO_VA))
@@ -65,15 +71,14 @@ static inline int iop13xx_cpu_id(void)
65#define IOP13XX_PCIE_IO_WINDOW_SIZE 0x10000UL 71#define IOP13XX_PCIE_IO_WINDOW_SIZE 0x10000UL
66#define IOP13XX_PCIE_LOWER_IO_PA 0xfffd0000UL 72#define IOP13XX_PCIE_LOWER_IO_PA 0xfffd0000UL
67#define IOP13XX_PCIE_LOWER_IO_VA 0xfed70000UL 73#define IOP13XX_PCIE_LOWER_IO_VA 0xfed70000UL
68#define IOP13XX_PCIE_LOWER_IO_BA 0x0fff0000UL 74#define IOP13XX_PCIE_LOWER_IO_BA 0x0UL /* OIOTVR */
75#define IOP13XX_PCIE_IO_BUS_OFFSET 0x1000UL
69#define IOP13XX_PCIE_UPPER_IO_PA (IOP13XX_PCIE_LOWER_IO_PA +\ 76#define IOP13XX_PCIE_UPPER_IO_PA (IOP13XX_PCIE_LOWER_IO_PA +\
70 IOP13XX_PCIE_IO_WINDOW_SIZE - 1) 77 IOP13XX_PCIE_IO_WINDOW_SIZE - 1)
71#define IOP13XX_PCIE_UPPER_IO_VA (IOP13XX_PCIE_LOWER_IO_VA +\ 78#define IOP13XX_PCIE_UPPER_IO_VA (IOP13XX_PCIE_LOWER_IO_VA +\
72 IOP13XX_PCIE_IO_WINDOW_SIZE - 1) 79 IOP13XX_PCIE_IO_WINDOW_SIZE - 1)
73#define IOP13XX_PCIE_UPPER_IO_BA (IOP13XX_PCIE_LOWER_IO_BA +\ 80#define IOP13XX_PCIE_UPPER_IO_BA (IOP13XX_PCIE_LOWER_IO_BA +\
74 IOP13XX_PCIE_IO_WINDOW_SIZE - 1) 81 IOP13XX_PCIE_IO_WINDOW_SIZE - 1)
75#define IOP13XX_PCIE_IO_OFFSET (IOP13XX_PCIE_LOWER_IO_VA -\
76 IOP13XX_PCIE_LOWER_IO_BA)
77#define IOP13XX_PCIE_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\ 82#define IOP13XX_PCIE_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\
78 (IOP13XX_PCIE_LOWER_IO_PA\ 83 (IOP13XX_PCIE_LOWER_IO_PA\
79 - IOP13XX_PCIE_LOWER_IO_VA)) 84 - IOP13XX_PCIE_LOWER_IO_VA))
@@ -451,4 +456,5 @@ static inline int iop13xx_cpu_id(void)
451#define IOP13XX_PBI_BAR1 IOP13XX_PBI_OFFSET(0x10) 456#define IOP13XX_PBI_BAR1 IOP13XX_PBI_OFFSET(0x10)
452#define IOP13XX_PBI_LR1 IOP13XX_PBI_OFFSET(0x14) 457#define IOP13XX_PBI_LR1 IOP13XX_PBI_OFFSET(0x14)
453 458
459#define IOP13XX_PROCESSOR_FREQ IOP13XX_REG_ADDR32(0x2180)
454#endif /* _IOP13XX_HW_H_ */ 460#endif /* _IOP13XX_HW_H_ */