diff options
Diffstat (limited to 'include/asm-arm/arch-iop13xx/iop13xx.h')
-rw-r--r-- | include/asm-arm/arch-iop13xx/iop13xx.h | 38 |
1 files changed, 16 insertions, 22 deletions
diff --git a/include/asm-arm/arch-iop13xx/iop13xx.h b/include/asm-arm/arch-iop13xx/iop13xx.h index e6736c3d1f7f..d4e4f828577c 100644 --- a/include/asm-arm/arch-iop13xx/iop13xx.h +++ b/include/asm-arm/arch-iop13xx/iop13xx.h | |||
@@ -166,12 +166,22 @@ static inline int iop13xx_cpu_id(void) | |||
166 | #define IOP13XX_INIT_I2C_1 (1 << 1) | 166 | #define IOP13XX_INIT_I2C_1 (1 << 1) |
167 | #define IOP13XX_INIT_I2C_2 (1 << 2) | 167 | #define IOP13XX_INIT_I2C_2 (1 << 2) |
168 | 168 | ||
169 | #define IQ81340_NUM_UART 2 | 169 | /* ADMA selection flags */ |
170 | #define IQ81340_NUM_I2C 3 | 170 | /* INIT_ADMA_DEFAULT = Rely on CONFIG_IOP13XX_ADMA* */ |
171 | #define IQ81340_NUM_PHYS_MAP_FLASH 1 | 171 | #define IOP13XX_INIT_ADMA_DEFAULT (0) |
172 | #define IQ81340_MAX_PLAT_DEVICES (IQ81340_NUM_UART +\ | 172 | #define IOP13XX_INIT_ADMA_0 (1 << 0) |
173 | IQ81340_NUM_I2C +\ | 173 | #define IOP13XX_INIT_ADMA_1 (1 << 1) |
174 | IQ81340_NUM_PHYS_MAP_FLASH) | 174 | #define IOP13XX_INIT_ADMA_2 (1 << 2) |
175 | |||
176 | /* Platform devices */ | ||
177 | #define IQ81340_NUM_UART 2 | ||
178 | #define IQ81340_NUM_I2C 3 | ||
179 | #define IQ81340_NUM_PHYS_MAP_FLASH 1 | ||
180 | #define IQ81340_NUM_ADMA 3 | ||
181 | #define IQ81340_MAX_PLAT_DEVICES (IQ81340_NUM_UART + \ | ||
182 | IQ81340_NUM_I2C + \ | ||
183 | IQ81340_NUM_PHYS_MAP_FLASH + \ | ||
184 | IQ81340_NUM_ADMA) | ||
175 | 185 | ||
176 | /*========================== PMMR offsets for key registers ============*/ | 186 | /*========================== PMMR offsets for key registers ============*/ |
177 | #define IOP13XX_ATU0_PMMR_OFFSET 0x00048000 | 187 | #define IOP13XX_ATU0_PMMR_OFFSET 0x00048000 |
@@ -444,22 +454,6 @@ static inline int iop13xx_cpu_id(void) | |||
444 | /*==============================ADMA UNITS===============================*/ | 454 | /*==============================ADMA UNITS===============================*/ |
445 | #define IOP13XX_ADMA_PHYS_BASE(chan) IOP13XX_REG_ADDR32_PHYS((chan << 9)) | 455 | #define IOP13XX_ADMA_PHYS_BASE(chan) IOP13XX_REG_ADDR32_PHYS((chan << 9)) |
446 | #define IOP13XX_ADMA_UPPER_PA(chan) (IOP13XX_ADMA_PHYS_BASE(chan) + 0xc0) | 456 | #define IOP13XX_ADMA_UPPER_PA(chan) (IOP13XX_ADMA_PHYS_BASE(chan) + 0xc0) |
447 | #define IOP13XX_ADMA_OFFSET(chan, ofs) IOP13XX_REG_ADDR32((chan << 9) + (ofs)) | ||
448 | |||
449 | #define IOP13XX_ADMA_ACCR(chan) IOP13XX_ADMA_OFFSET(chan, 0x0) | ||
450 | #define IOP13XX_ADMA_ACSR(chan) IOP13XX_ADMA_OFFSET(chan, 0x4) | ||
451 | #define IOP13XX_ADMA_ADAR(chan) IOP13XX_ADMA_OFFSET(chan, 0x8) | ||
452 | #define IOP13XX_ADMA_IIPCR(chan) IOP13XX_ADMA_OFFSET(chan, 0x18) | ||
453 | #define IOP13XX_ADMA_IIPAR(chan) IOP13XX_ADMA_OFFSET(chan, 0x1c) | ||
454 | #define IOP13XX_ADMA_IIPUAR(chan) IOP13XX_ADMA_OFFSET(chan, 0x20) | ||
455 | #define IOP13XX_ADMA_ANDAR(chan) IOP13XX_ADMA_OFFSET(chan, 0x24) | ||
456 | #define IOP13XX_ADMA_ADCR(chan) IOP13XX_ADMA_OFFSET(chan, 0x28) | ||
457 | #define IOP13XX_ADMA_CARMD(chan) IOP13XX_ADMA_OFFSET(chan, 0x2c) | ||
458 | #define IOP13XX_ADMA_ABCR(chan) IOP13XX_ADMA_OFFSET(chan, 0x30) | ||
459 | #define IOP13XX_ADMA_DLADR(chan) IOP13XX_ADMA_OFFSET(chan, 0x34) | ||
460 | #define IOP13XX_ADMA_DUADR(chan) IOP13XX_ADMA_OFFSET(chan, 0x38) | ||
461 | #define IOP13XX_ADMA_SLAR(src, chan) IOP13XX_ADMA_OFFSET(chan, 0x3c + (src <<3)) | ||
462 | #define IOP13XX_ADMA_SUAR(src, chan) IOP13XX_ADMA_OFFSET(chan, 0x40 + (src <<3)) | ||
463 | 457 | ||
464 | /*==============================XSI BRIDGE===============================*/ | 458 | /*==============================XSI BRIDGE===============================*/ |
465 | #define IOP13XX_XBG_BECSR IOP13XX_REG_ADDR32(0x178c) | 459 | #define IOP13XX_XBG_BECSR IOP13XX_REG_ADDR32(0x178c) |