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-rw-r--r--include/asm-arm/arch-imx/entry-macro.S25
1 files changed, 13 insertions, 12 deletions
diff --git a/include/asm-arm/arch-imx/entry-macro.S b/include/asm-arm/arch-imx/entry-macro.S
index 3b9ef6914627..0b84e81031c3 100644
--- a/include/asm-arm/arch-imx/entry-macro.S
+++ b/include/asm-arm/arch-imx/entry-macro.S
@@ -11,21 +11,22 @@
11 11
12 .macro disable_fiq 12 .macro disable_fiq
13 .endm 13 .endm
14
15 .macro get_irqnr_preamble, base, tmp
16 .endm
17
18 .macro arch_ret_to_user, tmp1, tmp2
19 .endm
20
14#define AITC_NIVECSR 0x40 21#define AITC_NIVECSR 0x40
15 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
16 ldr \irqstat, =IO_ADDRESS(IMX_AITC_BASE) 23 ldr \base, =IO_ADDRESS(IMX_AITC_BASE)
17 @ Load offset & priority of the highest priority 24 @ Load offset & priority of the highest priority
18 @ interrupt pending. 25 @ interrupt pending.
19 ldr \irqnr, [\irqstat, #AITC_NIVECSR] 26 ldr \irqstat, [\base, #AITC_NIVECSR]
20 @ Shift off the priority leaving the offset or 27 @ Shift off the priority leaving the offset or
21 @ "interrupt number" 28 @ "interrupt number", use arithmetic shift to
22 mov \irqnr, \irqnr, lsr #16 29 @ transform illegal source (0xffff) as -1
23 ldr \irqstat, =1 @ dummy compare 30 mov \irqnr, \irqstat, asr #16
24 ldr \base, =0xFFFF // invalid interrupt 31 adds \tmp, \irqnr, #1
25 cmp \irqnr, \base
26 bne 1001f
27 ldr \irqstat, =0
281001:
29 tst \irqstat, #1 @ to make the condition code = TRUE
30 .endm 32 .endm
31