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-rw-r--r--include/asm-arm/arch-ep93xx/debug-macro.S22
-rw-r--r--include/asm-arm/arch-ep93xx/dma.h3
-rw-r--r--include/asm-arm/arch-ep93xx/entry-macro.S53
-rw-r--r--include/asm-arm/arch-ep93xx/ep93xx-regs.h125
-rw-r--r--include/asm-arm/arch-ep93xx/gesbc9312.h3
-rw-r--r--include/asm-arm/arch-ep93xx/gpio.h107
-rw-r--r--include/asm-arm/arch-ep93xx/hardware.h12
-rw-r--r--include/asm-arm/arch-ep93xx/io.h8
-rw-r--r--include/asm-arm/arch-ep93xx/irqs.h80
-rw-r--r--include/asm-arm/arch-ep93xx/memory.h14
-rw-r--r--include/asm-arm/arch-ep93xx/platform.h14
-rw-r--r--include/asm-arm/arch-ep93xx/system.h26
-rw-r--r--include/asm-arm/arch-ep93xx/timex.h5
-rw-r--r--include/asm-arm/arch-ep93xx/ts72xx.h90
-rw-r--r--include/asm-arm/arch-ep93xx/uncompress.h85
-rw-r--r--include/asm-arm/arch-ep93xx/vmalloc.h5
16 files changed, 652 insertions, 0 deletions
diff --git a/include/asm-arm/arch-ep93xx/debug-macro.S b/include/asm-arm/arch-ep93xx/debug-macro.S
new file mode 100644
index 000000000000..397565a0c671
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/debug-macro.S
@@ -0,0 +1,22 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/debug-macro.S
3 * Debugging macro include header
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12#include <asm/arch/ep93xx-regs.h>
13
14 .macro addruart,rx
15 mrc p15, 0, \rx, c1, c0
16 tst \rx, #1 @ MMU enabled?
17 ldreq \rx, =EP93XX_APB_PHYS_BASE @ Physical base
18 ldrne \rx, =EP93XX_APB_VIRT_BASE @ virtual base
19 orr \rx, \rx, #0x000c0000
20 .endm
21
22#include <asm/hardware/debug-pl01x.S>
diff --git a/include/asm-arm/arch-ep93xx/dma.h b/include/asm-arm/arch-ep93xx/dma.h
new file mode 100644
index 000000000000..898b3ab7fd46
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/dma.h
@@ -0,0 +1,3 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/dma.h
3 */
diff --git a/include/asm-arm/arch-ep93xx/entry-macro.S b/include/asm-arm/arch-ep93xx/entry-macro.S
new file mode 100644
index 000000000000..84140a28dfcf
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/entry-macro.S
@@ -0,0 +1,53 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/entry-macro.S
3 * IRQ demultiplexing for EP93xx
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12#include <asm/arch/ep93xx-regs.h>
13
14 .macro disable_fiq
15 .endm
16
17 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
18 ldr \base, =(EP93XX_AHB_VIRT_BASE)
19 orr \base, \base, #0x000b0000
20 mov \irqnr, #0
21 ldr \irqstat, [\base] @ lower 32 interrupts
22 cmp \irqstat, #0
23 bne 1001f
24
25 eor \base, \base, #0x00070000
26 ldr \irqstat, [\base] @ upper 32 interrupts
27 cmp \irqstat, #0
28 beq 1002f
29 mov \irqnr, #0x20
30
311001:
32 movs \tmp, \irqstat, lsl #16
33 movne \irqstat, \tmp
34 addeq \irqnr, \irqnr, #16
35
36 movs \tmp, \irqstat, lsl #8
37 movne \irqstat, \tmp
38 addeq \irqnr, \irqnr, #8
39
40 movs \tmp, \irqstat, lsl #4
41 movne \irqstat, \tmp
42 addeq \irqnr, \irqnr, #4
43
44 movs \tmp, \irqstat, lsl #2
45 movne \irqstat, \tmp
46 addeq \irqnr, \irqnr, #2
47
48 movs \tmp, \irqstat, lsl #1
49 addeq \irqnr, \irqnr, #1
50 orrs \base, \base, #1
51
521002:
53 .endm
diff --git a/include/asm-arm/arch-ep93xx/ep93xx-regs.h b/include/asm-arm/arch-ep93xx/ep93xx-regs.h
new file mode 100644
index 000000000000..71cea0b5841b
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/ep93xx-regs.h
@@ -0,0 +1,125 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/ep93xx-regs.h
3 */
4
5#ifndef __ASM_ARCH_EP93XX_REGS_H
6#define __ASM_ARCH_EP93XX_REGS_H
7
8/*
9 * EP93xx linux memory map:
10 *
11 * virt phys size
12 * fe800000 5M per-platform mappings
13 * fed00000 80800000 2M APB
14 * fef00000 80000000 1M AHB
15 */
16
17#define EP93XX_AHB_PHYS_BASE 0x80000000
18#define EP93XX_AHB_VIRT_BASE 0xfef00000
19#define EP93XX_AHB_SIZE 0x00100000
20
21#define EP93XX_APB_PHYS_BASE 0x80800000
22#define EP93XX_APB_VIRT_BASE 0xfed00000
23#define EP93XX_APB_SIZE 0x00200000
24
25
26/* AHB peripherals */
27#define EP93XX_DMA_BASE (EP93XX_AHB_VIRT_BASE + 0x00000000)
28
29#define EP93XX_ETHERNET_BASE (EP93XX_AHB_VIRT_BASE + 0x00010000)
30
31#define EP93XX_USB_BASE (EP93XX_AHB_VIRT_BASE + 0x00020000)
32#define EP93XX_USB_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00020000)
33
34#define EP93XX_RASTER_BASE (EP93XX_AHB_VIRT_BASE + 0x00030000)
35
36#define EP93XX_GRAPHICS_ACCEL_BASE (EP93XX_AHB_VIRT_BASE + 0x00040000)
37
38#define EP93XX_SDRAM_CONTROLLER_BASE (EP93XX_AHB_VIRT_BASE + 0x00060000)
39
40#define EP93XX_PCMCIA_CONTROLLER_BASE (EP93XX_AHB_VIRT_BASE + 0x00080000)
41
42#define EP93XX_BOOT_ROM_BASE (EP93XX_AHB_VIRT_BASE + 0x00090000)
43
44#define EP93XX_IDE_BASE (EP93XX_AHB_VIRT_BASE + 0x000a0000)
45
46#define EP93XX_VIC1_BASE (EP93XX_AHB_VIRT_BASE + 0x000b0000)
47
48#define EP93XX_VIC2_BASE (EP93XX_AHB_VIRT_BASE + 0x000c0000)
49
50
51/* APB peripherals */
52#define EP93XX_TIMER_BASE (EP93XX_APB_VIRT_BASE + 0x00010000)
53#define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
54#define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
55#define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
56#define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
57#define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
58#define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
59#define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
60#define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
61#define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
62#define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
63#define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
64#define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
65#define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
66#define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
67#define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
68
69#define EP93XX_I2S_BASE (EP93XX_APB_VIRT_BASE + 0x00020000)
70
71#define EP93XX_SECURITY_BASE (EP93XX_APB_VIRT_BASE + 0x00030000)
72
73#define EP93XX_GPIO_BASE (EP93XX_APB_VIRT_BASE + 0x00040000)
74#define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x))
75#define EP93XX_GPIO_A_INT_TYPE1 EP93XX_GPIO_REG(0x90)
76#define EP93XX_GPIO_A_INT_TYPE2 EP93XX_GPIO_REG(0x94)
77#define EP93XX_GPIO_A_INT_ACK EP93XX_GPIO_REG(0x98)
78#define EP93XX_GPIO_A_INT_ENABLE EP93XX_GPIO_REG(0x9c)
79#define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0)
80#define EP93XX_GPIO_B_INT_TYPE1 EP93XX_GPIO_REG(0xac)
81#define EP93XX_GPIO_B_INT_TYPE2 EP93XX_GPIO_REG(0xb0)
82#define EP93XX_GPIO_B_INT_ACK EP93XX_GPIO_REG(0xb4)
83#define EP93XX_GPIO_B_INT_ENABLE EP93XX_GPIO_REG(0xb8)
84#define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc)
85
86#define EP93XX_AAC_BASE (EP93XX_APB_VIRT_BASE + 0x00080000)
87
88#define EP93XX_SPI_BASE (EP93XX_APB_VIRT_BASE + 0x000a0000)
89
90#define EP93XX_IRDA_BASE (EP93XX_APB_VIRT_BASE + 0x000b0000)
91
92#define EP93XX_UART1_BASE (EP93XX_APB_VIRT_BASE + 0x000c0000)
93#define EP93XX_UART1_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000c0000)
94
95#define EP93XX_UART2_BASE (EP93XX_APB_VIRT_BASE + 0x000d0000)
96#define EP93XX_UART2_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000d0000)
97
98#define EP93XX_UART3_BASE (EP93XX_APB_VIRT_BASE + 0x000e0000)
99#define EP93XX_UART3_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000e0000)
100
101#define EP93XX_KEY_MATRIX_BASE (EP93XX_APB_VIRT_BASE + 0x000f0000)
102
103#define EP93XX_ADC_BASE (EP93XX_APB_VIRT_BASE + 0x00100000)
104#define EP93XX_TOUCHSCREEN_BASE (EP93XX_APB_VIRT_BASE + 0x00100000)
105
106#define EP93XX_PWM_BASE (EP93XX_APB_VIRT_BASE + 0x00110000)
107
108#define EP93XX_RTC_BASE (EP93XX_APB_VIRT_BASE + 0x00120000)
109
110#define EP93XX_SYSCON_BASE (EP93XX_APB_VIRT_BASE + 0x00130000)
111#define EP93XX_SYSCON_REG(x) (EP93XX_SYSCON_BASE + (x))
112#define EP93XX_SYSCON_POWER_STATE EP93XX_SYSCON_REG(0x00)
113#define EP93XX_SYSCON_CLOCK_CONTROL EP93XX_SYSCON_REG(0x04)
114#define EP93XX_SYSCON_CLOCK_UARTBAUD 0x20000000
115#define EP93XX_SYSCON_CLOCK_USH_EN 0x10000000
116#define EP93XX_SYSCON_HALT EP93XX_SYSCON_REG(0x08)
117#define EP93XX_SYSCON_STANDBY EP93XX_SYSCON_REG(0x0c)
118#define EP93XX_SYSCON_DEVICE_CONFIG EP93XX_SYSCON_REG(0x80)
119#define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE 0x00800000
120#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0)
121
122#define EP93XX_WATCHDOG_BASE (EP93XX_APB_VIRT_BASE + 0x00140000)
123
124
125#endif
diff --git a/include/asm-arm/arch-ep93xx/gesbc9312.h b/include/asm-arm/arch-ep93xx/gesbc9312.h
new file mode 100644
index 000000000000..4d0b3023bff7
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/gesbc9312.h
@@ -0,0 +1,3 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/gesbc9312.h
3 */
diff --git a/include/asm-arm/arch-ep93xx/gpio.h b/include/asm-arm/arch-ep93xx/gpio.h
new file mode 100644
index 000000000000..1ee14a14cba0
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/gpio.h
@@ -0,0 +1,107 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/gpio.h
3 */
4
5#ifndef __ASM_ARCH_GPIO_H
6#define __ASM_ARCH_GPIO_H
7
8#define GPIO_IN 0
9#define GPIO_OUT 1
10
11#define EP93XX_GPIO_LOW 0
12#define EP93XX_GPIO_HIGH 1
13
14extern void gpio_line_config(int line, int direction);
15extern int gpio_line_get(int line);
16extern void gpio_line_set(int line, int value);
17
18/* GPIO port A. */
19#define EP93XX_GPIO_LINE_A(x) ((x) + 0)
20#define EP93XX_GPIO_LINE_EGPIO0 EP93XX_GPIO_LINE_A(0)
21#define EP93XX_GPIO_LINE_EGPIO1 EP93XX_GPIO_LINE_A(1)
22#define EP93XX_GPIO_LINE_EGPIO2 EP93XX_GPIO_LINE_A(2)
23#define EP93XX_GPIO_LINE_EGPIO3 EP93XX_GPIO_LINE_A(3)
24#define EP93XX_GPIO_LINE_EGPIO4 EP93XX_GPIO_LINE_A(4)
25#define EP93XX_GPIO_LINE_EGPIO5 EP93XX_GPIO_LINE_A(5)
26#define EP93XX_GPIO_LINE_EGPIO6 EP93XX_GPIO_LINE_A(6)
27#define EP93XX_GPIO_LINE_EGPIO7 EP93XX_GPIO_LINE_A(7)
28
29/* GPIO port B. */
30#define EP93XX_GPIO_LINE_B(x) ((x) + 8)
31#define EP93XX_GPIO_LINE_EGPIO8 EP93XX_GPIO_LINE_B(0)
32#define EP93XX_GPIO_LINE_EGPIO9 EP93XX_GPIO_LINE_B(1)
33#define EP93XX_GPIO_LINE_EGPIO10 EP93XX_GPIO_LINE_B(2)
34#define EP93XX_GPIO_LINE_EGPIO11 EP93XX_GPIO_LINE_B(3)
35#define EP93XX_GPIO_LINE_EGPIO12 EP93XX_GPIO_LINE_B(4)
36#define EP93XX_GPIO_LINE_EGPIO13 EP93XX_GPIO_LINE_B(5)
37#define EP93XX_GPIO_LINE_EGPIO14 EP93XX_GPIO_LINE_B(6)
38#define EP93XX_GPIO_LINE_EGPIO15 EP93XX_GPIO_LINE_B(7)
39
40/* GPIO port C. */
41#define EP93XX_GPIO_LINE_C(x) ((x) + 16)
42#define EP93XX_GPIO_LINE_ROW0 EP93XX_GPIO_LINE_C(0)
43#define EP93XX_GPIO_LINE_ROW1 EP93XX_GPIO_LINE_C(1)
44#define EP93XX_GPIO_LINE_ROW2 EP93XX_GPIO_LINE_C(2)
45#define EP93XX_GPIO_LINE_ROW3 EP93XX_GPIO_LINE_C(3)
46#define EP93XX_GPIO_LINE_ROW4 EP93XX_GPIO_LINE_C(4)
47#define EP93XX_GPIO_LINE_ROW5 EP93XX_GPIO_LINE_C(5)
48#define EP93XX_GPIO_LINE_ROW6 EP93XX_GPIO_LINE_C(6)
49#define EP93XX_GPIO_LINE_ROW7 EP93XX_GPIO_LINE_C(7)
50
51/* GPIO port D. */
52#define EP93XX_GPIO_LINE_D(x) ((x) + 24)
53#define EP93XX_GPIO_LINE_COL0 EP93XX_GPIO_LINE_D(0)
54#define EP93XX_GPIO_LINE_COL1 EP93XX_GPIO_LINE_D(1)
55#define EP93XX_GPIO_LINE_COL2 EP93XX_GPIO_LINE_D(2)
56#define EP93XX_GPIO_LINE_COL3 EP93XX_GPIO_LINE_D(3)
57#define EP93XX_GPIO_LINE_COL4 EP93XX_GPIO_LINE_D(4)
58#define EP93XX_GPIO_LINE_COL5 EP93XX_GPIO_LINE_D(5)
59#define EP93XX_GPIO_LINE_COL6 EP93XX_GPIO_LINE_D(6)
60#define EP93XX_GPIO_LINE_COL7 EP93XX_GPIO_LINE_D(7)
61
62/* GPIO port E. */
63#define EP93XX_GPIO_LINE_E(x) ((x) + 32)
64#define EP93XX_GPIO_LINE_GRLED EP93XX_GPIO_LINE_E(0)
65#define EP93XX_GPIO_LINE_RDLED EP93XX_GPIO_LINE_E(1)
66#define EP93XX_GPIO_LINE_DIORn EP93XX_GPIO_LINE_E(2)
67#define EP93XX_GPIO_LINE_IDECS1n EP93XX_GPIO_LINE_E(3)
68#define EP93XX_GPIO_LINE_IDECS2n EP93XX_GPIO_LINE_E(4)
69#define EP93XX_GPIO_LINE_IDEDA0 EP93XX_GPIO_LINE_E(5)
70#define EP93XX_GPIO_LINE_IDEDA1 EP93XX_GPIO_LINE_E(6)
71#define EP93XX_GPIO_LINE_IDEDA2 EP93XX_GPIO_LINE_E(7)
72
73/* GPIO port F. */
74#define EP93XX_GPIO_LINE_F(x) ((x) + 40)
75#define EP93XX_GPIO_LINE_WP EP93XX_GPIO_LINE_F(0)
76#define EP93XX_GPIO_LINE_MCCD1 EP93XX_GPIO_LINE_F(1)
77#define EP93XX_GPIO_LINE_MCCD2 EP93XX_GPIO_LINE_F(2)
78#define EP93XX_GPIO_LINE_MCBVD1 EP93XX_GPIO_LINE_F(3)
79#define EP93XX_GPIO_LINE_MCBVD2 EP93XX_GPIO_LINE_F(4)
80#define EP93XX_GPIO_LINE_VS1 EP93XX_GPIO_LINE_F(5)
81#define EP93XX_GPIO_LINE_READY EP93XX_GPIO_LINE_F(6)
82#define EP93XX_GPIO_LINE_VS2 EP93XX_GPIO_LINE_F(7)
83
84/* GPIO port G. */
85#define EP93XX_GPIO_LINE_G(x) ((x) + 48)
86#define EP93XX_GPIO_LINE_EECLK EP93XX_GPIO_LINE_G(0)
87#define EP93XX_GPIO_LINE_EEDAT EP93XX_GPIO_LINE_G(1)
88#define EP93XX_GPIO_LINE_SLA0 EP93XX_GPIO_LINE_G(2)
89#define EP93XX_GPIO_LINE_SLA1 EP93XX_GPIO_LINE_G(3)
90#define EP93XX_GPIO_LINE_DD12 EP93XX_GPIO_LINE_G(4)
91#define EP93XX_GPIO_LINE_DD13 EP93XX_GPIO_LINE_G(5)
92#define EP93XX_GPIO_LINE_DD14 EP93XX_GPIO_LINE_G(6)
93#define EP93XX_GPIO_LINE_DD15 EP93XX_GPIO_LINE_G(7)
94
95/* GPIO port H. */
96#define EP93XX_GPIO_LINE_H(x) ((x) + 56)
97#define EP93XX_GPIO_LINE_DD0 EP93XX_GPIO_LINE_H(0)
98#define EP93XX_GPIO_LINE_DD1 EP93XX_GPIO_LINE_H(1)
99#define EP93XX_GPIO_LINE_DD2 EP93XX_GPIO_LINE_H(2)
100#define EP93XX_GPIO_LINE_DD3 EP93XX_GPIO_LINE_H(3)
101#define EP93XX_GPIO_LINE_DD4 EP93XX_GPIO_LINE_H(4)
102#define EP93XX_GPIO_LINE_DD5 EP93XX_GPIO_LINE_H(5)
103#define EP93XX_GPIO_LINE_DD6 EP93XX_GPIO_LINE_H(6)
104#define EP93XX_GPIO_LINE_DD7 EP93XX_GPIO_LINE_H(7)
105
106
107#endif
diff --git a/include/asm-arm/arch-ep93xx/hardware.h b/include/asm-arm/arch-ep93xx/hardware.h
new file mode 100644
index 000000000000..9b69f454065d
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/hardware.h
@@ -0,0 +1,12 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/hardware.h
3 */
4
5#include "ep93xx-regs.h"
6
7#define pcibios_assign_all_busses() 0
8
9#include "platform.h"
10
11#include "gesbc9312.h"
12#include "ts72xx.h"
diff --git a/include/asm-arm/arch-ep93xx/io.h b/include/asm-arm/arch-ep93xx/io.h
new file mode 100644
index 000000000000..7b4d25e29060
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/io.h
@@ -0,0 +1,8 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/io.h
3 */
4
5#define IO_SPACE_LIMIT 0xffffffff
6
7#define __io(p) ((void __iomem *)(p))
8#define __mem_pci(p) (p)
diff --git a/include/asm-arm/arch-ep93xx/irqs.h b/include/asm-arm/arch-ep93xx/irqs.h
new file mode 100644
index 000000000000..9a42f5de9e57
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/irqs.h
@@ -0,0 +1,80 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/irqs.h
3 */
4
5#ifndef __ASM_ARCH_IRQS_H
6#define __ASM_ARCH_IRQS_H
7
8#define IRQ_EP93XX_COMMRX 2
9#define IRQ_EP93XX_COMMTX 3
10#define IRQ_EP93XX_TIMER1 4
11#define IRQ_EP93XX_TIMER2 5
12#define IRQ_EP93XX_AACINTR 6
13#define IRQ_EP93XX_DMAM2P0 7
14#define IRQ_EP93XX_DMAM2P1 8
15#define IRQ_EP93XX_DMAM2P2 9
16#define IRQ_EP93XX_DMAM2P3 10
17#define IRQ_EP93XX_DMAM2P4 11
18#define IRQ_EP93XX_DMAM2P5 12
19#define IRQ_EP93XX_DMAM2P6 13
20#define IRQ_EP93XX_DMAM2P7 14
21#define IRQ_EP93XX_DMAM2P8 15
22#define IRQ_EP93XX_DMAM2P9 16
23#define IRQ_EP93XX_DMAM2M0 17
24#define IRQ_EP93XX_DMAM2M1 18
25#define IRQ_EP93XX_GPIO0MUX 20
26#define IRQ_EP93XX_GPIO1MUX 21
27#define IRQ_EP93XX_GPIO2MUX 22
28#define IRQ_EP93XX_GPIO3MUX 22
29#define IRQ_EP93XX_UART1RX 23
30#define IRQ_EP93XX_UART1TX 24
31#define IRQ_EP93XX_UART2RX 25
32#define IRQ_EP93XX_UART2TX 26
33#define IRQ_EP93XX_UART3RX 27
34#define IRQ_EP93XX_UART3TX 28
35#define IRQ_EP93XX_KEY 29
36#define IRQ_EP93XX_TOUCH 30
37#define EP93XX_VIC1_VALID_IRQ_MASK 0x7ffffffc
38
39#define IRQ_EP93XX_EXT0 32
40#define IRQ_EP93XX_EXT1 33
41#define IRQ_EP93XX_EXT2 34
42#define IRQ_EP93XX_64HZ 35
43#define IRQ_EP93XX_WATCHDOG 36
44#define IRQ_EP93XX_RTC 37
45#define IRQ_EP93XX_IRDA 38
46#define IRQ_EP93XX_ETHERNET 39
47#define IRQ_EP93XX_EXT3 40
48#define IRQ_EP93XX_PROG 41
49#define IRQ_EP93XX_1HZ 42
50#define IRQ_EP93XX_VSYNC 43
51#define IRQ_EP93XX_VIDEO_FIFO 44
52#define IRQ_EP93XX_SSP1RX 45
53#define IRQ_EP93XX_SSP1TX 46
54#define IRQ_EP93XX_GPIO4MUX 47
55#define IRQ_EP93XX_GPIO5MUX 48
56#define IRQ_EP93XX_GPIO6MUX 49
57#define IRQ_EP93XX_GPIO7MUX 50
58#define IRQ_EP93XX_TIMER3 51
59#define IRQ_EP93XX_UART1 52
60#define IRQ_EP93XX_SSP 53
61#define IRQ_EP93XX_UART2 54
62#define IRQ_EP93XX_UART3 55
63#define IRQ_EP93XX_USB 56
64#define IRQ_EP93XX_ETHERNET_PME 57
65#define IRQ_EP93XX_DSP 58
66#define IRQ_EP93XX_GPIO_AB 59
67#define IRQ_EP93XX_SAI 60
68#define EP93XX_VIC2_VALID_IRQ_MASK 0x1fffffff
69
70#define IRQ_EP93XX_GPIO(x) (64 + (x))
71
72#define NR_EP93XX_IRQS IRQ_EP93XX_GPIO(16)
73
74#define EP93XX_BOARD_IRQ(x) (NR_EP93XX_IRQS + (x))
75#define EP93XX_BOARD_IRQS 32
76
77#define NR_IRQS (NR_EP93XX_IRQS + EP93XX_BOARD_IRQS)
78
79
80#endif
diff --git a/include/asm-arm/arch-ep93xx/memory.h b/include/asm-arm/arch-ep93xx/memory.h
new file mode 100644
index 000000000000..4b1a5c7c8363
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/memory.h
@@ -0,0 +1,14 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/memory.h
3 */
4
5#ifndef __ASM_ARCH_MEMORY_H
6#define __ASM_ARCH_MEMORY_H
7
8#define PHYS_OFFSET UL(0x00000000)
9
10#define __bus_to_virt(x) __phys_to_virt(x)
11#define __virt_to_bus(x) __virt_to_phys(x)
12
13
14#endif
diff --git a/include/asm-arm/arch-ep93xx/platform.h b/include/asm-arm/arch-ep93xx/platform.h
new file mode 100644
index 000000000000..df9cbb6ef660
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/platform.h
@@ -0,0 +1,14 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/platform.h
3 */
4
5#ifndef __ASSEMBLY__
6
7void ep93xx_map_io(void);
8void ep93xx_init_irq(void);
9void ep93xx_init_time(unsigned long);
10void ep93xx_init_devices(void);
11extern struct sys_timer ep93xx_timer;
12
13
14#endif
diff --git a/include/asm-arm/arch-ep93xx/system.h b/include/asm-arm/arch-ep93xx/system.h
new file mode 100644
index 000000000000..79b718586746
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/system.h
@@ -0,0 +1,26 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/system.h
3 */
4
5#include <asm/hardware.h>
6
7static inline void arch_idle(void)
8{
9 cpu_do_idle();
10}
11
12static inline void arch_reset(char mode)
13{
14 u32 devicecfg;
15
16 local_irq_disable();
17
18 devicecfg = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG);
19 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
20 __raw_writel(devicecfg | 0x80000000, EP93XX_SYSCON_DEVICE_CONFIG);
21 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
22 __raw_writel(devicecfg & ~0x80000000, EP93XX_SYSCON_DEVICE_CONFIG);
23
24 while (1)
25 ;
26}
diff --git a/include/asm-arm/arch-ep93xx/timex.h b/include/asm-arm/arch-ep93xx/timex.h
new file mode 100644
index 000000000000..4140bddc97e2
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/timex.h
@@ -0,0 +1,5 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/timex.h
3 */
4
5#define CLOCK_TICK_RATE 983040
diff --git a/include/asm-arm/arch-ep93xx/ts72xx.h b/include/asm-arm/arch-ep93xx/ts72xx.h
new file mode 100644
index 000000000000..412215e77f44
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/ts72xx.h
@@ -0,0 +1,90 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/ts72xx.h
3 */
4
5/*
6 * TS72xx memory map:
7 *
8 * virt phys size
9 * febff000 22000000 4K model number register
10 * febfe000 22400000 4K options register
11 * febfd000 22800000 4K options register #2
12 * febfc000 [67]0000000 4K NAND data register
13 * febfb000 [67]0400000 4K NAND control register
14 * febfa000 [67]0800000 4K NAND busy register
15 */
16
17#define TS72XX_MODEL_PHYS_BASE 0x22000000
18#define TS72XX_MODEL_VIRT_BASE 0xfebff000
19#define TS72XX_MODEL_SIZE 0x00001000
20
21#define TS72XX_MODEL_TS7200 0x00
22#define TS72XX_MODEL_TS7250 0x01
23#define TS72XX_MODEL_TS7260 0x02
24
25
26#define TS72XX_OPTIONS_PHYS_BASE 0x22400000
27#define TS72XX_OPTIONS_VIRT_BASE 0xfebfe000
28#define TS72XX_OPTIONS_SIZE 0x00001000
29
30#define TS72XX_OPTIONS_COM2_RS485 0x02
31#define TS72XX_OPTIONS_MAX197 0x01
32
33
34#define TS72XX_OPTIONS2_PHYS_BASE 0x22800000
35#define TS72XX_OPTIONS2_VIRT_BASE 0xfebfd000
36#define TS72XX_OPTIONS2_SIZE 0x00001000
37
38#define TS72XX_OPTIONS2_TS9420 0x04
39#define TS72XX_OPTIONS2_TS9420_BOOT 0x02
40
41
42#define TS72XX_NOR_PHYS_BASE 0x60000000
43#define TS72XX_NOR2_PHYS_BASE 0x62000000
44
45#define TS72XX_NAND1_DATA_PHYS_BASE 0x60000000
46#define TS72XX_NAND2_DATA_PHYS_BASE 0x70000000
47#define TS72XX_NAND_DATA_VIRT_BASE 0xfebfc000
48#define TS72XX_NAND_DATA_SIZE 0x00001000
49
50#define TS72XX_NAND1_CONTROL_PHYS_BASE 0x60400000
51#define TS72XX_NAND2_CONTROL_PHYS_BASE 0x70400000
52#define TS72XX_NAND_CONTROL_VIRT_BASE 0xfebfb000
53#define TS72XX_NAND_CONTROL_SIZE 0x00001000
54
55#define TS72XX_NAND1_BUSY_PHYS_BASE 0x60800000
56#define TS72XX_NAND2_BUSY_PHYS_BASE 0x70800000
57#define TS72XX_NAND_BUSY_VIRT_BASE 0xfebfa000
58#define TS72XX_NAND_BUSY_SIZE 0x00001000
59
60
61#ifndef __ASSEMBLY__
62#include <asm/io.h>
63
64static inline int board_is_ts7200(void)
65{
66 return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7200;
67}
68
69static inline int board_is_ts7250(void)
70{
71 return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7250;
72}
73
74static inline int board_is_ts7260(void)
75{
76 return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7260;
77}
78
79static inline int is_max197_installed(void)
80{
81 return !!(__raw_readb(TS72XX_OPTIONS_VIRT_BASE) &
82 TS72XX_OPTIONS_MAX197);
83}
84
85static inline int is_ts9420_installed(void)
86{
87 return !!(__raw_readb(TS72XX_OPTIONS2_VIRT_BASE) &
88 TS72XX_OPTIONS2_TS9420);
89}
90#endif
diff --git a/include/asm-arm/arch-ep93xx/uncompress.h b/include/asm-arm/arch-ep93xx/uncompress.h
new file mode 100644
index 000000000000..c15274c85d5d
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/uncompress.h
@@ -0,0 +1,85 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/uncompress.h
3 *
4 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
10 */
11
12#include <asm/arch/ep93xx-regs.h>
13
14static unsigned char __raw_readb(unsigned int ptr)
15{
16 return *((volatile unsigned char *)ptr);
17}
18
19static unsigned int __raw_readl(unsigned int ptr)
20{
21 return *((volatile unsigned int *)ptr);
22}
23
24static void __raw_writeb(unsigned char value, unsigned int ptr)
25{
26 *((volatile unsigned char *)ptr) = value;
27}
28
29static void __raw_writel(unsigned int value, unsigned int ptr)
30{
31 *((volatile unsigned int *)ptr) = value;
32}
33
34
35#define PHYS_UART1_DATA 0x808c0000
36#define PHYS_UART1_FLAG 0x808c0018
37#define UART1_FLAG_TXFF 0x20
38
39static inline void putc(int c)
40{
41 int i;
42
43 for (i = 0; i < 1000; i++) {
44 /* Transmit fifo not full? */
45 if (!(__raw_readb(PHYS_UART1_FLAG) & UART1_FLAG_TXFF))
46 break;
47 }
48
49 __raw_writeb(c, PHYS_UART1_DATA);
50}
51
52static inline void flush(void)
53{
54}
55
56
57/*
58 * Some bootloaders don't turn off DMA from the ethernet MAC before
59 * jumping to linux, which means that we might end up with bits of RX
60 * status and packet data scribbled over the uncompressed kernel image.
61 * Work around this by resetting the ethernet MAC before we uncompress.
62 */
63#define PHYS_ETH_SELF_CTL 0x80010020
64#define ETH_SELF_CTL_RESET 0x00000001
65
66static void ethernet_reset(void)
67{
68 unsigned int v;
69
70 /* Reset the ethernet MAC. */
71 v = __raw_readl(PHYS_ETH_SELF_CTL);
72 __raw_writel(v | ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL);
73
74 /* Wait for reset to finish. */
75 while (__raw_readl(PHYS_ETH_SELF_CTL) & ETH_SELF_CTL_RESET)
76 ;
77}
78
79
80static void arch_decomp_setup(void)
81{
82 ethernet_reset();
83}
84
85#define arch_decomp_wdog()
diff --git a/include/asm-arm/arch-ep93xx/vmalloc.h b/include/asm-arm/arch-ep93xx/vmalloc.h
new file mode 100644
index 000000000000..205ea6b1cf5e
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/vmalloc.h
@@ -0,0 +1,5 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe800000
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-09 18:37:06 -0500