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-rw-r--r--include/asm-arm/arch-ebsa285/debug-macro.S66
-rw-r--r--include/asm-arm/arch-ebsa285/dma.h30
-rw-r--r--include/asm-arm/arch-ebsa285/entry-macro.S105
-rw-r--r--include/asm-arm/arch-ebsa285/hardware.h139
-rw-r--r--include/asm-arm/arch-ebsa285/io.h45
-rw-r--r--include/asm-arm/arch-ebsa285/irqs.h98
-rw-r--r--include/asm-arm/arch-ebsa285/memory.h75
-rw-r--r--include/asm-arm/arch-ebsa285/param.h3
-rw-r--r--include/asm-arm/arch-ebsa285/system.h69
-rw-r--r--include/asm-arm/arch-ebsa285/timex.h18
-rw-r--r--include/asm-arm/arch-ebsa285/uncompress.h46
-rw-r--r--include/asm-arm/arch-ebsa285/vmalloc.h26
12 files changed, 720 insertions, 0 deletions
diff --git a/include/asm-arm/arch-ebsa285/debug-macro.S b/include/asm-arm/arch-ebsa285/debug-macro.S
new file mode 100644
index 000000000000..237853db6e2f
--- /dev/null
+++ b/include/asm-arm/arch-ebsa285/debug-macro.S
@@ -0,0 +1,66 @@
1/* linux/include/asm-arm/arch-ebsa285/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#include <asm/hardware/dec21285.h>
15
16#ifndef CONFIG_DEBUG_DC21285_PORT
17 /* For NetWinder debugging */
18 .macro addruart,rx
19 mrc p15, 0, \rx, c1, c0
20 tst \rx, #1 @ MMU enabled?
21 moveq \rx, #0x7c000000 @ physical
22 movne \rx, #0xff000000 @ virtual
23 orr \rx, \rx, #0x000003f8
24 .endm
25
26 .macro senduart,rd,rx
27 strb \rd, [\rx]
28 .endm
29
30 .macro busyuart,rd,rx
311002: ldrb \rd, [\rx, #0x5]
32 and \rd, \rd, #0x60
33 teq \rd, #0x60
34 bne 1002b
35 .endm
36
37 .macro waituart,rd,rx
381001: ldrb \rd, [\rx, #0x6]
39 tst \rd, #0x10
40 beq 1001b
41 .endm
42#else
43 /* For EBSA285 debugging */
44 .equ dc21285_high, ARMCSR_BASE & 0xff000000
45 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff
46
47 .macro addruart,rx
48 mov \rx, #dc21285_high
49 .if dc21285_low
50 orr \rx, \rx, #dc21285_low
51 .endif
52 .endm
53
54 .macro senduart,rd,rx
55 str \rd, [\rx, #0x160] @ UARTDR
56 .endm
57
58 .macro busyuart,rd,rx
591001: ldr \rd, [\rx, #0x178] @ UARTFLG
60 tst \rd, #1 << 3
61 bne 1001b
62 .endm
63
64 .macro waituart,rd,rx
65 .endm
66#endif
diff --git a/include/asm-arm/arch-ebsa285/dma.h b/include/asm-arm/arch-ebsa285/dma.h
new file mode 100644
index 000000000000..c43046eb8bc7
--- /dev/null
+++ b/include/asm-arm/arch-ebsa285/dma.h
@@ -0,0 +1,30 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/dma.h
3 *
4 * Architecture DMA routines
5 *
6 * Copyright (C) 1998,1999 Russell King
7 * Copyright (C) 1998,1999 Philip Blundell
8 */
9#ifndef __ASM_ARCH_DMA_H
10#define __ASM_ARCH_DMA_H
11
12/*
13 * This is the maximum DMA address that can be DMAd to.
14 */
15#define MAX_DMA_ADDRESS 0xffffffff
16
17/*
18 * The 21285 has two internal DMA channels; we call these 8 and 9.
19 * On CATS hardware we have an additional eight ISA dma channels
20 * numbered 0..7.
21 */
22#define _ISA_DMA(x) (0+(x))
23#define _DC21285_DMA(x) (8+(x))
24
25#define MAX_DMA_CHANNELS 10
26
27#define DMA_FLOPPY _ISA_DMA(2)
28#define DMA_ISA_CASCADE _ISA_DMA(4)
29
30#endif /* _ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-ebsa285/entry-macro.S b/include/asm-arm/arch-ebsa285/entry-macro.S
new file mode 100644
index 000000000000..db5729ff6349
--- /dev/null
+++ b/include/asm-arm/arch-ebsa285/entry-macro.S
@@ -0,0 +1,105 @@
1/*
2 * include/asm-arm/arch-footbridge/entry-macro.S
3 *
4 * Low-level IRQ helper macros for footbridge-based platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10#include <asm/hardware/dec21285.h>
11
12 .macro disable_fiq
13 .endm
14
15 .equ dc21285_high, ARMCSR_BASE & 0xff000000
16 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff
17
18 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
19 mov r4, #dc21285_high
20 .if dc21285_low
21 orr r4, r4, #dc21285_low
22 .endif
23 ldr \irqstat, [r4, #0x180] @ get interrupts
24
25 mov \irqnr, #IRQ_SDRAMPARITY
26 tst \irqstat, #IRQ_MASK_SDRAMPARITY
27 bne 1001f
28
29 tst \irqstat, #IRQ_MASK_UART_RX
30 movne \irqnr, #IRQ_CONRX
31 bne 1001f
32
33 tst \irqstat, #IRQ_MASK_DMA1
34 movne \irqnr, #IRQ_DMA1
35 bne 1001f
36
37 tst \irqstat, #IRQ_MASK_DMA2
38 movne \irqnr, #IRQ_DMA2
39 bne 1001f
40
41 tst \irqstat, #IRQ_MASK_IN0
42 movne \irqnr, #IRQ_IN0
43 bne 1001f
44
45 tst \irqstat, #IRQ_MASK_IN1
46 movne \irqnr, #IRQ_IN1
47 bne 1001f
48
49 tst \irqstat, #IRQ_MASK_IN2
50 movne \irqnr, #IRQ_IN2
51 bne 1001f
52
53 tst \irqstat, #IRQ_MASK_IN3
54 movne \irqnr, #IRQ_IN3
55 bne 1001f
56
57 tst \irqstat, #IRQ_MASK_PCI
58 movne \irqnr, #IRQ_PCI
59 bne 1001f
60
61 tst \irqstat, #IRQ_MASK_DOORBELLHOST
62 movne \irqnr, #IRQ_DOORBELLHOST
63 bne 1001f
64
65 tst \irqstat, #IRQ_MASK_I2OINPOST
66 movne \irqnr, #IRQ_I2OINPOST
67 bne 1001f
68
69 tst \irqstat, #IRQ_MASK_TIMER1
70 movne \irqnr, #IRQ_TIMER1
71 bne 1001f
72
73 tst \irqstat, #IRQ_MASK_TIMER2
74 movne \irqnr, #IRQ_TIMER2
75 bne 1001f
76
77 tst \irqstat, #IRQ_MASK_TIMER3
78 movne \irqnr, #IRQ_TIMER3
79 bne 1001f
80
81 tst \irqstat, #IRQ_MASK_UART_TX
82 movne \irqnr, #IRQ_CONTX
83 bne 1001f
84
85 tst \irqstat, #IRQ_MASK_PCI_ABORT
86 movne \irqnr, #IRQ_PCI_ABORT
87 bne 1001f
88
89 tst \irqstat, #IRQ_MASK_PCI_SERR
90 movne \irqnr, #IRQ_PCI_SERR
91 bne 1001f
92
93 tst \irqstat, #IRQ_MASK_DISCARD_TIMER
94 movne \irqnr, #IRQ_DISCARD_TIMER
95 bne 1001f
96
97 tst \irqstat, #IRQ_MASK_PCI_DPERR
98 movne \irqnr, #IRQ_PCI_DPERR
99 bne 1001f
100
101 tst \irqstat, #IRQ_MASK_PCI_PERR
102 movne \irqnr, #IRQ_PCI_PERR
1031001:
104 .endm
105
diff --git a/include/asm-arm/arch-ebsa285/hardware.h b/include/asm-arm/arch-ebsa285/hardware.h
new file mode 100644
index 000000000000..2ef2200f108c
--- /dev/null
+++ b/include/asm-arm/arch-ebsa285/hardware.h
@@ -0,0 +1,139 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/hardware.h
3 *
4 * Copyright (C) 1998-1999 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This file contains the hardware definitions of the EBSA-285.
11 */
12#ifndef __ASM_ARCH_HARDWARE_H
13#define __ASM_ARCH_HARDWARE_H
14
15#include <linux/config.h>
16#include <asm/arch/memory.h>
17
18#ifdef CONFIG_ARCH_FOOTBRIDGE
19/* Virtual Physical Size
20 * 0xff800000 0x40000000 1MB X-Bus
21 * 0xff000000 0x7c000000 1MB PCI I/O space
22 * 0xfe000000 0x42000000 1MB CSR
23 * 0xfd000000 0x78000000 1MB Outbound write flush (not supported)
24 * 0xfc000000 0x79000000 1MB PCI IACK/special space
25 * 0xfb000000 0x7a000000 16MB PCI Config type 1
26 * 0xfa000000 0x7b000000 16MB PCI Config type 0
27 * 0xf9000000 0x50000000 1MB Cache flush
28 * 0xf0000000 0x80000000 16MB ISA memory
29 */
30#define XBUS_SIZE 0x00100000
31#define XBUS_BASE 0xff800000
32
33#define PCIO_SIZE 0x00100000
34#define PCIO_BASE 0xff000000
35
36#define ARMCSR_SIZE 0x00100000
37#define ARMCSR_BASE 0xfe000000
38
39#define WFLUSH_SIZE 0x00100000
40#define WFLUSH_BASE 0xfd000000
41
42#define PCIIACK_SIZE 0x00100000
43#define PCIIACK_BASE 0xfc000000
44
45#define PCICFG1_SIZE 0x01000000
46#define PCICFG1_BASE 0xfb000000
47
48#define PCICFG0_SIZE 0x01000000
49#define PCICFG0_BASE 0xfa000000
50
51#define FLUSH_SIZE 0x00100000
52#define FLUSH_BASE 0xf9000000
53
54#define PCIMEM_SIZE 0x01000000
55#define PCIMEM_BASE 0xf0000000
56
57#elif defined(CONFIG_ARCH_CO285)
58/*
59 * This is the COEBSA285 cut-down mapping
60 */
61#define PCIMEM_SIZE 0x80000000
62#define PCIMEM_BASE 0x80000000
63
64#define FLUSH_SIZE 0x00100000
65#define FLUSH_BASE 0x7e000000
66
67#define WFLUSH_SIZE 0x01000000
68#define WFLUSH_BASE 0x7d000000
69
70#define ARMCSR_SIZE 0x00100000
71#define ARMCSR_BASE 0x7cf00000
72
73#define XBUS_SIZE 0x00020000
74#define XBUS_BASE 0x7cee0000
75
76#define PCIO_SIZE 0x00010000
77#define PCIO_BASE 0x7ced0000
78
79#else
80
81#error "Undefined footbridge architecture"
82
83#endif
84
85#define XBUS_LEDS ((volatile unsigned char *)(XBUS_BASE + 0x12000))
86#define XBUS_LED_AMBER (1 << 0)
87#define XBUS_LED_GREEN (1 << 1)
88#define XBUS_LED_RED (1 << 2)
89#define XBUS_LED_TOGGLE (1 << 8)
90
91#define XBUS_SWITCH ((volatile unsigned char *)(XBUS_BASE + 0x12000))
92#define XBUS_SWITCH_SWITCH ((*XBUS_SWITCH) & 15)
93#define XBUS_SWITCH_J17_13 ((*XBUS_SWITCH) & (1 << 4))
94#define XBUS_SWITCH_J17_11 ((*XBUS_SWITCH) & (1 << 5))
95#define XBUS_SWITCH_J17_9 ((*XBUS_SWITCH) & (1 << 6))
96
97#define FLUSH_BASE_PHYS 0x50000000
98#define UNCACHEABLE_ADDR (ARMCSR_BASE + 0x108)
99
100
101/* PIC irq control */
102#define PIC_LO 0x20
103#define PIC_MASK_LO 0x21
104#define PIC_HI 0xA0
105#define PIC_MASK_HI 0xA1
106
107/* GPIO pins */
108#define GPIO_CCLK 0x800
109#define GPIO_DSCLK 0x400
110#define GPIO_E2CLK 0x200
111#define GPIO_IOLOAD 0x100
112#define GPIO_RED_LED 0x080
113#define GPIO_WDTIMER 0x040
114#define GPIO_DATA 0x020
115#define GPIO_IOCLK 0x010
116#define GPIO_DONE 0x008
117#define GPIO_FAN 0x004
118#define GPIO_GREEN_LED 0x002
119#define GPIO_RESET 0x001
120
121/* CPLD pins */
122#define CPLD_DS_ENABLE 8
123#define CPLD_7111_DISABLE 4
124#define CPLD_UNMUTE 2
125#define CPLD_FLASH_WR_ENABLE 1
126
127#ifndef __ASSEMBLY__
128extern void gpio_modify_op(int mask, int set);
129extern void gpio_modify_io(int mask, int in);
130extern int gpio_read(void);
131extern void cpld_modify(int mask, int set);
132#endif
133
134#define pcibios_assign_all_busses() 1
135
136#define PCIBIOS_MIN_IO 0x1000
137#define PCIBIOS_MIN_MEM 0x81000000
138
139#endif
diff --git a/include/asm-arm/arch-ebsa285/io.h b/include/asm-arm/arch-ebsa285/io.h
new file mode 100644
index 000000000000..70576b17f922
--- /dev/null
+++ b/include/asm-arm/arch-ebsa285/io.h
@@ -0,0 +1,45 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/io.h
3 *
4 * Copyright (C) 1997-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Modifications:
11 * 06-12-1997 RMK Created.
12 * 07-04-1999 RMK Major cleanup
13 */
14#ifndef __ASM_ARM_ARCH_IO_H
15#define __ASM_ARM_ARCH_IO_H
16
17#define IO_SPACE_LIMIT 0xffff
18
19/*
20 * Translation of various region addresses to virtual addresses
21 */
22#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
23#if 1
24#define __mem_pci(a) (a)
25#define __mem_isa(a) ((a) + PCIMEM_BASE)
26#else
27
28static inline void __iomem *___mem_pci(void __iomem *p)
29{
30 unsigned long a = (unsigned long)p;
31 BUG_ON(a <= 0xc0000000 || a >= 0xe0000000);
32 return p;
33}
34
35static inline void __iomem *___mem_isa(void __iomem *p)
36{
37 unsigned long a = (unsigned long)p;
38 BUG_ON(a >= 16*1048576);
39 return p + PCIMEM_BASE;
40}
41#define __mem_pci(a) ___mem_pci(a)
42#define __mem_isa(a) ___mem_isa(a)
43#endif
44
45#endif
diff --git a/include/asm-arm/arch-ebsa285/irqs.h b/include/asm-arm/arch-ebsa285/irqs.h
new file mode 100644
index 000000000000..3e766f1cecf1
--- /dev/null
+++ b/include/asm-arm/arch-ebsa285/irqs.h
@@ -0,0 +1,98 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/irqs.h
3 *
4 * Copyright (C) 1998 Russell King
5 * Copyright (C) 1998 Phil Blundell
6 *
7 * Changelog:
8 * 20-Jan-1998 RMK Started merge of EBSA286, CATS and NetWinder
9 * 01-Feb-1999 PJB ISA IRQs start at 0 not 16
10 */
11#include <asm/mach-types.h>
12
13#define NR_IRQS 36
14#define NR_DC21285_IRQS 16
15
16#define _ISA_IRQ(x) (0 + (x))
17#define _ISA_INR(x) ((x) - 0)
18#define _DC21285_IRQ(x) (16 + (x))
19#define _DC21285_INR(x) ((x) - 16)
20
21/*
22 * This is a list of all interrupts that the 21285
23 * can generate and we handle.
24 */
25#define IRQ_CONRX _DC21285_IRQ(0)
26#define IRQ_CONTX _DC21285_IRQ(1)
27#define IRQ_TIMER1 _DC21285_IRQ(2)
28#define IRQ_TIMER2 _DC21285_IRQ(3)
29#define IRQ_TIMER3 _DC21285_IRQ(4)
30#define IRQ_IN0 _DC21285_IRQ(5)
31#define IRQ_IN1 _DC21285_IRQ(6)
32#define IRQ_IN2 _DC21285_IRQ(7)
33#define IRQ_IN3 _DC21285_IRQ(8)
34#define IRQ_DOORBELLHOST _DC21285_IRQ(9)
35#define IRQ_DMA1 _DC21285_IRQ(10)
36#define IRQ_DMA2 _DC21285_IRQ(11)
37#define IRQ_PCI _DC21285_IRQ(12)
38#define IRQ_SDRAMPARITY _DC21285_IRQ(13)
39#define IRQ_I2OINPOST _DC21285_IRQ(14)
40#define IRQ_PCI_ABORT _DC21285_IRQ(15)
41#define IRQ_PCI_SERR _DC21285_IRQ(16)
42#define IRQ_DISCARD_TIMER _DC21285_IRQ(17)
43#define IRQ_PCI_DPERR _DC21285_IRQ(18)
44#define IRQ_PCI_PERR _DC21285_IRQ(19)
45
46#define IRQ_ISA_TIMER _ISA_IRQ(0)
47#define IRQ_ISA_KEYBOARD _ISA_IRQ(1)
48#define IRQ_ISA_CASCADE _ISA_IRQ(2)
49#define IRQ_ISA_UART2 _ISA_IRQ(3)
50#define IRQ_ISA_UART _ISA_IRQ(4)
51#define IRQ_ISA_FLOPPY _ISA_IRQ(6)
52#define IRQ_ISA_PRINTER _ISA_IRQ(7)
53#define IRQ_ISA_RTC_ALARM _ISA_IRQ(8)
54#define IRQ_ISA_2 _ISA_IRQ(9)
55#define IRQ_ISA_PS2MOUSE _ISA_IRQ(12)
56#define IRQ_ISA_HARDDISK1 _ISA_IRQ(14)
57#define IRQ_ISA_HARDDISK2 _ISA_IRQ(15)
58
59#define IRQ_MASK_UART_RX (1 << 2)
60#define IRQ_MASK_UART_TX (1 << 3)
61#define IRQ_MASK_TIMER1 (1 << 4)
62#define IRQ_MASK_TIMER2 (1 << 5)
63#define IRQ_MASK_TIMER3 (1 << 6)
64#define IRQ_MASK_IN0 (1 << 8)
65#define IRQ_MASK_IN1 (1 << 9)
66#define IRQ_MASK_IN2 (1 << 10)
67#define IRQ_MASK_IN3 (1 << 11)
68#define IRQ_MASK_DOORBELLHOST (1 << 15)
69#define IRQ_MASK_DMA1 (1 << 16)
70#define IRQ_MASK_DMA2 (1 << 17)
71#define IRQ_MASK_PCI (1 << 18)
72#define IRQ_MASK_SDRAMPARITY (1 << 24)
73#define IRQ_MASK_I2OINPOST (1 << 25)
74#define IRQ_MASK_PCI_ABORT ((1 << 29) | (1 << 30))
75#define IRQ_MASK_PCI_SERR (1 << 23)
76#define IRQ_MASK_DISCARD_TIMER (1 << 27)
77#define IRQ_MASK_PCI_DPERR (1 << 28)
78#define IRQ_MASK_PCI_PERR (1 << 31)
79
80/*
81 * Netwinder interrupt allocations
82 */
83#define IRQ_NETWINDER_ETHER10 IRQ_IN0
84#define IRQ_NETWINDER_ETHER100 IRQ_IN1
85#define IRQ_NETWINDER_VIDCOMP IRQ_IN2
86#define IRQ_NETWINDER_PS2MOUSE _ISA_IRQ(5)
87#define IRQ_NETWINDER_IR _ISA_IRQ(6)
88#define IRQ_NETWINDER_BUTTON _ISA_IRQ(10)
89#define IRQ_NETWINDER_VGA _ISA_IRQ(11)
90#define IRQ_NETWINDER_SOUND _ISA_IRQ(12)
91
92#undef RTC_IRQ
93#define RTC_IRQ IRQ_ISA_RTC_ALARM
94#define I8042_KBD_IRQ IRQ_ISA_KEYBOARD
95#define I8042_AUX_IRQ (machine_is_netwinder() ? IRQ_NETWINDER_PS2MOUSE : IRQ_ISA_PS2MOUSE)
96#define IRQ_FLOPPYDISK IRQ_ISA_FLOPPY
97
98#define irq_canonicalize(_i) (((_i) == IRQ_ISA_CASCADE) ? IRQ_ISA_2 : _i)
diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h
new file mode 100644
index 000000000000..d0466f9987d3
--- /dev/null
+++ b/include/asm-arm/arch-ebsa285/memory.h
@@ -0,0 +1,75 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/memory.h
3 *
4 * Copyright (C) 1996-1999 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Changelog:
11 * 20-Oct-1996 RMK Created
12 * 31-Dec-1997 RMK Fixed definitions to reduce warnings.
13 * 17-May-1998 DAG Added __virt_to_bus and __bus_to_virt functions.
14 * 21-Nov-1998 RMK Changed __virt_to_bus and __bus_to_virt to macros.
15 * 21-Mar-1999 RMK Added PAGE_OFFSET for co285 architecture.
16 * Renamed to memory.h
17 * Moved PAGE_OFFSET and TASK_SIZE here
18 */
19#ifndef __ASM_ARCH_MEMORY_H
20#define __ASM_ARCH_MEMORY_H
21
22#include <linux/config.h>
23
24#if defined(CONFIG_FOOTBRIDGE_ADDIN)
25/*
26 * If we may be using add-in footbridge mode, then we must
27 * use the out-of-line translation that makes use of the
28 * PCI BAR
29 */
30#ifndef __ASSEMBLY__
31extern unsigned long __virt_to_bus(unsigned long);
32extern unsigned long __bus_to_virt(unsigned long);
33#endif
34
35#elif defined(CONFIG_FOOTBRIDGE_HOST)
36
37#define __virt_to_bus(x) ((x) - 0xe0000000)
38#define __bus_to_virt(x) ((x) + 0xe0000000)
39
40#else
41
42#error "Undefined footbridge mode"
43
44#endif
45
46#if defined(CONFIG_ARCH_FOOTBRIDGE)
47
48/* Task size and page offset at 3GB */
49#define TASK_SIZE (0xbf000000UL)
50#define PAGE_OFFSET (0xc0000000UL)
51
52#elif defined(CONFIG_ARCH_CO285)
53
54/* Task size and page offset at 1.5GB */
55#define TASK_SIZE (0x5f000000UL)
56#define PAGE_OFFSET (0x60000000UL)
57
58#else
59
60#error "Undefined footbridge architecture"
61
62#endif
63
64/*
65 * Physical DRAM offset.
66 */
67#define PHYS_OFFSET (0x00000000UL)
68
69/*
70 * This decides where the kernel will search for a free chunk of vm
71 * space during mmap's.
72 */
73#define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3)
74
75#endif
diff --git a/include/asm-arm/arch-ebsa285/param.h b/include/asm-arm/arch-ebsa285/param.h
new file mode 100644
index 000000000000..3827103b27a0
--- /dev/null
+++ b/include/asm-arm/arch-ebsa285/param.h
@@ -0,0 +1,3 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/param.h
3 */
diff --git a/include/asm-arm/arch-ebsa285/system.h b/include/asm-arm/arch-ebsa285/system.h
new file mode 100644
index 000000000000..bf91c695c4b5
--- /dev/null
+++ b/include/asm-arm/arch-ebsa285/system.h
@@ -0,0 +1,69 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/system.h
3 *
4 * Copyright (C) 1996-1999 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <asm/hardware/dec21285.h>
11#include <asm/io.h>
12#include <asm/hardware.h>
13#include <asm/leds.h>
14#include <asm/mach-types.h>
15
16static inline void arch_idle(void)
17{
18 cpu_do_idle();
19}
20
21static inline void arch_reset(char mode)
22{
23 if (mode == 's') {
24 /*
25 * Jump into the ROM
26 */
27 cpu_reset(0x41000000);
28 } else {
29 if (machine_is_netwinder()) {
30 /* open up the SuperIO chip
31 */
32 outb(0x87, 0x370);
33 outb(0x87, 0x370);
34
35 /* aux function group 1 (logical device 7)
36 */
37 outb(0x07, 0x370);
38 outb(0x07, 0x371);
39
40 /* set GP16 for WD-TIMER output
41 */
42 outb(0xe6, 0x370);
43 outb(0x00, 0x371);
44
45 /* set a RED LED and toggle WD_TIMER for rebooting
46 */
47 outb(0xc4, 0x338);
48 } else {
49 /*
50 * Force the watchdog to do a CPU reset.
51 *
52 * After making sure that the watchdog is disabled
53 * (so we can change the timer registers) we first
54 * enable the timer to autoreload itself. Next, the
55 * timer interval is set really short and any
56 * current interrupt request is cleared (so we can
57 * see an edge transition). Finally, TIMER4 is
58 * enabled as the watchdog.
59 */
60 *CSR_SA110_CNTL &= ~(1 << 13);
61 *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE |
62 TIMER_CNTL_AUTORELOAD |
63 TIMER_CNTL_DIV16;
64 *CSR_TIMER4_LOAD = 0x2;
65 *CSR_TIMER4_CLR = 0;
66 *CSR_SA110_CNTL |= (1 << 13);
67 }
68 }
69}
diff --git a/include/asm-arm/arch-ebsa285/timex.h b/include/asm-arm/arch-ebsa285/timex.h
new file mode 100644
index 000000000000..df60b3812d96
--- /dev/null
+++ b/include/asm-arm/arch-ebsa285/timex.h
@@ -0,0 +1,18 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/timex.h
3 *
4 * Copyright (C) 1998 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * EBSA285 architecture timex specifications
11 */
12
13/*
14 * We assume a constant here; this satisfies the maths in linux/timex.h
15 * and linux/time.h. CLOCK_TICK_RATE is actually system dependent, but
16 * this must be a constant.
17 */
18#define CLOCK_TICK_RATE (50000000/16)
diff --git a/include/asm-arm/arch-ebsa285/uncompress.h b/include/asm-arm/arch-ebsa285/uncompress.h
new file mode 100644
index 000000000000..c2fd84e2d90e
--- /dev/null
+++ b/include/asm-arm/arch-ebsa285/uncompress.h
@@ -0,0 +1,46 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/uncompress.h
3 *
4 * Copyright (C) 1996-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <asm/mach-types.h>
11
12/*
13 * Note! This could cause problems on the NetWinder
14 */
15#define DC21285_BASE ((volatile unsigned int *)0x42000160)
16#define SER0_BASE ((volatile unsigned char *)0x7c0003f8)
17
18static __inline__ void putc(char c)
19{
20 if (machine_is_netwinder()) {
21 while ((SER0_BASE[5] & 0x60) != 0x60);
22 SER0_BASE[0] = c;
23 } else {
24 while (DC21285_BASE[6] & 8);
25 DC21285_BASE[0] = c;
26 }
27}
28
29/*
30 * This does not append a newline
31 */
32static void putstr(const char *s)
33{
34 while (*s) {
35 putc(*s);
36 if (*s == '\n')
37 putc('\r');
38 s++;
39 }
40}
41
42/*
43 * nothing to do
44 */
45#define arch_decomp_setup()
46#define arch_decomp_wdog()
diff --git a/include/asm-arm/arch-ebsa285/vmalloc.h b/include/asm-arm/arch-ebsa285/vmalloc.h
new file mode 100644
index 000000000000..def705a3c209
--- /dev/null
+++ b/include/asm-arm/arch-ebsa285/vmalloc.h
@@ -0,0 +1,26 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/vmalloc.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/config.h>
10
11/*
12 * Just any arbitrary offset to the start of the vmalloc VM area: the
13 * current 8MB value just means that there will be a 8MB "hole" after the
14 * physical memory until the kernel virtual memory starts. That means that
15 * any out-of-bounds memory accesses will hopefully be caught.
16 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
17 * area for the same reason. ;)
18 */
19#define VMALLOC_OFFSET (8*1024*1024)
20#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
21
22#ifdef CONFIG_ARCH_FOOTBRIDGE
23#define VMALLOC_END (PAGE_OFFSET + 0x30000000)
24#else
25#define VMALLOC_END (PAGE_OFFSET + 0x20000000)
26#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-04 12:18:12 -0500