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Diffstat (limited to 'include/asm-arm/arch-davinci/io.h')
-rw-r--r-- | include/asm-arm/arch-davinci/io.h | 79 |
1 files changed, 0 insertions, 79 deletions
diff --git a/include/asm-arm/arch-davinci/io.h b/include/asm-arm/arch-davinci/io.h deleted file mode 100644 index e7accb910864..000000000000 --- a/include/asm-arm/arch-davinci/io.h +++ /dev/null | |||
@@ -1,79 +0,0 @@ | |||
1 | /* | ||
2 | * DaVinci IO address definitions | ||
3 | * | ||
4 | * Copied from include/asm/arm/arch-omap/io.h | ||
5 | * | ||
6 | * 2007 (c) MontaVista Software, Inc. This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or implied. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_IO_H | ||
12 | #define __ASM_ARCH_IO_H | ||
13 | |||
14 | #define IO_SPACE_LIMIT 0xffffffff | ||
15 | |||
16 | /* | ||
17 | * ---------------------------------------------------------------------------- | ||
18 | * I/O mapping | ||
19 | * ---------------------------------------------------------------------------- | ||
20 | */ | ||
21 | #define IO_PHYS 0x01c00000 | ||
22 | #define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */ | ||
23 | #define IO_SIZE 0x00400000 | ||
24 | #define IO_VIRT (IO_PHYS + IO_OFFSET) | ||
25 | #define io_p2v(pa) ((pa) + IO_OFFSET) | ||
26 | #define io_v2p(va) ((va) - IO_OFFSET) | ||
27 | #define IO_ADDRESS(x) io_p2v(x) | ||
28 | |||
29 | /* | ||
30 | * We don't actually have real ISA nor PCI buses, but there is so many | ||
31 | * drivers out there that might just work if we fake them... | ||
32 | */ | ||
33 | #define PCIO_BASE 0 | ||
34 | #define __io(a) ((void __iomem *)(PCIO_BASE + (a))) | ||
35 | #define __mem_pci(a) (a) | ||
36 | #define __mem_isa(a) (a) | ||
37 | |||
38 | #ifndef __ASSEMBLER__ | ||
39 | |||
40 | /* | ||
41 | * Functions to access the DaVinci IO region | ||
42 | * | ||
43 | * NOTE: - Use davinci_read/write[bwl] for physical register addresses | ||
44 | * - Use __raw_read/write[bwl]() for virtual register addresses | ||
45 | * - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses | ||
46 | * - DO NOT use hardcoded virtual addresses to allow changing the | ||
47 | * IO address space again if needed | ||
48 | */ | ||
49 | #define davinci_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a)) | ||
50 | #define davinci_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a)) | ||
51 | #define davinci_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a)) | ||
52 | |||
53 | #define davinci_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v)) | ||
54 | #define davinci_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v)) | ||
55 | #define davinci_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v)) | ||
56 | |||
57 | /* 16 bit uses LDRH/STRH, base +/- offset_8 */ | ||
58 | typedef struct { volatile u16 offset[256]; } __regbase16; | ||
59 | #define __REGV16(vaddr) ((__regbase16 *)((vaddr)&~0xff)) \ | ||
60 | ->offset[((vaddr)&0xff)>>1] | ||
61 | #define __REG16(paddr) __REGV16(io_p2v(paddr)) | ||
62 | |||
63 | /* 8/32 bit uses LDR/STR, base +/- offset_12 */ | ||
64 | typedef struct { volatile u8 offset[4096]; } __regbase8; | ||
65 | #define __REGV8(vaddr) ((__regbase8 *)((vaddr)&~4095)) \ | ||
66 | ->offset[((vaddr)&4095)>>0] | ||
67 | #define __REG8(paddr) __REGV8(io_p2v(paddr)) | ||
68 | |||
69 | typedef struct { volatile u32 offset[4096]; } __regbase32; | ||
70 | #define __REGV32(vaddr) ((__regbase32 *)((vaddr)&~4095)) \ | ||
71 | ->offset[((vaddr)&4095)>>2] | ||
72 | |||
73 | #define __REG(paddr) __REGV32(io_p2v(paddr)) | ||
74 | #else | ||
75 | |||
76 | #define __REG(x) (*((volatile unsigned long *)io_p2v(x))) | ||
77 | |||
78 | #endif /* __ASSEMBLER__ */ | ||
79 | #endif /* __ASM_ARCH_IO_H */ | ||